ipq807x: add Qualcomm Atheros IPQ807x target
[openwrt/staging/jow.git] / target / linux / ipq807x / patches-5.15 / 0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch
1 From 8a576b5bc9f0555d1d970cacabcaa24a3b74fa57 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Wed, 16 Nov 2022 22:15:01 +0100
4 Subject: [PATCH] arm64: dts: qcom: ipq8074: pass QMP PCI PHY PIPE clocks to
5 GCC
6
7 Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to
8 find them by matching globaly by name.
9
10 If not passed directly, driver maintains backwards compatibility by then
11 falling back to global lookup.
12
13 Signed-off-by: Robert Marko <robimarko@gmail.com>
14 ---
15 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
16 1 file changed, 2 insertions(+), 2 deletions(-)
17
18 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
19 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
20 @@ -396,8 +396,8 @@
21 gcc: gcc@1800000 {
22 compatible = "qcom,gcc-ipq8074";
23 reg = <0x01800000 0x80000>;
24 - clocks = <&xo>, <&sleep_clk>;
25 - clock-names = "xo", "sleep_clk";
26 + clocks = <&xo>, <&sleep_clk>, <&pcie_phy0>, <&pcie_phy1>;
27 + clock-names = "xo", "sleep_clk", "pcie0_pipe", "pcie1_pipe";
28 #clock-cells = <1>;
29 #power-domain-cells = <1>;
30 #reset-cells = <1>;