target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
   3
   4 /dts-v1/;
   5
   6 #include "ipq8074.dtsi"
   7 #include "ipq8074-hk-cpu.dtsi"
   8 #include "ipq8074-ess.dtsi"
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/input/input.h>
  11 #include <dt-bindings/leds/common.h>
  12
  13 / {
  14         model = "Xiaomi AX9000";
  15         compatible = "xiaomi,ax9000", "qcom,ipq8074";
  16
  17         aliases {
  18                 serial0 = &blsp1_uart5;
  19                 led-boot = &led_system_yellow;
  20                 led-failsafe = &led_system_yellow;
  21                 led-running = &led_system_blue;
  22                 led-upgrade = &led_system_yellow;
  23                 label-mac-device = &dp5;
  24         };
  25
  26         chosen {
  27                 stdout-path = "serial0:115200n8";
  28                 bootargs-append = " root=/dev/ubiblock0_0";
  29         };
  30
  31         keys {
  32                 compatible = "gpio-keys";
  33
  34                 reset {
  35                         label = "reset";
  36                         gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
  37                         linux,code = <KEY_RESTART>;
  38                 };
  39
  40                 wps {
  41                         label = "wps"; /* Labeled Mesh on the device */
  42                         gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
  43                         linux,code = <KEY_WPS_BUTTON>;
  44                 };
  45         };
  46
  47         leds {
  48                 compatible = "gpio-leds";
  49
  50                 led_system_blue: system-blue {
  51                         label = "blue:system";
  52                         gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
  53                         color = <LED_COLOR_ID_BLUE>;
  54                 };
  55
  56                 led_system_yellow: system-yellow {
  57                         label = "yellow:system";
  58                         gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
  59                         color = <LED_COLOR_ID_YELLOW>;
  60                 };
  61
  62                 network-yellow {
  63                         label = "yellow:network";
  64                         gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
  65                         color = <LED_COLOR_ID_YELLOW>;
  66                 };
  67
  68                 network-blue {
  69                         label = "blue:network";
  70                         gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
  71                         color = <LED_COLOR_ID_BLUE>;
  72                 };
  73
  74                 top-red {
  75                         label = "red:top";
  76                         gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
  77                         color = <LED_COLOR_ID_RED>;
  78                         default-state = "keep";
  79                 };
  80
  81                 top-green {
  82                         label = "green:top";
  83                         gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
  84                         color = <LED_COLOR_ID_GREEN>;
  85                         default-state = "keep";
  86                 };
  87
  88                 top-blue {
  89                         label = "blue:top";
  90                         gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>;
  91                         color = <LED_COLOR_ID_BLUE>;
  92                         default-state = "keep";
  93                 };
  94         };
  95 };
  96
  97 &tlmm {
  98         mdio_pins: mdio-pins {
  99                 mdc {
 100                         pins = "gpio68";
 101                         function = "mdc";
 102                         drive-strength = <8>;
 103                         bias-pull-up;
 104                 };
 105
 106                 mdio {
 107                         pins = "gpio69";
 108                         function = "mdio";
 109                         drive-strength = <8>;
 110                         bias-pull-up;
 111                 };
 112         };
 113
 114         i2c_pins: i2c-pins {
 115                 pins = "gpio0", "gpio2";
 116                 function = "blsp5_i2c";
 117                 drive-strength = <8>;
 118                 bias-disable;
 119         };
 120 };
 121
 122 &blsp1_uart5 {
 123         status = "okay";
 124 };
 125
 126 &blsp1_i2c6 {
 127         status = "okay";
 128
 129         pinctrl-0 = <&i2c_pins>;
 130         pinctrl-names = "default";
 131 };
 132
 133 &prng {
 134         status = "okay";
 135 };
 136
 137 &cryptobam {
 138         status = "okay";
 139 };
 140
 141 &crypto {
 142         status = "okay";
 143 };
 144
 145 &qpic_bam {
 146         status = "okay";
 147 };
 148
 149 &qpic_nand {
 150         status = "okay";
 151
 152         /*
 153          * Bootloader will find the NAND DT node by the compatible and
 154          * then "fixup" it by adding the partitions from the SMEM table
 155          * using the legacy bindings thus making it impossible for us
 156          * to change the partition table or utilize NVMEM for calibration.
 157          * So add a dummy partitions node that bootloader will populate
 158          * and set it as disabled so the kernel ignores it instead of
 159          * printing warnings due to the broken way bootloader adds the
 160          * partitions.
 161          */
 162         partitions {
 163                 status = "disabled";
 164         };
 165
 166         nand@0 {
 167                 reg = <0>;
 168                 nand-ecc-strength = <4>;
 169                 nand-ecc-step-size = <512>;
 170                 nand-bus-width = <8>;
 171
 172                 partitions {
 173                         compatible = "fixed-partitions";
 174                         #address-cells = <1>;
 175                         #size-cells = <1>;
 176
 177                         partition@0 {
 178                                 label = "0:sbl1";
 179                                 reg = <0x0 0x100000>;
 180                                 read-only;
 181                         };
 182
 183                         partition@100000 {
 184                                 label = "0:mibib";
 185                                 reg = <0x100000 0x100000>;
 186                                 read-only;
 187                         };
 188
 189                         partition@200000 {
 190                                 label = "0:bootconfig";
 191                                 reg = <0x200000 0x80000>;
 192                                 read-only;
 193                         };
 194
 195                         partition@280000 {
 196                                 label = "0:bootconfig1";
 197                                 reg = <0x280000 0x80000>;
 198                                 read-only;
 199                         };
 200
 201                         partition@300000 {
 202                                 label = "0:qsee";
 203                                 reg = <0x300000 0x300000>;
 204                                 read-only;
 205                         };
 206
 207                         partition@600000 {
 208                                 label = "0:qsee_1";
 209                                 reg = <0x600000 0x300000>;
 210                                 read-only;
 211                         };
 212
 213                         partition@900000 {
 214                                 label = "0:devcfg";
 215                                 reg = <0x900000 0x80000>;
 216                                 read-only;
 217                         };
 218
 219                         partition@980000 {
 220                                 label = "0:devcfg_1";
 221                                 reg = <0x980000 0x80000>;
 222                                 read-only;
 223                         };
 224
 225                         partition@a00000 {
 226                                 label = "0:apdp";
 227                                 reg = <0xa00000 0x80000>;
 228                                 read-only;
 229                         };
 230
 231                         partition@a80000 {
 232                                 label = "0:apdp_1";
 233                                 reg = <0xa80000 0x80000>;
 234                                 read-only;
 235                         };
 236
 237                         partition@b00000 {
 238                                 label = "0:rpm";
 239                                 reg = <0xb00000 0x80000>;
 240                                 read-only;
 241                         };
 242
 243                         partition@b80000 {
 244                                 label = "0:rpm_1";
 245                                 reg = <0xb80000 0x80000>;
 246                                 read-only;
 247                         };
 248
 249                         partition@c00000 {
 250                                 label = "0:cdt";
 251                                 reg = <0xc00000 0x80000>;
 252                                 read-only;
 253                         };
 254
 255                         partition@c80000 {
 256                                 label = "0:cdt_1";
 257                                 reg = <0xc80000 0x80000>;
 258                                 read-only;
 259                         };
 260
 261                         partition@d00000 {
 262                                 label = "0:appsblenv";
 263                                 reg = <0xd00000 0x80000>;
 264                         };
 265
 266                         partition@d80000 {
 267                                 label = "0:appsbl";
 268                                 reg = <0xd80000 0x100000>;
 269                                 read-only;
 270                         };
 271
 272                         partition@e80000 {
 273                                 label = "0:appsbl_1";
 274                                 reg = <0xe80000 0x100000>;
 275                                 read-only;
 276                         };
 277
 278                         partition@f80000 {
 279                                 label = "0:art";
 280                                 reg = <0xf80000 0x80000>;
 281                                 read-only;
 282
 283                                 compatible = "nvmem-cells";
 284                                 #address-cells = <1>;
 285                                 #size-cells = <1>;
 286
 287                                 macaddr_dp1: macaddr@0 {
 288                                         reg = <0x0 0x6>;
 289                                 };
 290
 291                                 macaddr_dp2: macaddr@6 {
 292                                         reg = <0x6 0x6>;
 293                                 };
 294
 295                                 macaddr_dp3: macaddr@c {
 296                                         reg = <0xc 0x6>;
 297                                 };
 298
 299                                 macaddr_dp4: macaddr@12 {
 300                                         reg = <0x12 0x6>;
 301                                 };
 302
 303                                 macaddr_dp5: macaddr@18 {
 304                                         reg = <0x18 0x6>;
 305                                 };
 306
 307                                 caldata_qca9889: caldata@4d000 {
 308                                         reg = <0x4d000 0x844>;
 309                                 };
 310                         };
 311
 312                         partition@1000000 {
 313                                 label = "bdata";
 314                                 reg = <0x1000000 0x80000>;
 315                         };
 316
 317                         partition@1080000 {
 318                                 /* This is crash + crash_syslog parts combined */
 319                                 label = "pstore";
 320                                 reg = <0x1080000 0x100000>;
 321                         };
 322
 323                         partition@1180000 {
 324                                 label = "ubi_kernel";
 325                                 reg = <0x1180000 0x3800000>;
 326                         };
 327
 328                         partition@4980000 {
 329                                 label = "rootfs";
 330                                 reg = <0x4980000 0xb680000>;
 331                         };
 332                 };
 333         };
 334 };
 335
 336 &qusb_phy_0 {
 337         status = "okay";
 338 };
 339
 340 &ssphy_0 {
 341         status = "okay";
 342 };
 343
 344 &usb_0 {
 345         status = "okay";
 346 };
 347
 348 &mdio {
 349         status = "okay";
 350
 351         pinctrl-0 = <&mdio_pins>;
 352         pinctrl-names = "default";
 353         reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
 354
 355         qca8075_0: ethernet-phy@0 {
 356                 compatible = "ethernet-phy-ieee802.3-c22";
 357                 reg = <0>;
 358         };
 359
 360         qca8075_1: ethernet-phy@1 {
 361                 compatible = "ethernet-phy-ieee802.3-c22";
 362                 reg = <1>;
 363         };
 364
 365         qca8075_2: ethernet-phy@2 {
 366                 compatible = "ethernet-phy-ieee802.3-c22";
 367                 reg = <2>;
 368         };
 369
 370         qca8075_3: ethernet-phy@3 {
 371                 compatible = "ethernet-phy-ieee802.3-c22";
 372                 reg = <3>;
 373         };
 374
 375         qca8081: ethernet-phy@24 {
 376                 compatible = "ethernet-phy-id004d.d101";
 377                 reg = <24>;
 378                 reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 379         };
 380 };
 381
 382 &switch {
 383         status = "okay";
 384
 385         switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
 386         switch_lan_bmp = <0x1e>; /* lan port bitmap */
 387         switch_wan_bmp = <0x20>; /* wan port bitmap */
 388         switch_mac_mode = <0xb>; /* mac mode for uniphy instance0*/
 389         switch_mac_mode1 = <0xc>; /* mac mode for uniphy instance1*/
 390         switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
 391         bm_tick_mode = <0>; /* bm tick mode */
 392         tm_tick_mode = <0>; /* tm tick mode */
 393
 394         qcom,port_phyinfo {
 395                 port@0 {
 396                         port_id = <1>;
 397                         phy_address = <0>;
 398                 };
 399                 port@1 {
 400                         port_id = <2>;
 401                         phy_address = <1>;
 402                 };
 403                 port@2 {
 404                         port_id = <3>;
 405                         phy_address = <2>;
 406                 };
 407                 port@3 {
 408                         port_id = <4>;
 409                         phy_address = <3>;
 410                 };
 411                 port@4 {
 412                         port_id = <5>;
 413                         phy_address = <24>;
 414                         port_mac_sel = "QGMAC_PORT";
 415                 };
 416         };
 417 };
 418
 419 &edma {
 420         status = "okay";
 421 };
 422
 423 &dp1 {
 424         status = "okay";
 425         phy-handle = <&qca8075_0>;
 426         label = "lan4";
 427         nvmem-cells = <&macaddr_dp1>;
 428         nvmem-cell-names = "mac-address";
 429 };
 430
 431 &dp2 {
 432         status = "okay";
 433         phy-handle = <&qca8075_1>;
 434         label = "lan3";
 435         nvmem-cells = <&macaddr_dp2>;
 436         nvmem-cell-names = "mac-address";
 437 };
 438
 439 &dp3 {
 440         status = "okay";
 441         phy-handle = <&qca8075_2>;
 442         label = "lan2";
 443         nvmem-cells = <&macaddr_dp3>;
 444         nvmem-cell-names = "mac-address";
 445 };
 446
 447 &dp4 {
 448         status = "okay";
 449         phy-handle = <&qca8075_3>;
 450         label = "lan1";
 451         nvmem-cells = <&macaddr_dp4>;
 452         nvmem-cell-names = "mac-address";
 453 };
 454
 455 &dp5 {
 456         status = "okay";
 457         phy-handle = <&qca8081>;
 458         label = "wan";
 459         nvmem-cells = <&macaddr_dp5>;
 460         nvmem-cell-names = "mac-address";
 461 };
 462
 463 &pcie_qmp0 {
 464         status = "okay";
 465 };
 466
 467 &pcie0 {
 468         status = "okay";
 469
 470         perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
 471
 472         bridge@0,0 {
 473                 reg = <0x00000000 0 0 0 0>;
 474                 #address-cells = <3>;
 475                 #size-cells = <2>;
 476                 ranges;
 477
 478                 wifi@1,0 {
 479                         status = "okay";
 480
 481                         /* ath11k has no DT compatible for PCI cards */
 482                         compatible = "pci17cb,1104";
 483                         reg = <0x00010000 0 0 0 0>;
 484
 485                         qcom,ath11k-calibration-variant = "Xiaomi-AX9000";
 486                 };
 487         };
 488 };
 489
 490 &pcie_qmp1 {
 491         status = "okay";
 492 };
 493
 494 &pcie1 {
 495         status = "okay";
 496
 497         perst-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
 498
 499         bridge@1,0 {
 500                 reg = <0x00010000 0 0 0 0>;
 501                 #address-cells = <3>;
 502                 #size-cells = <2>;
 503                 ranges;
 504
 505                 wifi@1,0 {
 506                         status = "okay";
 507
 508                         compatible = "qcom,ath10k";
 509                         reg = <0x00010000 0 0 0 0>;
 510
 511                         qcom,ath10k-calibration-variant = "Xiaomi-AX9000";
 512                         nvmem-cell-names = "calibration";
 513                         nvmem-cells = <&caldata_qca9889>;
 514                 };
 515         };
 516 };
 517
 518 &wifi {
 519         status = "okay";
 520
 521         qcom,ath11k-calibration-variant = "Xiaomi-AX9000";
 522 };