d4c85a06a53c3926d7ccaa1bbdbeb50842ec8506
[openwrt/staging/jow.git] / target / linux / ipq806x / patches-5.10 / 104-1-drivers-thermal-tsens-Add-VER_0-tsens-version.patch
1 From 5c7d1181056feef0b58fb2f556f55e170ba5b479 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Sat, 25 Jul 2020 19:14:59 +0200
4 Subject: [PATCH 01/10] drivers: thermal: tsens: Add VER_0 tsens version
5
6 VER_0 is used to describe device based on tsens version before v0.1.
7 These device are devices based on msm8960 for example apq8064 or
8 ipq806x.
9
10 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
11 Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
12 Reported-by: kernel test robot <lkp@intel.com>
13 Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
14 ---
15 drivers/thermal/qcom/tsens.c | 150 ++++++++++++++++++++++++++++-------
16 drivers/thermal/qcom/tsens.h | 4 +-
17 2 files changed, 124 insertions(+), 30 deletions(-)
18
19 diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
20 index d8ce3a687b80..9a7e991d4bd2 100644
21 --- a/drivers/thermal/qcom/tsens.c
22 +++ b/drivers/thermal/qcom/tsens.c
23 @@ -12,6 +12,7 @@
24 #include <linux/of.h>
25 #include <linux/of_address.h>
26 #include <linux/of_platform.h>
27 +#include <linux/mfd/syscon.h>
28 #include <linux/platform_device.h>
29 #include <linux/pm.h>
30 #include <linux/regmap.h>
31 @@ -515,6 +516,15 @@ static irqreturn_t tsens_irq_thread(int irq, void *data)
32 dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
33 hw_id, __func__, temp);
34 }
35 +
36 + if (tsens_version(priv) < VER_0_1) {
37 + /* Constraint: There is only 1 interrupt control register for all
38 + * 11 temperature sensor. So monitoring more than 1 sensor based
39 + * on interrupts will yield inconsistent result. To overcome this
40 + * issue we will monitor only sensor 0 which is the master sensor.
41 + */
42 + break;
43 + }
44 }
45
46 return IRQ_HANDLED;
47 @@ -530,6 +540,13 @@ static int tsens_set_trips(void *_sensor, int low, int high)
48 int high_val, low_val, cl_high, cl_low;
49 u32 hw_id = s->hw_id;
50
51 + if (tsens_version(priv) < VER_0_1) {
52 + /* Pre v0.1 IP had a single register for each type of interrupt
53 + * and thresholds
54 + */
55 + hw_id = 0;
56 + }
57 +
58 dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
59 hw_id, __func__, low, high);
60
61 @@ -584,18 +601,21 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp)
62 u32 valid;
63 int ret;
64
65 - ret = regmap_field_read(priv->rf[valid_idx], &valid);
66 - if (ret)
67 - return ret;
68 - while (!valid) {
69 - /* Valid bit is 0 for 6 AHB clock cycles.
70 - * At 19.2MHz, 1 AHB clock is ~60ns.
71 - * We should enter this loop very, very rarely.
72 - */
73 - ndelay(400);
74 + /* VER_0 doesn't have VALID bit */
75 + if (tsens_version(priv) >= VER_0_1) {
76 ret = regmap_field_read(priv->rf[valid_idx], &valid);
77 if (ret)
78 return ret;
79 + while (!valid) {
80 + /* Valid bit is 0 for 6 AHB clock cycles.
81 + * At 19.2MHz, 1 AHB clock is ~60ns.
82 + * We should enter this loop very, very rarely.
83 + */
84 + ndelay(400);
85 + ret = regmap_field_read(priv->rf[valid_idx], &valid);
86 + if (ret)
87 + return ret;
88 + }
89 }
90
91 /* Valid bit is set, OK to read the temperature */
92 @@ -608,15 +628,29 @@ int get_temp_common(const struct tsens_sensor *s, int *temp)
93 {
94 struct tsens_priv *priv = s->priv;
95 int hw_id = s->hw_id;
96 - int last_temp = 0, ret;
97 + int last_temp = 0, ret, trdy;
98 + unsigned long timeout;
99
100 - ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
101 - if (ret)
102 - return ret;
103 + timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
104 + do {
105 + if (tsens_version(priv) == VER_0) {
106 + ret = regmap_field_read(priv->rf[TRDY], &trdy);
107 + if (ret)
108 + return ret;
109 + if (!trdy)
110 + continue;
111 + }
112
113 - *temp = code_to_degc(last_temp, s) * 1000;
114 + ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
115 + if (ret)
116 + return ret;
117
118 - return 0;
119 + *temp = code_to_degc(last_temp, s) * 1000;
120 +
121 + return 0;
122 + } while (time_before(jiffies, timeout));
123 +
124 + return -ETIMEDOUT;
125 }
126
127 #ifdef CONFIG_DEBUG_FS
128 @@ -738,19 +772,34 @@ int __init init_common(struct tsens_priv *priv)
129 priv->tm_offset = 0x1000;
130 }
131
132 - res = platform_get_resource(op, IORESOURCE_MEM, 0);
133 - tm_base = devm_ioremap_resource(dev, res);
134 - if (IS_ERR(tm_base)) {
135 - ret = PTR_ERR(tm_base);
136 - goto err_put_device;
137 + if (tsens_version(priv) >= VER_0_1) {
138 + res = platform_get_resource(op, IORESOURCE_MEM, 0);
139 + tm_base = devm_ioremap_resource(dev, res);
140 + if (IS_ERR(tm_base)) {
141 + ret = PTR_ERR(tm_base);
142 + goto err_put_device;
143 + }
144 +
145 + priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
146 + } else { /* VER_0 share the same gcc regs using a syscon */
147 + struct device *parent = priv->dev->parent;
148 +
149 + if (parent)
150 + priv->tm_map = syscon_node_to_regmap(parent->of_node);
151 }
152
153 - priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
154 - if (IS_ERR(priv->tm_map)) {
155 - ret = PTR_ERR(priv->tm_map);
156 + if (IS_ERR_OR_NULL(priv->tm_map)) {
157 + if (!priv->tm_map)
158 + ret = -ENODEV;
159 + else
160 + ret = PTR_ERR(priv->tm_map);
161 goto err_put_device;
162 }
163
164 + /* VER_0 have only tm_map */
165 + if (!priv->srot_map)
166 + priv->srot_map = priv->tm_map;
167 +
168 if (tsens_version(priv) > VER_0_1) {
169 for (i = VER_MAJOR; i <= VER_STEP; i++) {
170 priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
171 @@ -769,6 +818,10 @@ int __init init_common(struct tsens_priv *priv)
172 ret = PTR_ERR(priv->rf[TSENS_EN]);
173 goto err_put_device;
174 }
175 + /* in VER_0 TSENS need to be explicitly enabled */
176 + if (tsens_version(priv) == VER_0)
177 + regmap_field_write(priv->rf[TSENS_EN], 1);
178 +
179 ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
180 if (ret)
181 goto err_put_device;
182 @@ -791,6 +844,19 @@ int __init init_common(struct tsens_priv *priv)
183 goto err_put_device;
184 }
185
186 + priv->rf[TSENS_SW_RST] =
187 + devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_SW_RST]);
188 + if (IS_ERR(priv->rf[TSENS_SW_RST])) {
189 + ret = PTR_ERR(priv->rf[TSENS_SW_RST]);
190 + goto err_put_device;
191 + }
192 +
193 + priv->rf[TRDY] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]);
194 + if (IS_ERR(priv->rf[TRDY])) {
195 + ret = PTR_ERR(priv->rf[TRDY]);
196 + goto err_put_device;
197 + }
198 +
199 /* This loop might need changes if enum regfield_ids is reordered */
200 for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
201 for (i = 0; i < priv->feat->max_sensors; i++) {
202 @@ -806,7 +872,7 @@ int __init init_common(struct tsens_priv *priv)
203 }
204 }
205
206 - if (priv->feat->crit_int) {
207 + if (priv->feat->crit_int || tsens_version(priv) < VER_0_1) {
208 /* Loop might need changes if enum regfield_ids is reordered */
209 for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) {
210 for (i = 0; i < priv->feat->max_sensors; i++) {
211 @@ -844,7 +910,11 @@ int __init init_common(struct tsens_priv *priv)
212 }
213
214 spin_lock_init(&priv->ul_lock);
215 - tsens_enable_irq(priv);
216 +
217 + /* VER_0 interrupt doesn't need to be enabled */
218 + if (tsens_version(priv) >= VER_0_1)
219 + tsens_enable_irq(priv);
220 +
221 tsens_debug_init(op);
222
223 err_put_device:
224 @@ -943,10 +1013,19 @@ static int tsens_register_irq(struct tsens_priv *priv, char *irqname,
225 if (irq == -ENXIO)
226 ret = 0;
227 } else {
228 - ret = devm_request_threaded_irq(&pdev->dev, irq,
229 - NULL, thread_fn,
230 - IRQF_ONESHOT,
231 - dev_name(&pdev->dev), priv);
232 + /* VER_0 interrupt is TRIGGER_RISING, VER_0_1 and up is ONESHOT */
233 + if (tsens_version(priv) == VER_0)
234 + ret = devm_request_threaded_irq(&pdev->dev, irq,
235 + thread_fn, NULL,
236 + IRQF_TRIGGER_RISING,
237 + dev_name(&pdev->dev),
238 + priv);
239 + else
240 + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
241 + thread_fn, IRQF_ONESHOT,
242 + dev_name(&pdev->dev),
243 + priv);
244 +
245 if (ret)
246 dev_err(&pdev->dev, "%s: failed to get irq\n",
247 __func__);
248 @@ -975,6 +1054,19 @@ static int tsens_register(struct tsens_priv *priv)
249 priv->ops->enable(priv, i);
250 }
251
252 + /* VER_0 require to set MIN and MAX THRESH
253 + * These 2 regs are set using the:
254 + * - CRIT_THRESH_0 for MAX THRESH hardcoded to 120°C
255 + * - CRIT_THRESH_1 for MIN THRESH hardcoded to 0°C
256 + */
257 + if (tsens_version(priv) < VER_0_1) {
258 + regmap_field_write(priv->rf[CRIT_THRESH_0],
259 + tsens_mC_to_hw(priv->sensor, 120000));
260 +
261 + regmap_field_write(priv->rf[CRIT_THRESH_1],
262 + tsens_mC_to_hw(priv->sensor, 0));
263 + }
264 +
265 ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
266 if (ret < 0)
267 return ret;
268 diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
269 index f40b625f897e..8e6c1fd3ccf5 100644
270 --- a/drivers/thermal/qcom/tsens.h
271 +++ b/drivers/thermal/qcom/tsens.h
272 @@ -13,6 +13,7 @@
273 #define CAL_DEGC_PT2 120
274 #define SLOPE_FACTOR 1000
275 #define SLOPE_DEFAULT 3200
276 +#define TIMEOUT_US 100
277 #define THRESHOLD_MAX_ADC_CODE 0x3ff
278 #define THRESHOLD_MIN_ADC_CODE 0x0
279
280 @@ -25,7 +26,8 @@ struct tsens_priv;
281
282 /* IP version numbers in ascending order */
283 enum tsens_ver {
284 - VER_0_1 = 0,
285 + VER_0 = 0,
286 + VER_0_1,
287 VER_1_X,
288 VER_2_X,
289 };
290 --
291 2.30.2
292