04f4b7cd023834769244f1892b254268fad78360
[openwrt/staging/jow.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8062-wg2600hp3.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq8062-smb208.dtsi"
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6
7 / {
8 model = "NEC Platforms Aterm WG2600HP3";
9 compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064";
10
11 memory {
12 device_type = "memory";
13 reg = <0x42000000 0x1e000000>;
14 };
15
16 aliases {
17 label-mac-device = &gmac2;
18
19 led-boot = &led_power_green;
20 led-failsafe = &led_power_red;
21 led-running = &led_power_green;
22 led-upgrade = &led_power_red;
23 };
24
25 keys {
26 compatible = "gpio-keys";
27
28 pinctrl-0 = <&buttons_pins>;
29 pinctrl-names = "default";
30
31 reset {
32 label = "reset";
33 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_RESTART>;
35 debounce-interval = <60>;
36 wakeup-source;
37 };
38
39 wps {
40 label = "wps";
41 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_WPS_BUTTON>;
43 debounce-interval = <60>;
44 wakeup-source;
45 };
46
47 mode0 {
48 label = "mode0";
49 gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
50 linux,code = <BTN_0>;
51 linux,input-type = <EV_SW>;
52 debounce-interval = <60>;
53 wakeup-source;
54 };
55
56 mode1 {
57 label = "mode1";
58 gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
59 linux,code = <BTN_1>;
60 linux,input-type = <EV_SW>;
61 debounce-interval = <60>;
62 wakeup-source;
63 };
64 };
65
66 leds {
67 compatible = "gpio-leds";
68
69 pinctrl-0 = <&leds_pins>;
70 pinctrl-names = "default";
71
72 led_power_green: power_green {
73 label = "green:power";
74 gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
75 };
76
77 led_power_red: power_red {
78 label = "red:power";
79 gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>;
80 };
81
82 active_green {
83 label = "green:active";
84 gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>;
85 };
86
87 active_red {
88 label = "red:active";
89 gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>;
90 };
91
92 wlan2g_green {
93 label = "green:wlan2g";
94 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
95 linux,default-trigger = "phy1tpt";
96 };
97
98 wlan2g_red {
99 label = "red:wlan2g";
100 gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
101 };
102
103 wlan5g_green {
104 label = "green:wlan5g";
105 gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
106 linux,default-trigger = "phy0tpt";
107 };
108
109 wlan5g_red {
110 label = "red:wlan5g";
111 gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
112 };
113
114 tv_green {
115 label = "green:tv";
116 gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>;
117 };
118
119 tv_red {
120 label = "red:tv";
121 gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>;
122 };
123
124 converter_green {
125 label = "green:converter";
126 gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>;
127 };
128
129 converter_red {
130 label = "red:converter";
131 gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
132 };
133 };
134 };
135
136 /* nand_pins are used for leds_pins, empty the node
137 * from ipq8064.dtsi
138 */
139 &nand_pins {
140 /delete-property/ disable;
141 /delete-property/ pullups;
142 /delete-property/ hold;
143 };
144
145 &qcom_pinmux {
146 pinctrl-0 = <&akro_pins>;
147 pinctrl-names = "default";
148
149 spi_pins: spi_pins {
150 mux {
151 pins = "gpio18", "gpio19", "gpio21";
152 function = "gsbi5";
153 bias-pull-down;
154 };
155
156 data {
157 pins = "gpio18", "gpio19";
158 drive-strength = <10>;
159 };
160
161 cs {
162 pins = "gpio20";
163 drive-strength = <10>;
164 };
165
166 clk {
167 pins = "gpio21";
168 drive-strength = <12>;
169 };
170 };
171
172 buttons_pins: buttons_pins {
173 mux {
174 pins = "gpio22", "gpio24", "gpio40",
175 "gpio41";
176 function = "gpio";
177 drive-strength = <2>;
178 bias-pull-up;
179 };
180 };
181
182 leds_pins: leds_pins {
183 mux {
184 pins = "gpio14", "gpio15", "gpio35",
185 "gpio36", "gpio38", "gpio42",
186 "gpio43", "gpio46", "gpio55",
187 "gpio56", "gpio57", "gpio58";
188 function = "gpio";
189 bias-pull-down;
190 };
191
192 akro2 {
193 pins = "gpio15", "gpio35", "gpio38",
194 "gpio42", "gpio43", "gpio46",
195 "gpio55", "gpio56", "gpio57",
196 "gpio58";
197 drive-strength = <2>;
198 };
199
200 akro4 {
201 pins = "gpio14", "gpio36";
202 drive-strength = <4>;
203 };
204 };
205
206 /*
207 * Stock firmware has the following settings, so let's do the same.
208 * I don't sure why these are required.
209 */
210 akro_pins: akro_pinmux {
211 akro {
212 pins = "gpio17", "gpio26", "gpio47";
213 function = "gpio";
214 drive-strength = <2>;
215 bias-pull-down;
216 };
217
218 reset {
219 pins = "gpio45";
220 function = "gpio";
221 drive-strength = <2>;
222 bias-disable;
223 output-low;
224 };
225
226 gmac0_rgmii {
227 pins = "gpio25";
228 function = "gpio";
229 drive-strength = <8>;
230 bias-disable;
231 };
232 };
233 };
234
235 &gsbi5 {
236 status = "okay";
237 qcom,mode = <GSBI_PROT_SPI>;
238
239 spi@1a280000 {
240 status = "okay";
241
242 pinctrl-0 = <&spi_pins>;
243 pinctrl-names = "default";
244
245 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
246
247 flash@0 {
248 compatible = "jedec,spi-nor";
249 reg = <0>;
250 spi-max-frequency = <50000000>;
251 m25p,fast-read;
252
253 partitions {
254 compatible = "fixed-partitions";
255 #address-cells = <1>;
256 #size-cells = <1>;
257
258 partition@0 {
259 label = "SBL1";
260 reg = <0x0000000 0x0020000>;
261 read-only;
262 };
263
264 partition@20000 {
265 label = "MIBIB";
266 reg = <0x0020000 0x0020000>;
267 read-only;
268 };
269
270 partition@40000 {
271 label = "SBL2";
272 reg = <0x0040000 0x0040000>;
273 read-only;
274 };
275
276 partition@80000 {
277 label = "SBL3";
278 reg = <0x0080000 0x0080000>;
279 read-only;
280 };
281
282 partition@100000 {
283 label = "DDRCONFIG";
284 reg = <0x0100000 0x0010000>;
285 read-only;
286 };
287
288 partition@110000 {
289 label = "SSD";
290 reg = <0x0110000 0x0010000>;
291 read-only;
292 };
293
294 partition@120000 {
295 label = "TZ";
296 reg = <0x0120000 0x0080000>;
297 read-only;
298 };
299
300 partition@1a0000 {
301 label = "RPM";
302 reg = <0x01a0000 0x0080000>;
303 read-only;
304 };
305
306 partition@220000 {
307 label = "APPSBL";
308 reg = <0x0220000 0x0080000>;
309 read-only;
310 };
311
312 partition@2a0000 {
313 label = "APPSBLENV";
314 reg = <0x02a0000 0x0010000>;
315 read-only;
316 };
317
318 factory: partition@2b0000 {
319 label = "PRODUCTDATA";
320 reg = <0x02b0000 0x0030000>;
321 read-only;
322 };
323
324 partition@2e0000 {
325 label = "ART";
326 reg = <0x02e0000 0x0040000>;
327 read-only;
328 compatible = "nvmem-cells";
329 #address-cells = <1>;
330 #size-cells = <1>;
331
332 precal_ART_1000: precal@1000 {
333 reg = <0x1000 0x2f20>;
334 };
335
336 precal_ART_5000: precal@5000 {
337 reg = <0x5000 0x2f20>;
338 };
339 };
340
341 partition@320000 {
342 label = "TP";
343 reg = <0x0320000 0x0040000>;
344 read-only;
345 };
346
347 partition@360000 {
348 label = "TINY";
349 reg = <0x0360000 0x0500000>;
350 read-only;
351 };
352
353 partition@860000 {
354 compatible = "denx,uimage";
355 label = "firmware";
356 reg = <0x0860000 0x17a0000>;
357 };
358 };
359 };
360 };
361 };
362
363 &adm_dma {
364 status = "okay";
365 };
366
367 &pcie0 {
368 status = "okay";
369
370 bridge@0,0 {
371 reg = <0x00000000 0 0 0 0>;
372 #address-cells = <3>;
373 #size-cells = <2>;
374 ranges;
375
376 wifi@1,0 {
377 compatible = "qcom,ath10k";
378 reg = <0x00010000 0 0 0 0>;
379
380 qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
381
382 nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
383 nvmem-cell-names = "mac-address", "pre-calibration";
384 };
385 };
386 };
387
388 &pcie1 {
389 status = "okay";
390 force_gen1 = <1>;
391
392 bridge@0,0 {
393 reg = <0x00000000 0 0 0 0>;
394 #address-cells = <3>;
395 #size-cells = <2>;
396 ranges;
397
398 wifi@1,0 {
399 compatible = "qcom,ath10k";
400 reg = <0x00010000 0 0 0 0>;
401
402 ieee80211-freq-limit = <2400000 2483000>;
403 qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
404
405 nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
406 nvmem-cell-names = "mac-address", "pre-calibration";
407 };
408 };
409 };
410
411 &mdio0 {
412 status = "okay";
413
414 pinctrl-0 = <&mdio0_pins>;
415 pinctrl-names = "default";
416
417 switch@10 {
418 compatible = "qca,qca8337";
419 #address-cells = <1>;
420 #size-cells = <0>;
421 reg = <0x10>;
422
423 ports {
424 #address-cells = <1>;
425 #size-cells = <0>;
426
427 port@0 {
428 reg = <0>;
429 label = "cpu";
430 ethernet = <&gmac1>;
431 phy-mode = "rgmii";
432 tx-internal-delay-ps = <1000>;
433
434 fixed-link {
435 speed = <1000>;
436 full-duplex;
437 };
438 };
439
440 port@1 {
441 reg = <1>;
442 label = "wan";
443 phy-mode = "internal";
444 phy-handle = <&phy_port1>;
445
446 leds {
447 #address-cells = <1>;
448 #size-cells = <0>;
449
450 led@0 {
451 reg = <0>;
452 color = <LED_COLOR_ID_GREEN>;
453 function = LED_FUNCTION_WAN;
454 function-enumerator = <1>;
455 default-state = "keep";
456 };
457
458 led@1 {
459 reg = <1>;
460 color = <LED_COLOR_ID_GREEN>;
461 function = LED_FUNCTION_WAN;
462 function-enumerator = <2>;
463 default-state = "keep";
464 };
465
466 led@2 {
467 reg = <2>;
468 color = <LED_COLOR_ID_GREEN>;
469 function = LED_FUNCTION_WAN;
470 function-enumerator = <3>;
471 default-state = "keep";
472 };
473 };
474 };
475
476 port@2 {
477 reg = <2>;
478 label = "lan1";
479 phy-mode = "internal";
480 phy-handle = <&phy_port2>;
481
482 leds {
483 #address-cells = <1>;
484 #size-cells = <0>;
485
486 led@0 {
487 reg = <0>;
488 color = <LED_COLOR_ID_GREEN>;
489 function = LED_FUNCTION_LAN;
490 function-enumerator = <1>;
491 default-state = "keep";
492 };
493
494 led@1 {
495 reg = <1>;
496 color = <LED_COLOR_ID_GREEN>;
497 function = LED_FUNCTION_LAN;
498 function-enumerator = <2>;
499 default-state = "keep";
500 };
501
502 led@2 {
503 reg = <2>;
504 color = <LED_COLOR_ID_GREEN>;
505 function = LED_FUNCTION_LAN;
506 function-enumerator = <3>;
507 default-state = "keep";
508 };
509 };
510 };
511
512 port@3 {
513 reg = <3>;
514 label = "lan2";
515 phy-mode = "internal";
516 phy-handle = <&phy_port3>;
517
518 leds {
519 #address-cells = <1>;
520 #size-cells = <0>;
521
522 led@0 {
523 reg = <0>;
524 color = <LED_COLOR_ID_GREEN>;
525 function = LED_FUNCTION_LAN;
526 function-enumerator = <1>;
527 default-state = "keep";
528 };
529
530 led@1 {
531 reg = <1>;
532 color = <LED_COLOR_ID_GREEN>;
533 function = LED_FUNCTION_LAN;
534 function-enumerator = <2>;
535 default-state = "keep";
536 };
537
538 led@2 {
539 reg = <2>;
540 color = <LED_COLOR_ID_GREEN>;
541 function = LED_FUNCTION_LAN;
542 function-enumerator = <3>;
543 default-state = "keep";
544 };
545 };
546 };
547
548 port@4 {
549 reg = <4>;
550 label = "lan3";
551 phy-mode = "internal";
552 phy-handle = <&phy_port4>;
553
554 leds {
555 #address-cells = <1>;
556 #size-cells = <0>;
557
558 led@0 {
559 reg = <0>;
560 color = <LED_COLOR_ID_GREEN>;
561 function = LED_FUNCTION_LAN;
562 function-enumerator = <1>;
563 default-state = "keep";
564 };
565
566 led@1 {
567 reg = <1>;
568 color = <LED_COLOR_ID_GREEN>;
569 function = LED_FUNCTION_LAN;
570 function-enumerator = <2>;
571 default-state = "keep";
572 };
573
574 led@2 {
575 reg = <2>;
576 color = <LED_COLOR_ID_GREEN>;
577 function = LED_FUNCTION_LAN;
578 function-enumerator = <3>;
579 default-state = "keep";
580 };
581 };
582 };
583
584 port@5 {
585 reg = <5>;
586 label = "lan4";
587 phy-mode = "internal";
588 phy-handle = <&phy_port5>;
589
590 leds {
591 #address-cells = <1>;
592 #size-cells = <0>;
593
594 led@0 {
595 reg = <0>;
596 color = <LED_COLOR_ID_GREEN>;
597 function = LED_FUNCTION_LAN;
598 function-enumerator = <1>;
599 default-state = "keep";
600 };
601
602 led@1 {
603 reg = <1>;
604 color = <LED_COLOR_ID_GREEN>;
605 function = LED_FUNCTION_LAN;
606 function-enumerator = <2>;
607 default-state = "keep";
608 };
609
610 led@2 {
611 reg = <2>;
612 color = <LED_COLOR_ID_GREEN>;
613 function = LED_FUNCTION_LAN;
614 function-enumerator = <3>;
615 default-state = "keep";
616 };
617 };
618 };
619
620 port@6 {
621 reg = <6>;
622 label = "cpu";
623 ethernet = <&gmac2>;
624 phy-mode = "sgmii";
625 qca,sgmii-enable-pll;
626 qca,sgmii-rxclk-falling-edge;
627
628 fixed-link {
629 speed = <1000>;
630 full-duplex;
631 };
632 };
633 };
634
635 mdio {
636 #address-cells = <1>;
637 #size-cells = <0>;
638
639 phy_port1: phy@0 {
640 reg = <0>;
641 };
642
643 phy_port2: phy@1 {
644 reg = <1>;
645 };
646
647 phy_port3: phy@2 {
648 reg = <2>;
649 };
650
651 phy_port4: phy@3 {
652 reg = <3>;
653 };
654
655 phy_port5: phy@4 {
656 reg = <4>;
657 };
658 };
659 };
660 };
661
662 &gmac1 {
663 status = "okay";
664
665 pinctrl-0 = <&rgmii2_pins>;
666 pinctrl-names = "default";
667
668 phy-mode = "rgmii";
669 qcom,id = <1>;
670 mdiobus = <&mdio0>;
671 nvmem-cells = <&macaddr_factory_0>;
672 nvmem-cell-names = "mac-address";
673
674 fixed-link {
675 speed = <1000>;
676 full-duplex;
677 };
678 };
679
680 &gmac2 {
681 status = "okay";
682 phy-mode = "sgmii";
683 qcom,id = <2>;
684 mdiobus = <&mdio0>;
685 nvmem-cells = <&macaddr_factory_6>;
686 nvmem-cell-names = "mac-address";
687
688 fixed-link {
689 speed = <1000>;
690 full-duplex;
691 };
692 };
693
694 &factory {
695 compatible = "nvmem-cells";
696 #address-cells = <1>;
697 #size-cells = <1>;
698
699 macaddr_factory_0: macaddr@0 {
700 reg = <0x0 0x6>;
701 };
702
703 macaddr_factory_6: macaddr@6 {
704 reg = <0x6 0x6>;
705 };
706
707 macaddr_PRODUCTDATA_c: macaddr@c {
708 reg = <0xc 0x6>;
709 };
710
711 macaddr_PRODUCTDATA_12: macaddr@12 {
712 reg = <0x12 0x6>;
713 };
714 };
715
716 &hs_phy_0 {
717 status = "okay";
718 };
719
720 &ss_phy_0 {
721 status = "okay";
722 };
723
724 &usb3_0 {
725 status = "okay";
726 };
727
728 &hs_phy_1 {
729 status = "okay";
730 };
731
732 &ss_phy_1 {
733 status = "okay";
734 };
735
736 &usb3_1 {
737 status = "okay";
738 };