target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "GL.iNet GL-B2200";
  10         compatible = "glinet,gl-b2200", "qcom,ipq4019";
  11
  12         memory {
  13                 device_type = "memory";
  14                 reg = <0x80000000 0x10000000>;
  15         };
  16
  17         chosen {
  18                 bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused";
  19         };
  20
  21         aliases {
  22                 ethernet1 = &swport4;
  23         };
  24
  25         soc {
  26                 rng@22000 {
  27                         status = "okay";
  28                 };
  29
  30                 mdio@90000 {
  31                         status = "okay";
  32                 };
  33
  34                 tcsr@1949000 {
  35                         compatible = "qcom,tcsr";
  36                         reg = <0x1949000 0x100>;
  37                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  38                 };
  39
  40                 tcsr@194b000 {
  41                         /* select hostmode */
  42                         compatible = "qcom,tcsr";
  43                         reg = <0x194b000 0x100>;
  44                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  45                         status = "okay";
  46                 };
  47
  48                 ess_tcsr@1953000 {
  49                         compatible = "qcom,tcsr";
  50                         reg = <0x1953000 0x1000>;
  51                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  52                 };
  53
  54                 tcsr@1957000 {
  55                         compatible = "qcom,tcsr";
  56                         reg = <0x1957000 0x100>;
  57                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  58                 };
  59
  60                 crypto@8e3a000 {
  61                         status = "okay";
  62                 };
  63         };
  64
  65         keys {
  66                 compatible = "gpio-keys";
  67
  68                 wps {
  69                         label = "wps";
  70                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  71                         linux,code = <KEY_WPS_BUTTON>;
  72                         linux,input-type = <1>;
  73                 };
  74
  75                 reset {
  76                         label = "reset";
  77                         gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
  78                         linux,code = <KEY_RESTART>;
  79                         linux,input-type = <1>;
  80                 };
  81         };
  82
  83         leds {
  84                 compatible = "gpio-leds";
  85
  86                 power_blue {
  87                         label = "blue:power";
  88                         gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
  89                         default-state = "on";
  90                 };
  91                 internet_blue {
  92                         label = "blue:internet";
  93                         gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
  94                 };
  95                 power_white {
  96                         label = "white:power";
  97                         gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
  98                 };
  99                 internet_white {
 100                         label = "white:internet";
 101                         gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
 102                 };
 103         };
 104 };
 105
 106 &vqmmc {
 107         status = "okay";
 108 };
 109
 110 &sdhci {
 111         status = "okay";
 112         pinctrl-0 = <&sd_pins>;
 113         pinctrl-names = "default";
 114         cd-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
 115         vqmmc-supply = <&vqmmc>;
 116 };
 117
 118 &blsp_dma {
 119         status = "okay";
 120 };
 121
 122 &cryptobam {
 123         status = "okay";
 124 };
 125
 126 &blsp1_spi1 {
 127         pinctrl-0 = <&spi_0_pins>;
 128         pinctrl-names = "default";
 129         status = "okay";
 130         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 131
 132         flash@0 {
 133                 compatible = "jedec,spi-nor";
 134                 reg = <0>;
 135                 spi-max-frequency = <24000000>;
 136
 137                 partitions {
 138                         compatible = "fixed-partitions";
 139                         #address-cells = <1>;
 140                         #size-cells = <1>;
 141
 142                         partition@0 {
 143                                 label = "SBL1";
 144                                 reg = <0x0 0x40000>;
 145                                 read-only;
 146                         };
 147
 148                         partition@40000 {
 149                                 label = "MIBIB";
 150                                 reg = <0x40000 0x20000>;
 151                                 read-only;
 152                         };
 153
 154                         partition@60000 {
 155                                 label = "QSEE";
 156                                 reg = <0x60000 0x60000>;
 157                                 read-only;
 158                         };
 159
 160                         partition@c0000 {
 161                                 label = "CDT";
 162                                 reg = <0xc0000 0x10000>;
 163                                 read-only;
 164                         };
 165
 166                         partition@d0000 {
 167                                 label = "DDRPARAMS";
 168                                 reg = <0xd0000 0x10000>;
 169                                 read-only;
 170                         };
 171
 172                         partition@e0000 {
 173                                 label = "APPSBLENV";
 174                                 reg = <0xe0000 0x10000>;
 175                                 read-only;
 176                         };
 177
 178                         partition@f0000 {
 179                                 label = "APPSBL";
 180                                 reg = <0xf0000 0x80000>;
 181                                 read-only;
 182                         };
 183
 184                         partition@170000 {
 185                                 label = "ART";
 186                                 reg = <0x170000 0x10000>;
 187                                 read-only;
 188                                 compatible = "nvmem-cells";
 189                                 #address-cells = <1>;
 190                                 #size-cells = <1>;
 191
 192                                 precal_art_1000: precal@1000 {
 193                                         reg = <0x1000 0x2f20>;
 194                                 };
 195
 196                                 precal_art_5000: precal@5000 {
 197                                         reg = <0x5000 0x2f20>;
 198                                 };
 199
 200                                 precal_art_9000: precal@9000 {
 201                                         reg = <0x9000 0x2f20>;
 202                                 };
 203                         };
 204                 };
 205         };
 206 };
 207
 208 &blsp1_spi2 {
 209         pinctrl-0 = <&spi_1_pins>;
 210         pinctrl-names = "default";
 211         status = "okay";
 212
 213         spidev1: spi@0 {
 214                 compatible = "silabs,si3210";
 215                 reg = <0>;
 216                 spi-max-frequency = <24000000>;
 217         };
 218 };
 219
 220 &blsp1_uart1 {
 221         pinctrl-0 = <&serial_pins>;
 222         pinctrl-names = "default";
 223         status = "okay";
 224 };
 225
 226 &blsp1_uart2 {
 227         pinctrl-0 = <&serial_1_pins>;
 228         pinctrl-names = "default";
 229         status = "okay";
 230 };
 231
 232 &tlmm {
 233         serial_pins: serial_pinmux {
 234                 mux {
 235                         pins = "gpio16", "gpio17";
 236                         function = "blsp_uart0";
 237                         bias-disable;
 238                 };
 239         };
 240
 241         serial_1_pins: serial1_pinmux {
 242                 mux {
 243                         pins = "gpio8", "gpio9",
 244                                 "gpio10", "gpio11";
 245                         function = "blsp_uart1";
 246                         bias-disable;
 247                 };
 248         };
 249
 250         spi_0_pins: spi_0_pinmux {
 251                 pinmux {
 252                         function = "blsp_spi0";
 253                         pins = "gpio13", "gpio14", "gpio15";
 254                 };
 255                 pinmux_cs {
 256                         function = "gpio";
 257                         pins = "gpio12";
 258                 };
 259                 pinconf {
 260                         pins = "gpio13", "gpio14", "gpio15";
 261                         drive-strength = <12>;
 262                         bias-disable;
 263                 };
 264                 pinconf_cs {
 265                         pins = "gpio12";
 266                         drive-strength = <2>;
 267                         bias-disable;
 268                         output-high;
 269                 };
 270         };
 271
 272         spi_1_pins: spi_1_pinmux {
 273                 mux {
 274                         pins = "gpio44", "gpio46", "gpio47";
 275                         function = "blsp_spi1";
 276                         bias-disable;
 277                 };
 278                 cs {
 279                         pins = "gpio45";
 280                         function = "gpio";
 281                         bias-pull-up;
 282                 };
 283                 reset {
 284                         pins = "gpio43";
 285                         function = "gpio";
 286                         output-high;
 287                 };
 288                 mux_2 {
 289                         pins = "gpio35";
 290                         function = "gpio";
 291                         output-high;
 292                 };
 293                 host_int {
 294                         pins = "gpio2";
 295                         function = "gpio";
 296                         input;
 297                 };
 298                 wake {
 299                         pins = "gpio48";
 300                         function = "gpio";
 301                         output-high;
 302                 };
 303         };
 304
 305         sd_pins: sd_pins {
 306                 pinmux {
 307                         function = "sdio";
 308                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 309                                 "gpio29", "gpio30", "gpio31", "gpio32";
 310                         drive-strength = <10>;
 311                 };
 312
 313                 pinmux_sd_clk {
 314                         function = "sdio";
 315                         pins = "gpio27";
 316                         drive-strength = <16>;
 317                 };
 318
 319                 pinmux_sd7 {
 320                         function = "sdio";
 321                         pins = "gpio28";
 322                         drive-strength = <10>;
 323                         bias-disable;
 324                 };
 325         };
 326
 327 };
 328
 329 &pcie0 {
 330         status = "okay";
 331         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 332         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 333
 334         bridge@0,0 {
 335                 reg = <0x00000000 0 0 0 0>;
 336                 #address-cells = <3>;
 337                 #size-cells = <2>;
 338                 ranges;
 339
 340                 wifi2: wifi@1,0 {
 341                         status = "okay";
 342                         /* Bootlog shows this is a 168c:0056 - QCA 9888v2 */
 343                         compatible = "qcom,ath10k";
 344                         reg = <0x00010000 0 0 0 0>;
 345                         nvmem-cell-names = "pre-calibration";
 346                         nvmem-cells = <&precal_art_9000>;
 347                         qcom,ath10k-calibration-variant = "GL-B2200";
 348                         ieee80211-freq-limit = <5450000 5900000>;
 349                 };
 350         };
 351 };
 352
 353 &gmac {
 354         status = "okay";
 355 };
 356
 357 &switch {
 358         status = "okay";
 359 };
 360
 361 &swport4 {
 362         status = "okay";
 363
 364         label = "wan";
 365 };
 366
 367 &swport5 {
 368         status = "okay";
 369
 370         label = "lan";
 371 };
 372
 373 &wifi0 {
 374         status = "okay";
 375         nvmem-cell-names = "pre-calibration";
 376         nvmem-cells = <&precal_art_1000>;
 377         qcom,ath10k-calibration-variant = "GL-B2200";
 378 };
 379
 380 &wifi1 {
 381         status = "okay";
 382         nvmem-cell-names = "pre-calibration";
 383         nvmem-cells = <&precal_art_5000>;
 384         qcom,ath10k-calibration-variant = "GL-B2200";
 385         ieee80211-freq-limit = <5100000 5400000>;
 386 };