target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         memory {
  11                 device_type = "memory";
  12                 reg = <0x80000000 0x10000000>;
  13         };
  14
  15         aliases {
  16                 serial0 = &blsp1_uart1;
  17         };
  18
  19         chosen {
  20                 stdout-path = "serial0:115200n8";
  21         };
  22
  23         soc {
  24                 tcsr@1949000 {
  25                         compatible = "qcom,tcsr";
  26                         reg = <0x1949000 0x100>;
  27                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  28                 };
  29
  30                 tcsr@194b000 {
  31                         status = "okay";
  32
  33                         compatible = "qcom,tcsr";
  34                         reg = <0x194b000 0x100>;
  35                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  36                 };
  37
  38                 ess_tcsr@1953000 {
  39                         compatible = "qcom,tcsr";
  40                         reg = <0x1953000 0x1000>;
  41                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  42                 };
  43
  44                 tcsr@1957000 {
  45                         compatible = "qcom,tcsr";
  46                         reg = <0x1957000 0x100>;
  47                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  48                 };
  49
  50                 keys {
  51                         compatible = "gpio-keys";
  52
  53                         reset {
  54                                 label = "reset";
  55                                 gpios = <&tlmm 4 1>;
  56                                 linux,code = <KEY_RESTART>;
  57                         };
  58                 };
  59         };
  60 };
  61
  62 &prng {
  63         status = "okay";
  64 };
  65
  66 &watchdog {
  67         status = "okay";
  68 };
  69
  70 &cryptobam {
  71         status = "okay";
  72 };
  73
  74 &crypto {
  75         status = "okay";
  76 };
  77
  78 &tlmm {
  79         serial_pins: serial_pinmux {
  80                 mux {
  81                         pins = "gpio60", "gpio61";
  82                         function = "blsp_uart0";
  83                         bias-disable;
  84                 };
  85         };
  86
  87         spi_0_pins: spi_0_pinmux {
  88                 pinmux {
  89                         function = "blsp_spi0";
  90                         pins = "gpio55", "gpio56", "gpio57";
  91                 };
  92                 pinmux_cs {
  93                         function = "gpio";
  94                         pins = "gpio54";
  95                 };
  96                 pinconf {
  97                         pins = "gpio55", "gpio56", "gpio57";
  98                         drive-strength = <12>;
  99                         bias-disable;
 100                 };
 101                 pinconf_cs {
 102                         pins = "gpio54";
 103                         drive-strength = <2>;
 104                         bias-disable;
 105                         output-high;
 106                 };
 107         };
 108
 109         mdio_pins: mdio_pinmux {
 110                 mux_1 {
 111                         pins = "gpio53";
 112                         function = "mdio";
 113                         bias-pull-up;
 114                 };
 115                 mux_2 {
 116                         pins = "gpio52";
 117                         function = "mdc";
 118                         bias-pull-up;
 119                 };
 120         };
 121
 122         i2c_0_pins: i2c_0_pinmux {
 123                 mux {
 124                         pins = "gpio58", "gpio59";
 125                         function = "blsp_i2c0";
 126                         bias-disable;
 127                 };
 128         };
 129 };
 130
 131 &blsp_dma {
 132         status = "okay";
 133 };
 134
 135 &blsp1_uart1 {
 136         pinctrl-0 = <&serial_pins>;
 137         pinctrl-names = "default";
 138         status = "okay";
 139 };
 140
 141 &blsp1_spi1 {
 142         pinctrl-0 = <&spi_0_pins>;
 143         pinctrl-names = "default";
 144         cs-gpios = <&tlmm 54 0>, <&tlmm 63 0>;
 145         num-cs = <2>;
 146         status = "okay";
 147
 148         xt25f128b@0 {
 149                 /*
 150                  * Factory U-boot looks in 0:BOOTCONFIG partition for active
 151                  * partitions settings and mangles the partition config so
 152                  * 0:QSEE/0:QSEE_1, 0:CDT/0:CDT_1 and  0:APPSBL/0:APPSBL_1 pairs
 153                  * can be swaped. It isn't a problem but we never can be sure where
 154                  * OFW put factory images. "n25q128a11" is required for proper nor
 155                  * recognition in u-boot.
 156                  */
 157                 compatible = "jedec,spi-nor", "n25q128a11";
 158                 #address-cells = <1>;
 159                 #size-cells = <1>;
 160                 reg = <0>;
 161                 spi-max-frequency = <24000000>;
 162
 163                 partitions {
 164                         compatible = "fixed-partitions";
 165                         #address-cells = <1>;
 166                         #size-cells = <1>;
 167
 168                         partition@0 {
 169                                 label = "0:SBL1";
 170                                 reg = <0x0 0x40000>;
 171                                 read-only;
 172                         };
 173
 174                         partition@40000 {
 175                                 label = "0:MIBIB";
 176                                 reg = <0x40000 0x20000>;
 177                                 read-only;
 178                         };
 179
 180                         partition@60000 {
 181                                 label = "0:BOOTCONFIG";
 182                                 reg = <0x60000 0x20000>;
 183                                 read-only;
 184                         };
 185
 186                         partition@80000 {
 187                                 label = "0:BOOTCONFIG1";
 188                                 reg = <0x80000 0x20000>;
 189                                 read-only;
 190                         };
 191
 192                         partition@a0000 {
 193                                 label = "0:QSEE";
 194                                 reg = <0xa0000 0x60000>;
 195                                 read-only;
 196                         };
 197
 198                         partition@100000 {
 199                                 label = "0:QSEE_1";
 200                                 reg = <0x100000 0x60000>;
 201                                 read-only;
 202                         };
 203
 204                         partition@160000 {
 205                                 label = "0:CDT";
 206                                 reg = <0x160000 0x10000>;
 207                                 read-only;
 208                         };
 209
 210                         partition@170000 {
 211                                 label = "0:CDT_1";
 212                                 reg = <0x170000 0x10000>;
 213                                 read-only;
 214                         };
 215
 216                         partition@180000 {
 217                                 label = "0:DDRPARAMS";
 218                                 reg = <0x180000 0x10000>;
 219                                 read-only;
 220                         };
 221
 222                         partition@190000 {
 223                                 label = "0:APPSBLENV";
 224                                 reg = <0x190000 0x10000>;
 225                                 read-only;
 226                         };
 227
 228                         partition@1a0000 {
 229                                 label = "0:APPSBL";
 230                                 reg = <0x1a0000 0xa0000>;
 231                                 read-only;
 232                         };
 233
 234                         partition@240000 {
 235                                 label = "0:APPSBL_1";
 236                                 reg = <0x240000 0xa0000>;
 237                                 read-only;
 238                         };
 239
 240                         partition@2e0000 {
 241                                 label = "0:ART";
 242                                 reg = <0x2e0000 0x10000>;
 243                                 read-only;
 244                         };
 245
 246                         config: partition@2f0000 {
 247                                 label = "0:CONFIG";
 248                                 reg = <0x2f0000 0x10000>;
 249                                 read-only;
 250                         };
 251
 252                         partition@300000 {
 253                                 label = "0:CONFIG_RW";
 254                                 reg = <0x300000 0x10000>;
 255                                 read-only;
 256                         };
 257
 258                         partition@310000 {
 259                                 label = "0:EVENTSLOG";
 260                                 reg = <0x310000 0x90000>;
 261                                 read-only;
 262                         };
 263                 };
 264         };
 265
 266         xt26g02a@1 {
 267                 /*
 268                  * Factory U-boot looks in 0:BOOTCONFIG partition for active
 269                  * partitions settings and mangles the partition config so
 270                  * rootfs/rootfs_1 pairs can be swaped.
 271                  * It isn't a problem but we never can be sure where OFW put
 272                  * factory images. "spinand,mt29f" value is required for proper
 273                  * nand recognition in u-boot.
 274                  */
 275                 compatible = "spi-nand", "spinand,mt29f";
 276                 #address-cells = <1>;
 277                 #size-cells = <1>;
 278                 reg = <1>;
 279                 spi-max-frequency = <24000000>;
 280
 281                 partitions {
 282                         compatible = "fixed-partitions";
 283                         #address-cells = <1>;
 284                         #size-cells = <1>;
 285
 286                         partition@0 {
 287                                 label = "rootfs_1";
 288                                 reg = <0x00000000 0x08000000>;
 289                         };
 290
 291                         partition@8000000 {
 292                                 label = "rootfs";
 293                                 reg = <0x08000000 0x08000000>;
 294                         };
 295                 };
 296         };
 297 };
 298
 299 &mdio {
 300         status = "okay";
 301         pinctrl-0 = <&mdio_pins>;
 302         pinctrl-names = "default";
 303         phy-reset-gpio = <&tlmm 62 0>;
 304 };
 305
 306 &usb3_ss_phy {
 307         status = "okay";
 308 };
 309
 310 &usb3_hs_phy {
 311         status = "okay";
 312 };
 313
 314 &usb3 {
 315         status = "okay";
 316 };
 317
 318 &usb2_hs_phy {
 319         status = "okay";
 320 };
 321
 322 &usb2 {
 323         status = "okay";
 324 };