target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "Aruba AP-303";
  10         compatible = "aruba,ap-303";
  11
  12         aliases {
  13                 led-boot = &led_system_green;
  14                 led-failsafe = &led_system_red;
  15                 led-running = &led_system_green;
  16                 led-upgrade = &led_system_red;
  17         };
  18
  19         memory {
  20                 device_type = "memory";
  21                 reg = <0x80000000 0x10000000>;
  22         };
  23
  24         soc {
  25                 rng@22000 {
  26                         status = "okay";
  27                 };
  28
  29                 mdio@90000 {
  30                         status = "okay";
  31                         pinctrl-0 = <&mdio_pins>;
  32                         pinctrl-names = "default";
  33
  34                         /delete-node/ ethernet-phy@0;
  35                         /delete-node/ ethernet-phy@2;
  36                         /delete-node/ ethernet-phy@3;
  37                         /delete-node/ ethernet-phy@4;
  38
  39                         ethernet-phy@5 {
  40                                 reg = <0x5>;
  41                         };
  42                 };
  43
  44                 counter@4a1000 {
  45                         compatible = "qcom,qca-gcnt";
  46                         reg = <0x4a1000 0x4>;
  47                 };
  48
  49                 ess_tcsr@1953000 {
  50                         compatible = "qcom,tcsr";
  51                         reg = <0x1953000 0x1000>;
  52                         qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
  53                 };
  54
  55                 tcsr@1949000 {
  56                         compatible = "qcom,tcsr";
  57                         reg = <0x1949000 0x100>;
  58                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  59                 };
  60
  61                 tcsr@1957000 {
  62                         compatible = "qcom,tcsr";
  63                         reg = <0x1957000 0x100>;
  64                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  65                 };
  66
  67                 crypto@8e3a000 {
  68                         status = "okay";
  69                 };
  70
  71                 watchdog@b017000 {
  72                         status = "okay";
  73                 };
  74
  75                 ess-switch@c000000 {
  76                         switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
  77                         switch_lan_bmp = <0x0>; /* lan port bitmap */
  78                         switch_wan_bmp = <0x10>; /* wan port bitmap */
  79                 };
  80
  81                 edma@c080000 {
  82                         qcom,single-phy;
  83                         qcom,num_gmac = <1>;
  84                         phy-mode = "rgmii-id";
  85                         status = "okay";
  86                 };
  87
  88                 i2c_0: i2c@78b7000 {
  89                         pinctrl-0 = <&i2c_0_pins>;
  90                         pinctrl-names = "default";
  91                         status = "ok";
  92
  93                         tpm@29 {
  94                                 /* No Driver */
  95                                 compatible = "atmel,at97sc3203";
  96                                 reg = <0x29>;
  97                                 read-only;
  98                         };
  99                 };
 100         };
 101
 102         leds {
 103                 compatible = "gpio-leds";
 104
 105                 wifi_green {
 106                         label = "ap-303:green:wifi";
 107                         gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
 108                         linux,default-trigger = "phy0tpt";
 109                 };
 110
 111                 wifi_amber {
 112                         label = "ap-303:amber:wifi";
 113                         gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
 114                         linux,default-trigger = "phy1tpt";
 115                 };
 116
 117                 led_system_red: system_red {
 118                         label = "ap-303:red:system";
 119                         gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
 120                 };
 121
 122                 led_system_green: system_green {
 123                         label = "ap-303:green:system";
 124                         gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
 125                 };
 126         };
 127
 128         keys {
 129                 compatible = "gpio-keys";
 130
 131                 reset {
 132                         label = "Reset button";
 133                         gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
 134                         linux,code = <KEY_RESTART>;
 135                 };
 136         };
 137 };
 138
 139 &blsp_dma {
 140         status = "okay";
 141 };
 142
 143 &blsp1_uart1 {
 144         /* Texas Instruments CC2540T BLE radio */
 145         pinctrl-0 = <&serial_0_pins>;
 146         pinctrl-names = "default";
 147         status = "okay";
 148 };
 149
 150 &blsp1_uart2 {
 151         pinctrl-0 = <&serial_1_pins>;
 152         pinctrl-names = "default";
 153         status = "okay";
 154 };
 155
 156 &cryptobam {
 157         status = "okay";
 158 };
 159
 160 &gmac0 {
 161         qcom,phy_mdio_addr = <5>;
 162         qcom,poll_required = <1>;
 163         vlan_tag = <0 0x20>;
 164 };
 165
 166 &qpic_bam {
 167         status = "okay";
 168 };
 169
 170 &tlmm {
 171         /*
 172          * In addition to the Pins listed below,
 173          * the following GPIOs have "features":
 174          * 54 - out - active low to force HW reset
 175          * 41 - out - active low to reset TPM
 176          * 43 - out - active low to reset BLE radio
 177          * 19 - in  - active high when DC powered
 178          */
 179         mdio_pins: mdio_pinmux {
 180                 mux_1 {
 181                         pins = "gpio6";
 182                         function = "mdio";
 183                         bias-pull-up;
 184                 };
 185                 mux_2 {
 186                         pins = "gpio7";
 187                         function = "mdc";
 188                         bias-pull-up;
 189                 };
 190         };
 191
 192         nand_pins: nand_pins {
 193                 pullups {
 194                         pins = "gpio53", "gpio58", "gpio59";
 195                         function = "qpic";
 196                         bias-pull-up;
 197                 };
 198
 199                 pulldowns {
 200                         pins = "gpio54", "gpio55", "gpio56",
 201                                 "gpio57", "gpio60", "gpio61",
 202                                 "gpio62", "gpio63", "gpio64",
 203                                 "gpio65", "gpio66", "gpio67",
 204                                 "gpio68", "gpio69";
 205                         function = "qpic";
 206                         bias-pull-down;
 207                 };
 208         };
 209
 210         spi_0_pins: spi_0_pinmux {
 211                 pin {
 212                         function = "blsp_spi0";
 213                         pins = "gpio13", "gpio14", "gpio15";
 214                         drive-strength = <12>;
 215                         bias-disable;
 216                 };
 217                 pin_cs {
 218                         function = "gpio";
 219                         pins = "gpio12";
 220                         drive-strength = <2>;
 221                         bias-disable;
 222                         output-high;
 223                 };
 224         };
 225         i2c_0_pins: i2c_0_pinmux {
 226                 mux {
 227                         pins = "gpio10", "gpio11";
 228                         function = "blsp_i2c0";
 229                         drive-strength = <4>;
 230                         bias-disable;
 231                 };
 232         };
 233
 234         serial_0_pins: serial_0_pinmux {
 235                 mux {
 236                         pins = "gpio16", "gpio17";
 237                         function = "blsp_uart0";
 238                         bias-disable;
 239                 };
 240         };
 241
 242         serial_1_pins: serial_1_pinmux {
 243                 mux {
 244                         pins = "gpio8", "gpio9";
 245                         function = "blsp_uart1";
 246                         bias-disable;
 247                 };
 248         };
 249
 250         phy-reset {
 251                 line-name = "PHY-reset";
 252                 gpios = <42 GPIO_ACTIVE_HIGH>;
 253                 gpio-hog;
 254                 output-high;
 255         };
 256 };
 257
 258 &nand {
 259         pinctrl-0 = <&nand_pins>;
 260         pinctrl-names = "default";
 261         status = "okay";
 262
 263         nand@0 {
 264                 partitions {
 265                         compatible = "fixed-partitions";
 266                         #address-cells = <1>;
 267                         #size-cells = <1>;
 268
 269                         partition@0 {
 270                                 /* 'aos0' in Aruba firmware */
 271                                 label = "aos0";
 272                                 reg = <0x0 0x2000000>;
 273                                 read-only;
 274                         };
 275
 276                         partition@2000000 {
 277                                 /* 'aos1' in AVM firmware */
 278                                 label = "ubi";
 279                                 reg = <0x2000000 0x2000000>;
 280                         };
 281
 282                         partition@4000000 {
 283                                 label = "aruba-ubifs";
 284                                 reg = <0x4000000 0x4000000>;
 285                                 read-only;
 286                         };
 287                 };
 288         };
 289 };
 290
 291 &blsp1_spi1 {
 292         pinctrl-0 = <&spi_0_pins>;
 293         pinctrl-names = "default";
 294         status = "okay";
 295         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 296
 297         flash@0 {
 298                 compatible = "jedec,spi-nor";
 299                 reg = <0>;
 300                 spi-max-frequency = <24000000>;
 301
 302                 partitions {
 303                         compatible = "fixed-partitions";
 304                         #address-cells = <1>;
 305                         #size-cells = <1>;
 306
 307                         /*
 308                          * There is no partition map for the NOR flash
 309                          * in the stock firmware.
 310                          *
 311                          * All partitions here are based on offsets
 312                          * found in the U-Boot GPL code and information
 313                          * from smem.
 314                          */
 315
 316                         partition@0 {
 317                                 label = "sbl1";
 318                                 reg = <0x0 0x40000>;
 319                                 read-only;
 320                         };
 321
 322                         partition@40000 {
 323                                 label = "mibib";
 324                                 reg = <0x40000 0x20000>;
 325                                 read-only;
 326                         };
 327
 328                         partition@60000 {
 329                                 label = "qsee";
 330                                 reg = <0x60000 0x60000>;
 331                                 read-only;
 332                         };
 333
 334                         partition@c0000 {
 335                                 label = "cdt";
 336                                 reg = <0xc0000 0x10000>;
 337                                 read-only;
 338                         };
 339
 340                         partition@d0000 {
 341                                 label = "ddrparams";
 342                                 reg = <0xd0000 0x10000>;
 343                                 read-only;
 344                         };
 345
 346                         partition@e0000 {
 347                                 label = "ART";
 348                                 reg = <0xe0000 0x10000>;
 349                                 read-only;
 350                         };
 351
 352                         partition@f0000 {
 353                                 label = "appsbl";
 354                                 reg = <0xf0000 0xf0000>;
 355                                 read-only;
 356                         };
 357
 358                         partition@1e0000 {
 359                                 label = "mfginfo";
 360                                 reg = <0x1e0000 0x10000>;
 361                                 read-only;
 362                         };
 363
 364                         partition@1f0000 {
 365                                 label = "apcd";
 366                                 reg = <0x1f0000 0x10000>;
 367                                 read-only;
 368                         };
 369
 370                         partition@200000 {
 371                                 label = "osss";
 372                                 reg = <0x200000 0x180000>;
 373                                 read-only;
 374                         };
 375
 376                         partition@380000 {
 377                                 /* This is empty */
 378                                 label = "appsblenv";
 379                                 reg = <0x380000 0x10000>;
 380                                 read-only;
 381                         };
 382
 383                         partition@390000 {
 384                                 label = "pds";
 385                                 reg = <0x390000 0x10000>;
 386                                 read-only;
 387                         };
 388
 389                         partition@3a0000 {
 390                                 label = "fcache";
 391                                 reg = <0x3a0000 0x10000>;
 392                                 read-only;
 393                         };
 394
 395                         partition@3b0000 {
 396                                 /* Called osss1 in smem */
 397                                 label = "u-boot-env-bak";
 398                                 reg = <0x3b0000 0x10000>;
 399                                 read-only;
 400                         };
 401
 402                         partition@3f0000 {
 403                                 label = "u-boot-env";
 404                                 reg = <0x3f0000 0x10000>;
 405                                 read-only;
 406                         };
 407                 };
 408         };
 409 };
 410
 411 &wifi0 {
 412         status = "okay";
 413         qcom,ath10k-calibration-variant = "Aruba-AP-303";
 414 };
 415
 416 &wifi1 {
 417         status = "okay";
 418         qcom,ath10k-calibration-variant = "Aruba-AP-303";
 419 };