ipq40xx: add v5.4 support
[openwrt/staging/jow.git] / target / linux / ipq40xx / files-5.4 / arch / arm / boot / dts / qcom-ipq4018-cs-w3-wd1200g-eup.dts
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7
8 / {
9 model = "EZVIZ CS-W3-WD1200G EUP";
10 compatible = "ezviz,cs-w3-wd1200g-eup";
11
12 aliases {
13 led-boot = &led_status_green;
14 led-failsafe = &led_status_red;
15 led-running = &led_status_blue;
16 led-upgrade = &led_status_green;
17 };
18
19 soc {
20 rng@22000 {
21 status = "okay";
22 };
23
24 mdio@90000 {
25 status = "okay";
26 pinctrl-0 = <&mdio_pins>;
27 pinctrl-names = "default";
28 reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
29 reset-delay-us = <5000>;
30 };
31
32 ess-psgmii@98000 {
33 status = "okay";
34 };
35
36 tcsr@1949000 {
37 compatible = "qcom,tcsr";
38 reg = <0x1949000 0x100>;
39 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
40 };
41
42 tcsr@194b000 {
43 compatible = "qcom,tcsr";
44 reg = <0x194b000 0x100>;
45 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
46 };
47
48 ess_tcsr@1953000 {
49 compatible = "qcom,tcsr";
50 reg = <0x1953000 0x1000>;
51 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
52 };
53
54 tcsr@1957000 {
55 compatible = "qcom,tcsr";
56 reg = <0x1957000 0x100>;
57 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
58 };
59
60 crypto@8e3a000 {
61 status = "okay";
62 };
63
64 watchdog@b017000 {
65 status = "okay";
66 };
67
68 ess-switch@c000000 {
69 status = "okay";
70 };
71
72 edma@c080000 {
73 status = "okay";
74 };
75 };
76
77 leds {
78 compatible = "gpio-leds";
79
80 led_status_red: status_red {
81 label = "cs-w3-wd1200g-eup:red:status";
82 gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
83 };
84
85 led_status_green: status_green {
86 label = "cs-w3-wd1200g-eup:green:status";
87 gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
88 };
89
90 led_status_blue: status_blue {
91 label = "cs-w3-wd1200g-eup:blue:status";
92 gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
93 };
94 };
95
96 keys {
97 compatible = "gpio-keys";
98
99 reset {
100 label = "reset";
101 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
102 linux,code = <KEY_RESTART>;
103 };
104 };
105 };
106
107 &tlmm {
108 serial_pins: serial_pinmux {
109 mux {
110 pins = "gpio60", "gpio61";
111 function = "blsp_uart0";
112 bias-disable;
113 };
114 };
115
116 mdio_pins: mdio_pinmux {
117 mux_1 {
118 pins = "gpio53";
119 function = "mdio";
120 bias-pull-up;
121 };
122
123 mux_2 {
124 pins = "gpio52";
125 function = "mdc";
126 bias-pull-up;
127 };
128 };
129
130 spi_0_pins: spi_0_pinmux {
131 pin {
132 function = "blsp_spi0";
133 pins = "gpio55", "gpio56", "gpio57";
134 drive-strength = <12>;
135 bias-disable;
136 };
137 pin_cs {
138 function = "gpio";
139 pins = "gpio54";
140 drive-strength = <2>;
141 bias-disable;
142 output-high;
143 };
144 };
145 };
146
147 &blsp_dma {
148 status = "okay";
149 };
150
151 &blsp1_spi1 {
152 pinctrl-0 = <&spi_0_pins>;
153 pinctrl-names = "default";
154 status = "okay";
155 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
156
157 flash@0 {
158 compatible = "jedec,spi-nor";
159 reg = <0>;
160 spi-max-frequency = <24000000>;
161
162 partitions {
163 compatible = "fixed-partitions";
164 #address-cells = <1>;
165 #size-cells = <1>;
166
167 partition0@0 {
168 label = "SBL1";
169 reg = <0x00000000 0x00040000>;
170 read-only;
171 };
172
173 partition1@40000 {
174 label = "MIBIB";
175 reg = <0x00040000 0x00020000>;
176 read-only;
177 };
178
179 partition2@60000 {
180 label = "QSEE";
181 reg = <0x00060000 0x00060000>;
182 read-only;
183 };
184
185 partition3@c0000 {
186 label = "CDT";
187 reg = <0x000c0000 0x00010000>;
188 read-only;
189 };
190
191 partition4@d0000 {
192 label = "DDRPARAMS";
193 reg = <0x000d0000 0x00010000>;
194 read-only;
195 };
196
197 partition5@E0000 {
198 label = "APPSBLENV";
199 reg = <0x000e0000 0x00010000>;
200 read-only;
201 };
202
203 partition6@F0000 {
204 label = "APPSBL";
205 reg = <0x000f0000 0x00080000>;
206 read-only;
207 };
208
209 partition7@170000 {
210 label = "ART";
211 reg = <0x00170000 0x00010000>;
212 read-only;
213 };
214
215 partition9@580000 {
216 compatible = "denx,fit";
217 label = "firmware";
218 reg = <0x00180000 0x00e80000>;
219 };
220 };
221 };
222 };
223
224 &blsp1_uart1 {
225 pinctrl-0 = <&serial_pins>;
226 pinctrl-names = "default";
227 status = "okay";
228 };
229
230 &cryptobam {
231 status = "okay";
232 };
233
234 &wifi0 {
235 status = "okay";
236 qcom,ath10k-calibration-variant = "ezviz-cs-w3-wd1200g-eup";
237 };
238
239 &wifi1 {
240 status = "okay";
241 qcom,ath10k-calibration-variant = "ezviz-cs-w3-wd1200g-eup";
242 };