target/linux/bcm4908/patches-5.15/700-net-dsa-bcm_sf2-enable-GPHY-for-switch-probing.patch

   1 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   2 Date: Mon, 15 Feb 2021 23:59:26 +0100
   3 Subject: [PATCH] net: dsa: bcm_sf2: enable GPHY for switch probing
   4 MIME-Version: 1.0
   5 Content-Type: text/plain; charset=UTF-8
   6 Content-Transfer-Encoding: 8bit
   7
   8 GPHY needs to be enabled to succesfully probe & setup switch port
   9 connected to it. Otherwise hardcoding PHY OUI would be required.
  10
  11 Before:
  12 brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
  13 brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
  14 brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
  15 brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
  16 brcm-sf2 80080000.switch wan (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 7
  17
  18 After:
  19 brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
  20 brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
  21 brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
  22 brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
  23 brcm-sf2 80080000.switch wan (uninitialized): PHY [800c05c0.mdio--1:0c] driver [Generic PHY] (irq=POLL)
  24
  25 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  26 ---
  27  drivers/net/dsa/bcm_sf2.c | 4 ++++
  28  1 file changed, 4 insertions(+)
  29
  30 --- a/drivers/net/dsa/bcm_sf2.c
  31 +++ b/drivers/net/dsa/bcm_sf2.c
  32 @@ -1542,10 +1542,14 @@ static int bcm_sf2_sw_probe(struct platf
  33         rev = reg_readl(priv, REG_PHY_REVISION);
  34         priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK;
  35
  36 +       bcm_sf2_gphy_enable_set(priv->dev->ds, true);
  37 +
  38         ret = b53_switch_register(dev);
  39         if (ret)
  40                 goto out_mdio;
  41
  42 +       bcm_sf2_gphy_enable_set(priv->dev->ds, false);
  43 +
  44         dev_info(&pdev->dev,
  45                  "Starfighter 2 top: %x.%02x, core: %x.%02x, IRQs: %d, %d\n",
  46                  priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff,