ath79: ar: convert to nvmem-layout
[openwrt/staging/jow.git] / target / linux / ath79 / dts / ar9344_ocedo_raccoon.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar9344.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "OCEDO Raccoon";
10 compatible = "ocedo,raccoon", "qca,ar9344";
11
12 chosen {
13 bootargs = "console=ttyS0,115200n8";
14 };
15
16 aliases {
17 led-boot = &led_system;
18 led-failsafe = &led_system;
19 led-running = &led_system;
20 led-upgrade = &led_system;
21 };
22
23 leds {
24 compatible = "gpio-leds";
25
26 power {
27 label = "green:power";
28 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
29 default-state = "on";
30 };
31
32 wlan2g {
33 label = "yellow:wlan24";
34 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
35 linux,default-trigger = "phy0tpt";
36 };
37
38 led_system: system {
39 label = "blue:sys";
40 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
41 };
42 };
43
44 ath9k-leds {
45 compatible = "gpio-leds";
46
47 wlan5g {
48 label = "red:wlan5";
49 gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
50 linux,default-trigger = "phy1tpt";
51 };
52 };
53
54 keys {
55 compatible = "gpio-keys";
56
57 reset {
58 linux,code = <KEY_RESTART>;
59 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
60 debounce-interval = <60>;
61 };
62 };
63 };
64
65 &ref {
66 clock-frequency = <40000000>;
67 };
68
69 &spi {
70 status = "okay";
71
72 flash@0 {
73 compatible = "jedec,spi-nor";
74 reg = <0>;
75 spi-max-frequency = <50000000>;
76
77 partitions {
78 compatible = "fixed-partitions";
79 #address-cells = <1>;
80 #size-cells = <1>;
81
82 partition@0 {
83 label = "u-boot";
84 reg = <0x000000 0x040000>;
85 read-only;
86 };
87
88 partition@40000 {
89 label = "u-boot-env";
90 reg = <0x040000 0x010000>;
91 };
92
93 partition@50000 {
94 /* Dual-Flash layout combined */
95 compatible = "denx,uimage";
96 label = "firmware";
97 reg = <0x050000 0xe80000>;
98 };
99
100 partition@ed0000 {
101 label = "data";
102 reg = <0xed0000 0x110000>;
103 read-only;
104 };
105
106 partition@fe0000 {
107 label = "id";
108 reg = <0xfe0000 0x010000>;
109 read-only;
110 };
111
112 partition@ff0000 {
113 label = "art";
114 reg = <0xff0000 0x010000>;
115 read-only;
116
117 nvmem-layout {
118 compatible = "fixed-layout";
119 #address-cells = <1>;
120 #size-cells = <1>;
121
122 macaddr_art_0: macaddr@0 {
123 reg = <0x0 0x6>;
124 };
125
126 macaddr_art_6: macaddr@6 {
127 reg = <0x6 0x6>;
128 };
129
130 macaddr_art_c: macaddr@c {
131 reg = <0xc 0x6>;
132 };
133
134 calibration_art_1000: calibration@1000 {
135 reg = <0x1000 0x440>;
136 };
137
138 calibration_art_5000: calibration@5000 {
139 reg = <0x5000 0x440>;
140 };
141 };
142 };
143 };
144 };
145 };
146
147 &pcie {
148 status = "okay";
149
150 ath9k: wifi@0,0 {
151 compatible = "pci168c,0030";
152 reg = <0x0000 0 0 0 0>;
153 nvmem-cells = <&macaddr_art_c>, <&calibration_art_5000>;
154 nvmem-cell-names = "mac-address", "calibration";
155 #gpio-cells = <2>;
156 gpio-controller;
157 };
158 };
159
160 &wmac {
161 status = "okay";
162
163 nvmem-cells = <&macaddr_art_6>, <&calibration_art_1000>;
164 nvmem-cell-names = "mac-address", "calibration";
165 };
166
167 &mdio0 {
168 status = "okay";
169
170 phy0: ethernet-phy@0 {
171 reg = <0>;
172 eee-broken-100tx;
173 eee-broken-1000t;
174 };
175 };
176
177 &eth0 {
178 status = "okay";
179
180 pll-data = <0x02000000 0x00000101 0x00001313>;
181
182 nvmem-cells = <&macaddr_art_0>;
183 nvmem-cell-names = "mac-address";
184
185 phy-mode = "rgmii-id";
186 phy-handle = <&phy0>;
187
188 gmac-config {
189 device = <&gmac>;
190 rgmii-gmac0 = <1>;
191 rxdv-delay = <3>;
192 rxd-delay = <3>;
193 txen-delay = <0>;
194 txd-delay = <0>;
195 };
196 };