ar71xx: add v4.14 support
[openwrt/staging/jow.git] / target / linux / ar71xx / patches-4.14 / 470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch
1 Index: linux-4.14.61/arch/mips/include/asm/mach-ath79/mangle-port.h
2 ===================================================================
3 --- /dev/null
4 +++ linux-4.14.61/arch/mips/include/asm/mach-ath79/mangle-port.h
5 @@ -0,0 +1,37 @@
6 +/*
7 + * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
8 + *
9 + * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h
10 + * Copyright (C) 2003, 2004 Ralf Baechle
11 + *
12 + * This program is free software; you can redistribute it and/or modify it
13 + * under the terms of the GNU General Public License version 2 as published
14 + * by the Free Software Foundation.
15 + */
16 +
17 +#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H
18 +#define __ASM_MACH_ATH79_MANGLE_PORT_H
19 +
20 +#ifdef CONFIG_PCI
21 +extern unsigned long (ath79_pci_swizzle_b)(unsigned long port);
22 +extern unsigned long (ath79_pci_swizzle_w)(unsigned long port);
23 +#else
24 +#define ath79_pci_swizzle_b(port) (port)
25 +#define ath79_pci_swizzle_w(port) (port)
26 +#endif
27 +
28 +#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port)
29 +#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port)
30 +#define __swizzle_addr_l(port) (port)
31 +#define __swizzle_addr_q(port) (port)
32 +
33 +# define ioswabb(a, x) (x)
34 +# define __mem_ioswabb(a, x) (x)
35 +# define ioswabw(a, x) (x)
36 +# define __mem_ioswabw(a, x) cpu_to_le16(x)
37 +# define ioswabl(a, x) (x)
38 +# define __mem_ioswabl(a, x) cpu_to_le32(x)
39 +# define ioswabq(a, x) (x)
40 +# define __mem_ioswabq(a, x) cpu_to_le64(x)
41 +
42 +#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */
43 Index: linux-4.14.61/arch/mips/ath79/pci.c
44 ===================================================================
45 --- linux-4.14.61.orig/arch/mips/ath79/pci.c
46 +++ linux-4.14.61/arch/mips/ath79/pci.c
47 @@ -13,6 +13,7 @@
48 */
49
50 #include <linux/init.h>
51 +#include <linux/export.h>
52 #include <linux/pci.h>
53 #include <linux/resource.h>
54 #include <linux/platform_device.h>
55 @@ -25,6 +26,9 @@ static int (*ath79_pci_plat_dev_init)(st
56 static const struct ath79_pci_irq *ath79_pci_irq_map;
57 static unsigned ath79_pci_nr_irqs;
58
59 +static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port);
60 +static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port);
61 +
62 static const struct ath79_pci_irq ar71xx_pci_irq_map[] = {
63 {
64 .slot = 17,
65 @@ -212,12 +216,50 @@ ath79_register_pci_ar724x(int id,
66 return pdev;
67 }
68
69 +static inline bool ar71xx_is_pci_addr(unsigned long port)
70 +{
71 + unsigned long phys = CPHYSADDR(port);
72 +
73 + return (phys >= AR71XX_PCI_MEM_BASE &&
74 + phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE);
75 +}
76 +
77 +static unsigned long ar71xx_pci_swizzle_b(unsigned long port)
78 +{
79 + return ar71xx_is_pci_addr(port) ? port ^ 3 : port;
80 +}
81 +
82 +static unsigned long ar71xx_pci_swizzle_w(unsigned long port)
83 +{
84 + return ar71xx_is_pci_addr(port) ? port ^ 2 : port;
85 +}
86 +
87 +unsigned long ath79_pci_swizzle_b(unsigned long port)
88 +{
89 + if (__ath79_pci_swizzle_b)
90 + return __ath79_pci_swizzle_b(port);
91 +
92 + return port;
93 +}
94 +EXPORT_SYMBOL(ath79_pci_swizzle_b);
95 +
96 +unsigned long ath79_pci_swizzle_w(unsigned long port)
97 +{
98 + if (__ath79_pci_swizzle_w)
99 + return __ath79_pci_swizzle_w(port);
100 +
101 + return port;
102 +}
103 +EXPORT_SYMBOL(ath79_pci_swizzle_w);
104 +
105 int __init ath79_register_pci(void)
106 {
107 struct platform_device *pdev = NULL;
108
109 if (soc_is_ar71xx()) {
110 pdev = ath79_register_pci_ar71xx();
111 + __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b;
112 + __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w;
113 } else if (soc_is_ar724x()) {
114 pdev = ath79_register_pci_ar724x(-1,
115 AR724X_PCI_CFG_BASE,