arm-trusted-firmware-rockchip: add m0 gcc toolchain
[openwrt/staging/jow.git] / package / kernel / qca-ssdk / patches / 0001-SSDK-replace-ioremap_nocache-with-ioremap.patch
1 From 1e46d596701fedb751a669666a74677344fb8724 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Wed, 12 May 2021 13:45:45 +0200
4 Subject: [PATCH 01/14] SSDK: replace ioremap_nocache with ioremap
5
6 ioremap_nocache was dropped upstream, simply use the
7 generic variety.
8
9 Signed-off-by: Robert Marko <robimarko@gmail.com>
10 ---
11 src/init/ssdk_clk.c | 10 +++++-----
12 src/init/ssdk_init.c | 2 +-
13 src/init/ssdk_plat.c | 6 +++---
14 3 files changed, 9 insertions(+), 9 deletions(-)
15
16 --- a/src/init/ssdk_clk.c
17 +++ b/src/init/ssdk_clk.c
18 @@ -721,7 +721,7 @@ ssdk_mp_tcsr_get(a_uint32_t tcsr_offset,
19 {
20 void __iomem *tcsr_base = NULL;
21
22 - tcsr_base = ioremap_nocache(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
23 + tcsr_base = ioremap(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
24 if (!tcsr_base)
25 {
26 SSDK_ERROR("Failed to map tcsr eth address!\n");
27 @@ -738,7 +738,7 @@ ssdk_mp_tcsr_set(a_uint32_t tcsr_offset,
28 {
29 void __iomem *tcsr_base = NULL;
30
31 - tcsr_base = ioremap_nocache(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
32 + tcsr_base = ioremap(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
33 if (!tcsr_base)
34 {
35 SSDK_ERROR("Failed to map tcsr eth address!\n");
36 @@ -786,7 +786,7 @@ ssdk_mp_cmnblk_stable_check(void)
37 a_uint32_t reg_val;
38 int i, loops = 20;
39
40 - pll_lock = ioremap_nocache(CMN_PLL_LOCKED_ADDR, CMN_PLL_LOCKED_SIZE);
41 + pll_lock = ioremap(CMN_PLL_LOCKED_ADDR, CMN_PLL_LOCKED_SIZE);
42 if (!pll_lock) {
43 SSDK_ERROR("Failed to map CMN PLL LOCK register!\n");
44 return A_FALSE;
45 @@ -843,7 +843,7 @@ static void ssdk_cmnblk_pll_src_set(enum
46 void __iomem *cmn_pll_src_base = NULL;
47 a_uint32_t reg_val;
48
49 - cmn_pll_src_base = ioremap_nocache(CMN_BLK_PLL_SRC_ADDR, CMN_BLK_SIZE);
50 + cmn_pll_src_base = ioremap(CMN_BLK_PLL_SRC_ADDR, CMN_BLK_SIZE);
51 if (!cmn_pll_src_base) {
52 SSDK_ERROR("Failed to map cmn pll source address!\n");
53 return;
54 @@ -869,7 +869,7 @@ static void ssdk_cmnblk_init(enum cmnblk
55 return;
56 }
57
58 - gcc_pll_base = ioremap_nocache(CMN_BLK_ADDR, CMN_BLK_SIZE);
59 + gcc_pll_base = ioremap(CMN_BLK_ADDR, CMN_BLK_SIZE);
60 if (!gcc_pll_base) {
61 SSDK_ERROR("Failed to map gcc pll address!\n");
62 return;
63 --- a/src/init/ssdk_init.c
64 +++ b/src/init/ssdk_init.c
65 @@ -3134,7 +3134,7 @@ static int ssdk_dess_mac_mode_init(a_uin
66 (a_uint8_t *)&reg_value, 4);
67 mdelay(10);
68 /*softreset psgmii, fixme*/
69 - gcc_addr = ioremap_nocache(0x1812000, 0x200);
70 + gcc_addr = ioremap(0x1812000, 0x200);
71 if (!gcc_addr) {
72 SSDK_ERROR("gcc map fail!\n");
73 return 0;
74 --- a/src/init/ssdk_plat.c
75 +++ b/src/init/ssdk_plat.c
76 @@ -1708,7 +1708,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
77 reg_mode = ssdk_uniphy_reg_access_mode_get(dev_id);
78 if(reg_mode == HSL_REG_LOCAL_BUS) {
79 ssdk_uniphy_reg_map_info_get(dev_id, &map);
80 - qca_phy_priv_global[dev_id]->uniphy_hw_addr = ioremap_nocache(map.base_addr,
81 + qca_phy_priv_global[dev_id]->uniphy_hw_addr = ioremap(map.base_addr,
82 map.size);
83 if (!qca_phy_priv_global[dev_id]->uniphy_hw_addr) {
84 SSDK_ERROR("%s ioremap fail.", __func__);
85 @@ -1723,7 +1723,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
86 reg_mode = ssdk_switch_reg_access_mode_get(dev_id);
87 if (reg_mode == HSL_REG_LOCAL_BUS) {
88 ssdk_switch_reg_map_info_get(dev_id, &map);
89 - qca_phy_priv_global[dev_id]->hw_addr = ioremap_nocache(map.base_addr,
90 + qca_phy_priv_global[dev_id]->hw_addr = ioremap(map.base_addr,
91 map.size);
92 if (!qca_phy_priv_global[dev_id]->hw_addr) {
93 SSDK_ERROR("%s ioremap fail.", __func__);
94 @@ -1764,7 +1764,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
95 return -1;
96 }
97
98 - qca_phy_priv_global[dev_id]->psgmii_hw_addr = ioremap_nocache(map.base_addr,
99 + qca_phy_priv_global[dev_id]->psgmii_hw_addr = ioremap(map.base_addr,
100 map.size);
101 if (!qca_phy_priv_global[dev_id]->psgmii_hw_addr) {
102 SSDK_ERROR("%s ioremap fail.", __func__);