package/boot/uboot-mediatek/patches/442-add-bpi-r3-mini.patch

   1 --- /dev/null
   2 +++ b/configs/mt7986a_bpi-r3-mini-emmc_defconfig
   3 @@ -0,0 +1,203 @@
   4 +CONFIG_ARM=y
   5 +CONFIG_POSITION_INDEPENDENT=y
   6 +CONFIG_ARCH_MEDIATEK=y
   7 +CONFIG_TARGET_MT7986=y
   8 +CONFIG_TEXT_BASE=0x41e00000
   9 +CONFIG_SYS_MALLOC_F_LEN=0x4000
  10 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
  11 +CONFIG_NR_DRAM_BANKS=1
  12 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini"
  13 +CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3-mini_emmc_env"
  14 +CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-mini.dtb"
  15 +CONFIG_OF_LIBFDT_OVERLAY=y
  16 +CONFIG_OF_SYSTEM_SETUP=y
  17 +CONFIG_DEBUG_UART_BASE=0x11002000
  18 +CONFIG_DEBUG_UART_CLOCK=40000000
  19 +CONFIG_DEBUG_UART=y
  20 +CONFIG_SYS_LOAD_ADDR=0x46000000
  21 +CONFIG_SMBIOS_PRODUCT_NAME=""
  22 +CONFIG_AUTOBOOT_KEYED=y
  23 +CONFIG_BOOTDELAY=30
  24 +CONFIG_AUTOBOOT_MENU_SHOW=y
  25 +CONFIG_CFB_CONSOLE_ANSI=y
  26 +CONFIG_BOARD_LATE_INIT=y
  27 +CONFIG_BUTTON=y
  28 +CONFIG_BUTTON_GPIO=y
  29 +CONFIG_GPIO_HOG=y
  30 +CONFIG_CMD_ENV_FLAGS=y
  31 +CONFIG_FIT=y
  32 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
  33 +CONFIG_LED=y
  34 +CONFIG_LED_BLINK=y
  35 +CONFIG_LED_GPIO=y
  36 +CONFIG_LOGLEVEL=7
  37 +CONFIG_LOG=y
  38 +CONFIG_SYS_PROMPT="MT7986> "
  39 +CONFIG_CMD_BOOTMENU=y
  40 +CONFIG_CMD_BOOTP=y
  41 +CONFIG_CMD_BUTTON=y
  42 +CONFIG_CMD_CACHE=y
  43 +CONFIG_CMD_CDP=y
  44 +CONFIG_CMD_CPU=y
  45 +CONFIG_CMD_DHCP=y
  46 +CONFIG_CMD_DM=y
  47 +CONFIG_CMD_DNS=y
  48 +CONFIG_CMD_ECHO=y
  49 +CONFIG_CMD_ENV_READMEM=y
  50 +CONFIG_CMD_ERASEENV=y
  51 +CONFIG_CMD_EXT4=y
  52 +CONFIG_CMD_FAT=y
  53 +CONFIG_CMD_FDT=y
  54 +CONFIG_CMD_FS_GENERIC=y
  55 +CONFIG_CMD_FS_UUID=y
  56 +CONFIG_CMD_GPIO=y
  57 +CONFIG_CMD_GPT=y
  58 +CONFIG_CMD_HASH=y
  59 +CONFIG_CMD_ITEST=y
  60 +CONFIG_CMD_LED=y
  61 +CONFIG_CMD_LICENSE=y
  62 +CONFIG_CMD_LINK_LOCAL=y
  63 +# CONFIG_CMD_MBR is not set
  64 +CONFIG_CMD_MDIO=y
  65 +CONFIG_CMD_MII=y
  66 +CONFIG_CMD_MMC=y
  67 +CONFIG_CMD_MTD=y
  68 +CONFIG_CMD_PCI=y
  69 +CONFIG_CMD_PSTORE=y
  70 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
  71 +CONFIG_CMD_SF_TEST=y
  72 +CONFIG_CMD_PING=y
  73 +CONFIG_CMD_PXE=y
  74 +CONFIG_CMD_PWM=y
  75 +CONFIG_CMD_SMC=y
  76 +CONFIG_CMD_TFTPBOOT=y
  77 +CONFIG_CMD_TFTPSRV=y
  78 +CONFIG_CMD_UBI=y
  79 +CONFIG_CMD_UBI_RENAME=y
  80 +CONFIG_CMD_UBIFS=y
  81 +CONFIG_CMD_ASKENV=y
  82 +CONFIG_CMD_PART=y
  83 +CONFIG_CMD_RARP=y
  84 +CONFIG_CMD_SETEXPR=y
  85 +CONFIG_CMD_SLEEP=y
  86 +CONFIG_CMD_SNTP=y
  87 +CONFIG_CMD_SOURCE=y
  88 +CONFIG_CMD_STRINGS=y
  89 +CONFIG_CMD_USB=y
  90 +CONFIG_CMD_UUID=y
  91 +CONFIG_DISPLAY_CPUINFO=y
  92 +CONFIG_DM_MDIO=y
  93 +CONFIG_DM_MMC=y
  94 +CONFIG_DM_MTD=y
  95 +CONFIG_DM_REGULATOR=y
  96 +CONFIG_DM_REGULATOR_FIXED=y
  97 +CONFIG_DM_REGULATOR_GPIO=y
  98 +CONFIG_DM_USB=y
  99 +CONFIG_DM_PWM=y
 100 +CONFIG_PWM_MTK=y
 101 +CONFIG_HUSH_PARSER=y
 102 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 103 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 104 +CONFIG_VERSION_VARIABLE=y
 105 +CONFIG_PARTITION_UUIDS=y
 106 +CONFIG_NETCONSOLE=y
 107 +CONFIG_REGMAP=y
 108 +CONFIG_SYSCON=y
 109 +CONFIG_CLK=y
 110 +CONFIG_DM_GPIO=y
 111 +CONFIG_DM_SCSI=y
 112 +CONFIG_AHCI=y
 113 +CONFIG_AHCI_PCI=y
 114 +CONFIG_SCSI_AHCI=y
 115 +CONFIG_SCSI=y
 116 +CONFIG_CMD_SCSI=y
 117 +CONFIG_PHY=y
 118 +CONFIG_PHY_MTK_TPHY=y
 119 +CONFIG_PHY_ETHERNET_ID=y
 120 +CONFIG_PHY_FIXED=y
 121 +CONFIG_MTK_AHCI=y
 122 +CONFIG_DM_ETH=y
 123 +CONFIG_DM_ETH_PHY=y
 124 +CONFIG_MEDIATEK_ETH=y
 125 +CONFIG_PHY_AIROHA=y
 126 +CONFIG_PHY_AIROHA_EN8811H=y
 127 +CONFIG_PHY_AIROHA_FW_IN_MMC=y
 128 +CONFIG_PCI=y
 129 +CONFIG_MTD=y
 130 +CONFIG_MTD_UBI_FASTMAP=y
 131 +CONFIG_DM_PCI=y
 132 +CONFIG_PCIE_MEDIATEK=y
 133 +CONFIG_PINCTRL=y
 134 +CONFIG_PINCONF=y
 135 +CONFIG_PINCTRL_MT7622=y
 136 +CONFIG_POWER_DOMAIN=y
 137 +CONFIG_PRE_CONSOLE_BUFFER=y
 138 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 139 +CONFIG_MTK_POWER_DOMAIN=y
 140 +CONFIG_RAM=y
 141 +CONFIG_DM_SERIAL=y
 142 +CONFIG_MTK_SERIAL=y
 143 +CONFIG_MMC=y
 144 +CONFIG_MMC_DEFAULT_DEV=1
 145 +CONFIG_MMC_HS200_SUPPORT=y
 146 +CONFIG_MMC_MTK=y
 147 +CONFIG_MMC_SUPPORTS_TUNING=y
 148 +CONFIG_SUPPORT_EMMC_BOOT=y
 149 +CONFIG_SPI=y
 150 +CONFIG_DM_SPI=y
 151 +CONFIG_MTK_SPI_NAND=y
 152 +CONFIG_MTK_SPI_NAND_MTD=y
 153 +CONFIG_SYSRESET_WATCHDOG=y
 154 +CONFIG_WDT_MTK=y
 155 +CONFIG_LZO=y
 156 +CONFIG_ZSTD=y
 157 +CONFIG_HEXDUMP=y
 158 +CONFIG_RANDOM_UUID=y
 159 +CONFIG_REGEX=y
 160 +CONFIG_USB=y
 161 +CONFIG_USB_HOST=y
 162 +CONFIG_USB_XHCI_HCD=y
 163 +CONFIG_USB_XHCI_MTK=y
 164 +CONFIG_USB_STORAGE=y
 165 +CONFIG_OF_EMBED=y
 166 +CONFIG_ENV_OVERWRITE=y
 167 +CONFIG_ENV_IS_IN_MMC=y
 168 +CONFIG_ENV_OFFSET=0x400000
 169 +CONFIG_ENV_OFFSET_REDUND=0x440000
 170 +CONFIG_ENV_SIZE=0x40000
 171 +CONFIG_ENV_SIZE_REDUND=0x40000
 172 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 173 +CONFIG_NET_RANDOM_ETHADDR=y
 174 +CONFIG_REGMAP=y
 175 +CONFIG_SYSCON=y
 176 +CONFIG_CLK=y
 177 +CONFIG_SUPPORT_EMMC_BOOT=y
 178 +CONFIG_MMC_HS200_SUPPORT=y
 179 +CONFIG_MMC_MTK=y
 180 +CONFIG_MEDIATEK_ETH=y
 181 +CONFIG_PINCTRL=y
 182 +CONFIG_PINCONF=y
 183 +CONFIG_PINCTRL_MT7986=y
 184 +CONFIG_POWER_DOMAIN=y
 185 +CONFIG_MTK_POWER_DOMAIN=y
 186 +CONFIG_DM_REGULATOR=y
 187 +CONFIG_DM_REGULATOR_FIXED=y
 188 +CONFIG_DM_SERIAL=y
 189 +CONFIG_MTK_SERIAL=y
 190 +CONFIG_HEXDUMP=y
 191 +CONFIG_USE_DEFAULT_ENV_FILE=y
 192 +CONFIG_MTD_SPI_NAND=y
 193 +CONFIG_MTK_SPIM=y
 194 +#CONFIG_MTK_SNOR=y
 195 +CONFIG_DM_SPI_FLASH=y
 196 +CONFIG_SPI_FLASH_MTD=y
 197 +CONFIG_SPI_FLASH_WINBOND=y
 198 +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 199 +CONFIG_CMD_SF=y
 200 +CONFIG_CMD_NAND=y
 201 +CONFIG_CMD_NAND_TRIMFFS=y
 202 +CONFIG_LMB_MAX_REGIONS=64
 203 +CONFIG_USE_IPADDR=y
 204 +CONFIG_IPADDR="192.168.1.1"
 205 +CONFIG_USE_SERVERIP=y
 206 +CONFIG_SERVERIP="192.168.1.254"
 207 --- /dev/null
 208 +++ b/configs/mt7986a_bpi-r3-mini-snand_defconfig
 209 @@ -0,0 +1,203 @@
 210 +CONFIG_ARM=y
 211 +CONFIG_POSITION_INDEPENDENT=y
 212 +CONFIG_ARCH_MEDIATEK=y
 213 +CONFIG_TARGET_MT7986=y
 214 +CONFIG_TEXT_BASE=0x41e00000
 215 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 216 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 217 +CONFIG_NR_DRAM_BANKS=1
 218 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini"
 219 +CONFIG_DEFAULT_ENV_FILE="bananapi_bpi-r3-mini_snand_env"
 220 +CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-bpi-r3-mini.dtb"
 221 +CONFIG_OF_LIBFDT_OVERLAY=y
 222 +CONFIG_OF_SYSTEM_SETUP=y
 223 +CONFIG_DEBUG_UART_BASE=0x11002000
 224 +CONFIG_DEBUG_UART_CLOCK=40000000
 225 +CONFIG_DEBUG_UART=y
 226 +CONFIG_SYS_LOAD_ADDR=0x46000000
 227 +CONFIG_SMBIOS_PRODUCT_NAME=""
 228 +CONFIG_AUTOBOOT_KEYED=y
 229 +CONFIG_BOOTDELAY=30
 230 +CONFIG_AUTOBOOT_MENU_SHOW=y
 231 +CONFIG_CFB_CONSOLE_ANSI=y
 232 +CONFIG_BOARD_LATE_INIT=y
 233 +CONFIG_BUTTON=y
 234 +CONFIG_BUTTON_GPIO=y
 235 +CONFIG_GPIO_HOG=y
 236 +CONFIG_CMD_ENV_FLAGS=y
 237 +CONFIG_FIT=y
 238 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 239 +CONFIG_LED=y
 240 +CONFIG_LED_BLINK=y
 241 +CONFIG_LED_GPIO=y
 242 +CONFIG_LOGLEVEL=7
 243 +CONFIG_LOG=y
 244 +CONFIG_SYS_PROMPT="MT7986> "
 245 +CONFIG_CMD_BOOTMENU=y
 246 +CONFIG_CMD_BOOTP=y
 247 +CONFIG_CMD_BUTTON=y
 248 +CONFIG_CMD_CACHE=y
 249 +CONFIG_CMD_CDP=y
 250 +CONFIG_CMD_CPU=y
 251 +CONFIG_CMD_DHCP=y
 252 +CONFIG_CMD_DM=y
 253 +CONFIG_CMD_DNS=y
 254 +CONFIG_CMD_ECHO=y
 255 +CONFIG_CMD_ENV_READMEM=y
 256 +CONFIG_CMD_ERASEENV=y
 257 +CONFIG_CMD_EXT4=y
 258 +CONFIG_CMD_FAT=y
 259 +CONFIG_CMD_FDT=y
 260 +CONFIG_CMD_FS_GENERIC=y
 261 +CONFIG_CMD_FS_UUID=y
 262 +CONFIG_CMD_GPIO=y
 263 +CONFIG_CMD_GPT=y
 264 +CONFIG_CMD_HASH=y
 265 +CONFIG_CMD_ITEST=y
 266 +CONFIG_CMD_LED=y
 267 +CONFIG_CMD_LICENSE=y
 268 +CONFIG_CMD_LINK_LOCAL=y
 269 +# CONFIG_CMD_MBR is not set
 270 +CONFIG_CMD_MDIO=y
 271 +CONFIG_CMD_MII=y
 272 +CONFIG_CMD_MMC=y
 273 +CONFIG_CMD_MTD=y
 274 +CONFIG_CMD_PCI=y
 275 +CONFIG_CMD_PSTORE=y
 276 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 277 +CONFIG_CMD_SF_TEST=y
 278 +CONFIG_CMD_PING=y
 279 +CONFIG_CMD_PXE=y
 280 +CONFIG_CMD_PWM=y
 281 +CONFIG_CMD_SMC=y
 282 +CONFIG_CMD_TFTPBOOT=y
 283 +CONFIG_CMD_TFTPSRV=y
 284 +CONFIG_CMD_UBI=y
 285 +CONFIG_CMD_UBI_RENAME=y
 286 +CONFIG_CMD_UBIFS=y
 287 +CONFIG_CMD_ASKENV=y
 288 +CONFIG_CMD_PART=y
 289 +CONFIG_CMD_RARP=y
 290 +CONFIG_CMD_SETEXPR=y
 291 +CONFIG_CMD_SLEEP=y
 292 +CONFIG_CMD_SNTP=y
 293 +CONFIG_CMD_SOURCE=y
 294 +CONFIG_CMD_STRINGS=y
 295 +CONFIG_CMD_USB=y
 296 +CONFIG_CMD_UUID=y
 297 +CONFIG_DISPLAY_CPUINFO=y
 298 +CONFIG_DM_MMC=y
 299 +CONFIG_DM_MTD=y
 300 +CONFIG_DM_REGULATOR=y
 301 +CONFIG_DM_REGULATOR_FIXED=y
 302 +CONFIG_DM_REGULATOR_GPIO=y
 303 +CONFIG_DM_USB=y
 304 +CONFIG_DM_PWM=y
 305 +CONFIG_PWM_MTK=y
 306 +CONFIG_HUSH_PARSER=y
 307 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 308 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 309 +CONFIG_VERSION_VARIABLE=y
 310 +CONFIG_PARTITION_UUIDS=y
 311 +CONFIG_NETCONSOLE=y
 312 +CONFIG_REGMAP=y
 313 +CONFIG_SYSCON=y
 314 +CONFIG_CLK=y
 315 +CONFIG_DM_GPIO=y
 316 +CONFIG_DM_SCSI=y
 317 +CONFIG_AHCI=y
 318 +CONFIG_AHCI_PCI=y
 319 +CONFIG_SCSI_AHCI=y
 320 +CONFIG_SCSI=y
 321 +CONFIG_CMD_SCSI=y
 322 +CONFIG_DM_MDIO=y
 323 +CONFIG_PHY=y
 324 +CONFIG_PHY_MTK_TPHY=y
 325 +CONFIG_PHY_ETHERNET_ID=y
 326 +CONFIG_PHY_FIXED=y
 327 +CONFIG_MTK_AHCI=y
 328 +CONFIG_DM_ETH=y
 329 +CONFIG_DM_ETH_PHY=y
 330 +CONFIG_MEDIATEK_ETH=y
 331 +CONFIG_PCI=y
 332 +CONFIG_MTD=y
 333 +CONFIG_MTD_UBI_FASTMAP=y
 334 +CONFIG_DM_PCI=y
 335 +CONFIG_PCIE_MEDIATEK=y
 336 +CONFIG_PINCTRL=y
 337 +CONFIG_PINCONF=y
 338 +CONFIG_PINCTRL_MT7622=y
 339 +CONFIG_POWER_DOMAIN=y
 340 +CONFIG_PRE_CONSOLE_BUFFER=y
 341 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 342 +CONFIG_MTK_POWER_DOMAIN=y
 343 +CONFIG_RAM=y
 344 +CONFIG_DM_SERIAL=y
 345 +CONFIG_MTK_SERIAL=y
 346 +CONFIG_MMC=y
 347 +CONFIG_MMC_DEFAULT_DEV=1
 348 +CONFIG_MMC_HS200_SUPPORT=y
 349 +CONFIG_MMC_MTK=y
 350 +CONFIG_MMC_SUPPORTS_TUNING=y
 351 +CONFIG_SUPPORT_EMMC_BOOT=y
 352 +CONFIG_SPI=y
 353 +CONFIG_DM_SPI=y
 354 +CONFIG_MTK_SPI_NAND=y
 355 +CONFIG_MTK_SPI_NAND_MTD=y
 356 +CONFIG_SYSRESET_WATCHDOG=y
 357 +CONFIG_WDT_MTK=y
 358 +CONFIG_LZO=y
 359 +CONFIG_ZSTD=y
 360 +CONFIG_HEXDUMP=y
 361 +CONFIG_RANDOM_UUID=y
 362 +CONFIG_REGEX=y
 363 +CONFIG_USB=y
 364 +CONFIG_USB_HOST=y
 365 +CONFIG_USB_XHCI_HCD=y
 366 +CONFIG_USB_XHCI_MTK=y
 367 +CONFIG_USB_STORAGE=y
 368 +CONFIG_OF_EMBED=y
 369 +CONFIG_ENV_OVERWRITE=y
 370 +CONFIG_ENV_IS_IN_UBI=y
 371 +CONFIG_ENV_UBI_PART="ubi"
 372 +CONFIG_ENV_SIZE=0x1f000
 373 +CONFIG_ENV_SIZE_REDUND=0x1f000
 374 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 375 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 376 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 377 +CONFIG_NET_RANDOM_ETHADDR=y
 378 +CONFIG_REGMAP=y
 379 +CONFIG_SYSCON=y
 380 +CONFIG_CLK=y
 381 +CONFIG_SUPPORT_EMMC_BOOT=y
 382 +CONFIG_MMC_HS200_SUPPORT=y
 383 +CONFIG_MMC_MTK=y
 384 +CONFIG_MEDIATEK_ETH=y
 385 +CONFIG_PHY_AIROHA=y
 386 +CONFIG_PHY_AIROHA_EN8811H=y
 387 +CONFIG_PHY_AIROHA_FW_IN_UBI=y
 388 +CONFIG_PINCTRL=y
 389 +CONFIG_PINCONF=y
 390 +CONFIG_PINCTRL_MT7986=y
 391 +CONFIG_POWER_DOMAIN=y
 392 +CONFIG_MTK_POWER_DOMAIN=y
 393 +CONFIG_DM_REGULATOR=y
 394 +CONFIG_DM_REGULATOR_FIXED=y
 395 +CONFIG_DM_SERIAL=y
 396 +CONFIG_MTK_SERIAL=y
 397 +CONFIG_HEXDUMP=y
 398 +CONFIG_USE_DEFAULT_ENV_FILE=y
 399 +CONFIG_MTD_SPI_NAND=y
 400 +CONFIG_MTK_SPIM=y
 401 +#CONFIG_MTK_SNOR=y
 402 +#CONFIG_DM_SPI_FLASH=y
 403 +#CONFIG_SPI_FLASH_MTD=y
 404 +#CONFIG_SPI_FLASH_WINBOND=y
 405 +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 406 +#CONFIG_CMD_SF=y
 407 +CONFIG_CMD_NAND=y
 408 +CONFIG_CMD_NAND_TRIMFFS=y
 409 +CONFIG_LMB_MAX_REGIONS=64
 410 +CONFIG_USE_IPADDR=y
 411 +CONFIG_IPADDR="192.168.1.1"
 412 +CONFIG_USE_SERVERIP=y
 413 --- /dev/null
 414 +++ b/bananapi_bpi-r3-mini_snand_env
 415 @@ -0,0 +1,61 @@
 416 +ipaddr=192.168.1.1
 417 +serverip=192.168.1.254
 418 +loadaddr=0x46000000
 419 +console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
 420 +bootargs=root=ubi.block=0,fit root=/dev/fit0
 421 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
 422 +bootconf=config-mt7986a-bananapi-bpi-r3-mini
 423 +bootdelay=0
 424 +bootfile=openwrt-mediatek-filogic-bananapi_bpi-r3-mini-initramfs-recovery.itb
 425 +bootfile_bl2=openwrt-mediatek-filogic-bananapi_bpi-r3-mini-snand-preloader.bin
 426 +bootfile_fip=openwrt-mediatek-filogic-bananapi_bpi-r3-mini-snand-bl31-uboot.fip
 427 +bootfile_upg=openwrt-mediatek-filogic-bananapi_bpi-r3-mini-squashfs-sysupgrade.itb
 428 +bootfile_en8811h_fw=EthMD32.bin
 429 +bootled_pwr=green:status
 430 +bootled_rec=blue:status
 431 +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
 432 +bootmenu_default=0
 433 +bootmenu_delay=0
 434 +bootmenu_title=      \e[0;34m( ( ( \e[1;39mOpenWrt\e[0;34m ) ) )  \e[0;36m[SPI-NAND]\e[0m
 435 +bootmenu_0=Initialize environment.=run _firstboot
 436 +bootmenu_0d=Run default boot command.=run boot_default
 437 +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
 438 +bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
 439 +bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
 440 +bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 441 +bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 442 +bootmenu_6=\e[31mLoad Airoha EN8811H firmware via TFTP then write to NAND.\e[0m=run boot_tftp_write_en8811h_fw ; run bootmenu_confirm_return
 443 +bootmenu_7=\e[31mLoad BL31+U-Boot FIP via TFTP then write to NAND.\e[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
 444 +bootmenu_8=\e[31mLoad BL2 preloader via TFTP then write to NAND.\e[0m=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
 445 +bootmenu_9=Reboot.=reset
 446 +bootmenu_10=Reset all settings to factory defaults.=run reset_factory ; reset
 447 +boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
 448 +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
 449 +boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
 450 +boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
 451 +boot_ubi=run boot_production ; run boot_recovery
 452 +boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
 453 +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
 454 +boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
 455 +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
 456 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run ubi_write_fip && run reset_factory
 457 +boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run snand_write_bl2
 458 +boot_tftp_write_en8811h_fw=tftpboot $loadaddr $bootfile_en8811h_fw && run ubi_write_en8811h_fw
 459 +part_default=production
 460 +part_recovery=recovery
 461 +reset_factory=mw $loadaddr 0xff 0x1f000 ; ubi write $loadaddr ubootenv 0x1f000 ; ubi write $loadaddr ubootenv2 0x1f000 ; ubi remove rootfs_data
 462 +snand_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr 0x0 0x40000 && mtd write bl2 $loadaddr 0x40000 0x40000 && mtd write bl2 $loadaddr 0x80000 0x40000 && mtd write bl2 $loadaddr 0xc0000 0x40000
 463 +ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x1f000 dynamic ; ubi check ubootenv2 || ubi create ubootenv2 0x1f000 dynamic
 464 +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
 465 +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
 466 +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
 467 +ubi_read_emmc_install=ubi check emmc_install && ubi read $loadaddr emmc_install
 468 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
 469 +ubi_write_fip=ubi check fip && ubi remove fip ; ubi create fip 0x200000 static ; ubi write $loadaddr fip 0x200000
 470 +ubi_write_en8811h_fw=ubi check en8811h-fw && ubi remove en8811h-fw ; ubi create en8811h-fw 0x24000 static ; ubi write $loadaddr en8811h-fw 0x24000
 471 +ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
 472 +ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
 473 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 474 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
 475 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
 476 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       \e[33m$ver\e[0m"
 477 --- /dev/null
 478 +++ b/bananapi_bpi-r3-mini_emmc_env
 479 @@ -0,0 +1,59 @@
 480 +ipaddr=192.168.1.1
 481 +serverip=192.168.1.254
 482 +loadaddr=0x46000000
 483 +console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
 484 +bootargs=root=/dev/fit0
 485 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_emmc ; fi
 486 +bootconf=config-mt7986a-bananapi-bpi-r3-mini
 487 +bootdelay=0
 488 +bootfile=openwrt-mediatek-filogic-bananapi_bpi-r3-mini-initramfs-recovery.itb
 489 +bootfile_bl2=openwrt-mediatek-filogic-bananapi_bpi-r3-mini-emmc-preloader.bin
 490 +bootfile_fip=openwrt-mediatek-filogic-bananapi_bpi-r3-mini-emmc-bl31-uboot.fip
 491 +bootfile_upg=openwrt-mediatek-filogic-bananapi_bpi-r3-mini-squashfs-sysupgrade.itb
 492 +bootfile_en8811h_fw=EthMD32.bin
 493 +bootled_pwr=green:status
 494 +bootled_rec=blue:status
 495 +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
 496 +bootmenu_default=0
 497 +bootmenu_delay=0
 498 +bootmenu_title=      \e[0;34m( ( ( \e[1;39mOpenWrt\e[0;34m ) ) )  \e[0;36m[eMMC]\e[0m
 499 +bootmenu_0=Initialize environment.=run _firstboot
 500 +bootmenu_0d=Run default boot command.=run boot_default
 501 +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
 502 +bootmenu_2=Boot production system from eMMC.=run boot_production ; run bootmenu_confirm_return
 503 +bootmenu_3=Boot recovery system from eMMC.=run boot_recovery ; run bootmenu_confirm_return
 504 +bootmenu_4=Load production system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 505 +bootmenu_5=Load recovery system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 506 +bootmenu_6=\e[31mLoad Airoha EN8811H firmware via TFTP then write to NAND.\e[0m=run boot_tftp_write_en8811h_fw ; run bootmenu_confirm_return
 507 +bootmenu_7=\e[31mLoad BL31+U-Boot FIP via TFTP then write to eMMC.\e[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
 508 +bootmenu_8=\e[31mLoad BL2 preloader via TFTP then write to eMMC.\e[0m=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
 509 +bootmenu_9=Reboot.=reset
 510 +bootmenu_10=Reset all settings to factory defaults.=run reset_factory ; reset
 511 +boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
 512 +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
 513 +boot_production=led $bootled_pwr on ; run emmc_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
 514 +boot_recovery=led $bootled_rec on ; run emmc_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
 515 +boot_emmc=run boot_production ; run boot_recovery
 516 +boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
 517 +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run emmc_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
 518 +boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run emmc_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
 519 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip
 520 +boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2
 521 +boot_tftp_write_en8811h_fw=tftpboot $loadaddr $bootfile_en8811h_fw && run emmc_write_en8811h_fw
 522 +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
 523 +mmc_write_vol=imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc erase 0x$part_addr 0x$image_size && mmc write $loadaddr 0x$part_addr 0x$image_size
 524 +mmc_read_vol=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200
 525 +part_default=production
 526 +part_recovery=recovery
 527 +reset_factory=eraseenv && reset
 528 +emmc_read_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_read_vol
 529 +emmc_read_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_read_vol
 530 +emmc_write_en8811h_fw=mmc partconf 0 1 2 2 && mmc erase 0x0 0x120 && mmc write $fileaddr 0x0 0x120 ; mmc partconf 0 1 1 0
 531 +emmc_write_bl2=mmc partconf 0 1 1 1 && mmc erase 0x0 0x400 && mmc write $fileaddr 0x0 0x400 ; mmc partconf 0 1 1 0
 532 +emmc_write_fip=mmc erase 0x3400 0x2000 && mmc write $fileaddr 0x3400 0x2000 && mmc erase 0x2000 0x800
 533 +emmc_write_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_write_vol
 534 +emmc_write_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_write_vol
 535 +_init_env=setenv _init_env ; setenv _create_env ; saveenv ; saveenv
 536 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
 537 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
 538 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       \e[33m$ver\e[0m"
 539 --- /dev/null
 540 +++ b/arch/arm/dts/mt7986a-bpi-r3-mini.dts
 541 @@ -0,0 +1,238 @@
 542 +// SPDX-License-Identifier: GPL-2.0-or-later
 543 +
 544 +/dts-v1/;
 545 +#include "mt7986.dtsi"
 546 +#include <dt-bindings/gpio/gpio.h>
 547 +#include <dt-bindings/input/linux-event-codes.h>
 548 +
 549 +/ {
 550 +       #address-cells = <1>;
 551 +       #size-cells = <1>;
 552 +       model = "Bananapi BPi-R3 Mini";
 553 +       compatible = "mediatek,mt7986", "mediatek,mt7986-rfb";
 554 +
 555 +       chosen {
 556 +               stdout-path = &uart0;
 557 +               tick-timer = &timer0;
 558 +       };
 559 +
 560 +       memory@40000000 {
 561 +               device_type = "memory";
 562 +               reg = <0x40000000 0x80000000>;
 563 +       };
 564 +
 565 +       gpio-keys {
 566 +               compatible = "gpio-keys";
 567 +
 568 +               button-reset {
 569 +                       label = "reset";
 570 +                       linux,code = <KEY_RESTART>;
 571 +                       gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
 572 +               };
 573 +       };
 574 +
 575 +       leds {
 576 +               compatible = "gpio-leds";
 577 +
 578 +               status_led: led-0 {
 579 +                       label = "green:status";
 580 +                       gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
 581 +               };
 582 +
 583 +               led-1 {
 584 +                       label = "blue:wlan2g";
 585 +                       gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
 586 +               };
 587 +
 588 +               led-2 {
 589 +                       label = "blue:wlan5g";
 590 +                       gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
 591 +               };
 592 +       };
 593 +
 594 +       reg_1p8v: regulator-1p8v {
 595 +               compatible = "regulator-fixed";
 596 +               regulator-name = "fixed-1.8V";
 597 +               regulator-min-microvolt = <1800000>;
 598 +               regulator-max-microvolt = <1800000>;
 599 +               regulator-boot-on;
 600 +               regulator-always-on;
 601 +       };
 602 +
 603 +       reg_3p3v: regulator-3p3v {
 604 +               compatible = "regulator-fixed";
 605 +               regulator-name = "fixed-3.3V";
 606 +               regulator-min-microvolt = <3300000>;
 607 +               regulator-max-microvolt = <3300000>;
 608 +               regulator-boot-on;
 609 +               regulator-always-on;
 610 +       };
 611 +};
 612 +
 613 +&eth {
 614 +       status = "okay";
 615 +       pinctrl-names = "default";
 616 +       pinctrl-0 = <&mdio_pins>;
 617 +
 618 +       mediatek,gmac-id = <0>;
 619 +       phy-mode = "2500base-x";
 620 +       phy-handle = <&phy14>;
 621 +
 622 +       phy14: eth-phy@e {
 623 +               compatible = "ethernet-phy-id03a2.a411";
 624 +               reg = <14>;
 625 +
 626 +               airoha,rx-pol-reverse;
 627 +
 628 +               reset-gpios = <&gpio 49 GPIO_ACTIVE_LOW>;
 629 +               reset-assert-us = <10000>;
 630 +               reset-deassert-us = <20000>;
 631 +       };
 632 +};
 633 +
 634 +&mmc0 {
 635 +       pinctrl-names = "default";
 636 +       pinctrl-0 = <&mmc0_pins_default>;
 637 +       bus-width = <8>;
 638 +       max-frequency = <200000000>;
 639 +       cap-mmc-highspeed;
 640 +       cap-mmc-hw-reset;
 641 +       vmmc-supply = <&reg_3p3v>;
 642 +       vqmmc-supply = <&reg_1p8v>;
 643 +       non-removable;
 644 +       status = "okay";
 645 +};
 646 +
 647 +&pinctrl {
 648 +       mdio_pins: mdio-pins {
 649 +               mux {
 650 +                       function = "eth";
 651 +                       groups = "mdc_mdio";
 652 +               };
 653 +
 654 +               conf-en8811-pwr-a {
 655 +                       pins = "GPIO_11";
 656 +                       drive-strength = <MTK_DRIVE_8mA>;
 657 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
 658 +                       output-low;
 659 +               };
 660 +
 661 +               conf-en8811-pwr-b {
 662 +                       pins = "GPIO_12";
 663 +                       drive-strength = <MTK_DRIVE_8mA>;
 664 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
 665 +                       output-low;
 666 +               };
 667 +       };
 668 +
 669 +       mmc0_pins_default: mmc0default {
 670 +               mux {
 671 +                       function = "flash";
 672 +                       groups =  "emmc_51";
 673 +               };
 674 +
 675 +               conf-cmd-dat {
 676 +                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 677 +                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 678 +                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 679 +                       input-enable;
 680 +                       drive-strength = <MTK_DRIVE_4mA>;
 681 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 682 +               };
 683 +
 684 +               conf-clk {
 685 +                       pins = "EMMC_CK";
 686 +                       drive-strength = <MTK_DRIVE_6mA>;
 687 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 688 +               };
 689 +
 690 +               conf-dsl {
 691 +                       pins = "EMMC_DSL";
 692 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 693 +               };
 694 +
 695 +               conf-rst {
 696 +                       pins = "EMMC_RSTB";
 697 +                       drive-strength = <MTK_DRIVE_4mA>;
 698 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 699 +               };
 700 +       };
 701 +
 702 +       spi_flash_pins: spi0-pins-func-1 {
 703 +               mux {
 704 +                       function = "flash";
 705 +                       groups = "spi0", "spi0_wp_hold";
 706 +               };
 707 +
 708 +               conf-pu {
 709 +                       pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
 710 +                       drive-strength = <MTK_DRIVE_8mA>;
 711 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
 712 +               };
 713 +
 714 +               conf-pd {
 715 +                       pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
 716 +                       drive-strength = <MTK_DRIVE_8mA>;
 717 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
 718 +               };
 719 +       };
 720 +
 721 +       pwm_pins: pwm0-pins-func-1 {
 722 +               mux {
 723 +                       function = "pwm";
 724 +                       groups = "pwm0";
 725 +               };
 726 +       };
 727 +};
 728 +
 729 +&pwm {
 730 +       pinctrl-names = "default";
 731 +       pinctrl-0 = <&pwm_pins>;
 732 +       status = "okay";
 733 +};
 734 +
 735 +&spi0 {
 736 +       #address-cells = <1>;
 737 +       #size-cells = <0>;
 738 +       pinctrl-names = "default";
 739 +       pinctrl-0 = <&spi_flash_pins>;
 740 +       status = "okay";
 741 +       must_tx;
 742 +       enhance_timing;
 743 +       dma_ext;
 744 +       ipm_design;
 745 +       support_quad;
 746 +       tick_dly = <1>;
 747 +       sample_sel = <0>;
 748 +
 749 +       spi_nand@0 {
 750 +               compatible = "spi-nand";
 751 +               reg = <0>;
 752 +               spi-max-frequency = <20000000>;
 753 +
 754 +               partitions {
 755 +                       compatible = "fixed-partitions";
 756 +                       #address-cells = <1>;
 757 +                       #size-cells = <1>;
 758 +
 759 +                       partition@0 {
 760 +                               label = "bl2";
 761 +                               reg = <0x0 0x80000>;
 762 +                       };
 763 +
 764 +                       partition@80000 {
 765 +                               label = "ubi";
 766 +                               reg = <0x80000 0x7f80000>;
 767 +                       };
 768 +               };
 769 +       };
 770 +
 771 +};
 772 +
 773 +&uart0 {
 774 +       status = "okay";
 775 +};
 776 +
 777 +&watchdog {
 778 +       status = "disabled";
 779 +};