package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch

   1 --- /dev/null
   2 +++ b/configs/mt7622_ubnt_unifi-6-lr-v1_defconfig
   3 @@ -0,0 +1,147 @@
   4 +CONFIG_ARM=y
   5 +CONFIG_POSITION_INDEPENDENT=y
   6 +CONFIG_ARCH_MEDIATEK=y
   7 +CONFIG_TARGET_MT7622=y
   8 +CONFIG_TEXT_BASE=0x41e00000
   9 +CONFIG_SYS_MALLOC_F_LEN=0x4000
  10 +CONFIG_SYS_LOAD_ADDR=0x40080000
  11 +CONFIG_USE_DEFAULT_ENV_FILE=y
  12 +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
  13 +CONFIG_ENV_IS_IN_MTD=y
  14 +CONFIG_ENV_MTD_NAME="nor0"
  15 +CONFIG_ENV_SIZE_REDUND=0x4000
  16 +CONFIG_ENV_SIZE=0x4000
  17 +CONFIG_ENV_OFFSET=0xc0000
  18 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
  19 +CONFIG_BOARD_LATE_INIT=y
  20 +CONFIG_RESET_BUTTON_SETTLE_DELAY=400
  21 +CONFIG_BOOTP_SEND_HOSTNAME=y
  22 +CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr_env"
  23 +CONFIG_DEBUG_UART_BASE=0x11002000
  24 +CONFIG_DEBUG_UART_CLOCK=25000000
  25 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr"
  26 +CONFIG_DEBUG_UART=y
  27 +CONFIG_SMBIOS_PRODUCT_NAME=""
  28 +CONFIG_AUTOBOOT_KEYED=y
  29 +CONFIG_BOOTDELAY=30
  30 +CONFIG_AUTOBOOT_MENU_SHOW=y
  31 +CONFIG_CFB_CONSOLE_ANSI=y
  32 +CONFIG_BUTTON=y
  33 +CONFIG_BUTTON_GPIO=y
  34 +CONFIG_GPIO_HOG=y
  35 +CONFIG_CMD_ENV_FLAGS=y
  36 +CONFIG_FIT=y
  37 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
  38 +CONFIG_LOGLEVEL=7
  39 +CONFIG_LOG=y
  40 +CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr"
  41 +CONFIG_SYS_PROMPT="MT7622> "
  42 +# CONFIG_LEGACY_IMAGE_FORMAT is not set
  43 +# CONFIG_BOOTM_PLAN9 is not set
  44 +# CONFIG_BOOTM_RTEMS is not set
  45 +# CONFIG_BOOTM_VXWORKS is not set
  46 +# CONFIG_EFI is not set
  47 +# CONFIG_EFI_LOADER is not set
  48 +CONFIG_CMD_BOOTMENU=y
  49 +# CONFIG_CMD_BOOTEFI is not set
  50 +CONFIG_CMD_BOOTP=y
  51 +CONFIG_CMD_BUTTON=y
  52 +CONFIG_CMD_CDP=y
  53 +CONFIG_CMD_DHCP=y
  54 +CONFIG_CMD_DNS=y
  55 +CONFIG_CMD_ECHO=y
  56 +# CONFIG_CMD_ELF is not set
  57 +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
  58 +CONFIG_CMD_ENV_READMEM=y
  59 +CONFIG_CMD_ERASEENV=y
  60 +CONFIG_CMD_GPIO=y
  61 +CONFIG_CMD_HASH=y
  62 +CONFIG_CMD_ITEST=y
  63 +CONFIG_CMD_LED=y
  64 +CONFIG_CMD_LINK_LOCAL=y
  65 +# CONFIG_CMD_MBR is not set
  66 +CONFIG_CMD_MTD=y
  67 +CONFIG_CMD_MTDPARTS=y
  68 +# CONFIG_CMD_PCI is not set
  69 +CONFIG_CMD_SF_TEST=y
  70 +CONFIG_CMD_PING=y
  71 +CONFIG_CMD_PXE=y
  72 +CONFIG_CMD_SMC=y
  73 +CONFIG_CMD_TFTPBOOT=y
  74 +CONFIG_CMD_TFTPSRV=y
  75 +# CONFIG_CMD_UNLZ4 is not set
  76 +CONFIG_CMD_ASKENV=y
  77 +CONFIG_CMD_PSTORE=y
  78 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
  79 +CONFIG_CMD_RARP=y
  80 +CONFIG_CMD_SETEXPR=y
  81 +CONFIG_CMD_SLEEP=y
  82 +CONFIG_CMD_SOURCE=y
  83 +CONFIG_CMD_UUID=y
  84 +CONFIG_DISPLAY_CPUINFO=y
  85 +CONFIG_DM_ETH=y
  86 +CONFIG_DM_ETH_PHY=y
  87 +CONFIG_DM_GPIO=y
  88 +CONFIG_DM_MDIO=y
  89 +CONFIG_DM_MTD=y
  90 +CONFIG_DM_REGULATOR=y
  91 +CONFIG_DM_REGULATOR_FIXED=y
  92 +CONFIG_DM_REGULATOR_GPIO=y
  93 +# CONFIG_DM_MMC is not set
  94 +CONFIG_DM_SERIAL=y
  95 +CONFIG_DM_SPI=y
  96 +CONFIG_DM_SPI_FLASH=y
  97 +CONFIG_HUSH_PARSER=y
  98 +# CONFIG_PARTITION_UUIDS is not set
  99 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 100 +# CONFIG_LED is not set
 101 +# CONFIG_LZ4 is not set
 102 +CONFIG_VERSION_VARIABLE=y
 103 +CONFIG_NETCONSOLE=y
 104 +CONFIG_REGMAP=y
 105 +CONFIG_SYSCON=y
 106 +CONFIG_CLK=y
 107 +CONFIG_PHY=y
 108 +CONFIG_PHY_FIXED=y
 109 +CONFIG_PHYLIB_10G=y
 110 +CONFIG_PHY_AQUANTIA=y
 111 +CONFIG_PHY_ADDR_ENABLE=y
 112 +CONFIG_PHY_ADDR=8
 113 +CONFIG_MEDIATEK_ETH=y
 114 +CONFIG_MTD=y
 115 +# CONFIG_MMC is not set
 116 +CONFIG_PINCTRL=y
 117 +CONFIG_PINCONF=y
 118 +CONFIG_PINCTRL_MT7622=y
 119 +CONFIG_POWER_DOMAIN=y
 120 +CONFIG_PRE_CONSOLE_BUFFER=y
 121 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 122 +CONFIG_MTK_POWER_DOMAIN=y
 123 +CONFIG_RAM=y
 124 +CONFIG_MTK_SERIAL=y
 125 +CONFIG_SPI=y
 126 +CONFIG_MTK_SNFI_SPI=y
 127 +CONFIG_MTK_SNOR=y
 128 +CONFIG_SYSRESET_WATCHDOG=y
 129 +CONFIG_WDT_MTK=y
 130 +CONFIG_HEXDUMP=y
 131 +CONFIG_RANDOM_UUID=y
 132 +CONFIG_REGEX=y
 133 +CONFIG_SPI_FLASH=y
 134 +CONFIG_SPI_FLASH_BAR=y
 135 +CONFIG_SPI_FLASH_MTD=y
 136 +CONFIG_SPI_FLASH_UNLOCK_ALL=y
 137 +CONFIG_SPI_FLASH_EON=y
 138 +CONFIG_SPI_FLASH_GIGADEVICE=y
 139 +CONFIG_SPI_FLASH_MACRONIX=y
 140 +CONFIG_SPI_FLASH_SPANSION=y
 141 +CONFIG_SPI_FLASH_STMICRO=y
 142 +CONFIG_SPI_FLASH_SST=y
 143 +CONFIG_SPI_FLASH_WINBOND=y
 144 +CONFIG_SPI_FLASH_XMC=y
 145 +CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 146 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 147 +CONFIG_USE_IPADDR=y
 148 +CONFIG_IPADDR="192.168.1.1"
 149 +CONFIG_USE_SERVERIP=y
 150 +CONFIG_SERVERIP="192.168.1.254"
 151 --- /dev/null
 152 +++ b/configs/mt7622_ubnt_unifi-6-lr-v2_defconfig
 153 @@ -0,0 +1,147 @@
 154 +CONFIG_ARM=y
 155 +CONFIG_POSITION_INDEPENDENT=y
 156 +CONFIG_ARCH_MEDIATEK=y
 157 +CONFIG_TARGET_MT7622=y
 158 +CONFIG_TEXT_BASE=0x41e00000
 159 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 160 +CONFIG_SYS_LOAD_ADDR=0x40080000
 161 +CONFIG_USE_DEFAULT_ENV_FILE=y
 162 +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
 163 +CONFIG_ENV_IS_IN_MTD=y
 164 +CONFIG_ENV_MTD_NAME="nor0"
 165 +CONFIG_ENV_SIZE_REDUND=0x4000
 166 +CONFIG_ENV_SIZE=0x4000
 167 +CONFIG_ENV_OFFSET=0xc0000
 168 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 169 +CONFIG_BOARD_LATE_INIT=y
 170 +CONFIG_RESET_BUTTON_SETTLE_DELAY=400
 171 +CONFIG_BOOTP_SEND_HOSTNAME=y
 172 +CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr-v2_env"
 173 +CONFIG_DEBUG_UART_BASE=0x11002000
 174 +CONFIG_DEBUG_UART_CLOCK=25000000
 175 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr"
 176 +CONFIG_DEBUG_UART=y
 177 +CONFIG_SMBIOS_PRODUCT_NAME=""
 178 +CONFIG_AUTOBOOT_KEYED=y
 179 +CONFIG_BOOTDELAY=30
 180 +CONFIG_AUTOBOOT_MENU_SHOW=y
 181 +CONFIG_CFB_CONSOLE_ANSI=y
 182 +CONFIG_BUTTON=y
 183 +CONFIG_BUTTON_GPIO=y
 184 +CONFIG_GPIO_HOG=y
 185 +CONFIG_CMD_ENV_FLAGS=y
 186 +CONFIG_FIT=y
 187 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 188 +CONFIG_LOGLEVEL=7
 189 +CONFIG_LOG=y
 190 +CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr"
 191 +CONFIG_SYS_PROMPT="MT7622> "
 192 +# CONFIG_LEGACY_IMAGE_FORMAT is not set
 193 +# CONFIG_BOOTM_PLAN9 is not set
 194 +# CONFIG_BOOTM_RTEMS is not set
 195 +# CONFIG_BOOTM_VXWORKS is not set
 196 +# CONFIG_EFI is not set
 197 +# CONFIG_EFI_LOADER is not set
 198 +CONFIG_CMD_BOOTMENU=y
 199 +# CONFIG_CMD_BOOTEFI is not set
 200 +CONFIG_CMD_BOOTP=y
 201 +CONFIG_CMD_BUTTON=y
 202 +CONFIG_CMD_CDP=y
 203 +CONFIG_CMD_DHCP=y
 204 +CONFIG_CMD_DNS=y
 205 +CONFIG_CMD_ECHO=y
 206 +# CONFIG_CMD_ELF is not set
 207 +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 208 +CONFIG_CMD_ENV_READMEM=y
 209 +CONFIG_CMD_ERASEENV=y
 210 +CONFIG_CMD_GPIO=y
 211 +CONFIG_CMD_HASH=y
 212 +CONFIG_CMD_ITEST=y
 213 +CONFIG_CMD_LED=y
 214 +CONFIG_CMD_LINK_LOCAL=y
 215 +# CONFIG_CMD_MBR is not set
 216 +CONFIG_CMD_MTD=y
 217 +CONFIG_CMD_MTDPARTS=y
 218 +# CONFIG_CMD_PCI is not set
 219 +CONFIG_CMD_SF_TEST=y
 220 +CONFIG_CMD_PING=y
 221 +CONFIG_CMD_PXE=y
 222 +CONFIG_CMD_SMC=y
 223 +CONFIG_CMD_TFTPBOOT=y
 224 +CONFIG_CMD_TFTPSRV=y
 225 +# CONFIG_CMD_UNLZ4 is not set
 226 +CONFIG_CMD_ASKENV=y
 227 +CONFIG_CMD_PSTORE=y
 228 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 229 +CONFIG_CMD_RARP=y
 230 +CONFIG_CMD_SETEXPR=y
 231 +CONFIG_CMD_SLEEP=y
 232 +CONFIG_CMD_SOURCE=y
 233 +CONFIG_CMD_UUID=y
 234 +CONFIG_DISPLAY_CPUINFO=y
 235 +CONFIG_DM_ETH=y
 236 +CONFIG_DM_ETH_PHY=y
 237 +CONFIG_DM_GPIO=y
 238 +CONFIG_DM_MDIO=y
 239 +CONFIG_DM_MTD=y
 240 +CONFIG_DM_REGULATOR=y
 241 +CONFIG_DM_REGULATOR_FIXED=y
 242 +CONFIG_DM_REGULATOR_GPIO=y
 243 +# CONFIG_DM_MMC is not set
 244 +CONFIG_DM_SERIAL=y
 245 +CONFIG_DM_SPI=y
 246 +CONFIG_DM_SPI_FLASH=y
 247 +CONFIG_HUSH_PARSER=y
 248 +# CONFIG_PARTITION_UUIDS is not set
 249 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 250 +# CONFIG_LED is not set
 251 +# CONFIG_LZ4 is not set
 252 +CONFIG_VERSION_VARIABLE=y
 253 +CONFIG_NETCONSOLE=y
 254 +CONFIG_REGMAP=y
 255 +CONFIG_SYSCON=y
 256 +CONFIG_CLK=y
 257 +CONFIG_PHY=y
 258 +CONFIG_PHY_FIXED=y
 259 +CONFIG_PHYLIB_10G=y
 260 +CONFIG_PHY_AQUANTIA=y
 261 +CONFIG_PHY_ADDR_ENABLE=y
 262 +CONFIG_PHY_ADDR=8
 263 +CONFIG_MEDIATEK_ETH=y
 264 +CONFIG_MTD=y
 265 +# CONFIG_MMC is not set
 266 +CONFIG_PINCTRL=y
 267 +CONFIG_PINCONF=y
 268 +CONFIG_PINCTRL_MT7622=y
 269 +CONFIG_POWER_DOMAIN=y
 270 +CONFIG_PRE_CONSOLE_BUFFER=y
 271 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 272 +CONFIG_MTK_POWER_DOMAIN=y
 273 +CONFIG_RAM=y
 274 +CONFIG_MTK_SERIAL=y
 275 +CONFIG_SPI=y
 276 +CONFIG_MTK_SNFI_SPI=y
 277 +CONFIG_MTK_SNOR=y
 278 +CONFIG_SYSRESET_WATCHDOG=y
 279 +CONFIG_WDT_MTK=y
 280 +CONFIG_HEXDUMP=y
 281 +CONFIG_RANDOM_UUID=y
 282 +CONFIG_REGEX=y
 283 +CONFIG_SPI_FLASH=y
 284 +CONFIG_SPI_FLASH_BAR=y
 285 +CONFIG_SPI_FLASH_MTD=y
 286 +CONFIG_SPI_FLASH_UNLOCK_ALL=y
 287 +CONFIG_SPI_FLASH_EON=y
 288 +CONFIG_SPI_FLASH_GIGADEVICE=y
 289 +CONFIG_SPI_FLASH_MACRONIX=y
 290 +CONFIG_SPI_FLASH_SPANSION=y
 291 +CONFIG_SPI_FLASH_STMICRO=y
 292 +CONFIG_SPI_FLASH_SST=y
 293 +CONFIG_SPI_FLASH_WINBOND=y
 294 +CONFIG_SPI_FLASH_XMC=y
 295 +CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 296 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 297 +CONFIG_USE_IPADDR=y
 298 +CONFIG_IPADDR="192.168.1.1"
 299 +CONFIG_USE_SERVERIP=y
 300 +CONFIG_SERVERIP="192.168.1.254"
 301 --- /dev/null
 302 +++ b/configs/mt7622_ubnt_unifi-6-lr-v3_defconfig
 303 @@ -0,0 +1,146 @@
 304 +CONFIG_ARM=y
 305 +CONFIG_POSITION_INDEPENDENT=y
 306 +CONFIG_ARCH_MEDIATEK=y
 307 +CONFIG_TARGET_MT7622=y
 308 +CONFIG_TEXT_BASE=0x41e00000
 309 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 310 +CONFIG_SYS_LOAD_ADDR=0x40080000
 311 +CONFIG_USE_DEFAULT_ENV_FILE=y
 312 +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)"
 313 +CONFIG_ENV_IS_IN_MTD=y
 314 +CONFIG_ENV_MTD_NAME="nor0"
 315 +CONFIG_ENV_SIZE_REDUND=0x4000
 316 +CONFIG_ENV_SIZE=0x4000
 317 +CONFIG_ENV_OFFSET=0xc0000
 318 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 319 +CONFIG_BOARD_LATE_INIT=y
 320 +CONFIG_RESET_BUTTON_SETTLE_DELAY=400
 321 +CONFIG_BOOTP_SEND_HOSTNAME=y
 322 +CONFIG_DEFAULT_ENV_FILE="ubnt_unifi-6-lr_env"
 323 +CONFIG_DEBUG_UART_BASE=0x11002000
 324 +CONFIG_DEBUG_UART_CLOCK=25000000
 325 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-ubnt-unifi-6-lr-v3"
 326 +CONFIG_DEBUG_UART=y
 327 +CONFIG_SMBIOS_PRODUCT_NAME=""
 328 +CONFIG_AUTOBOOT_KEYED=y
 329 +CONFIG_BOOTDELAY=30
 330 +CONFIG_AUTOBOOT_MENU_SHOW=y
 331 +CONFIG_CFB_CONSOLE_ANSI=y
 332 +CONFIG_BUTTON=y
 333 +CONFIG_BUTTON_GPIO=y
 334 +CONFIG_GPIO_HOG=y
 335 +CONFIG_CMD_ENV_FLAGS=y
 336 +CONFIG_FIT=y
 337 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 338 +CONFIG_LOGLEVEL=7
 339 +CONFIG_LOG=y
 340 +CONFIG_DEFAULT_FDT_FILE="mt7622-ubnt-unifi-6-lr-v3"
 341 +CONFIG_SYS_PROMPT="MT7622> "
 342 +# CONFIG_LEGACY_IMAGE_FORMAT is not set
 343 +# CONFIG_BOOTM_PLAN9 is not set
 344 +# CONFIG_BOOTM_RTEMS is not set
 345 +# CONFIG_BOOTM_VXWORKS is not set
 346 +# CONFIG_EFI is not set
 347 +# CONFIG_EFI_LOADER is not set
 348 +CONFIG_CMD_BOOTMENU=y
 349 +# CONFIG_CMD_BOOTEFI is not set
 350 +CONFIG_CMD_BOOTP=y
 351 +CONFIG_CMD_BUTTON=y
 352 +CONFIG_CMD_CDP=y
 353 +CONFIG_CMD_DHCP=y
 354 +CONFIG_CMD_DNS=y
 355 +CONFIG_CMD_ECHO=y
 356 +# CONFIG_CMD_ELF is not set
 357 +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
 358 +CONFIG_CMD_ENV_READMEM=y
 359 +CONFIG_CMD_ERASEENV=y
 360 +CONFIG_CMD_GPIO=y
 361 +CONFIG_CMD_HASH=y
 362 +CONFIG_CMD_ITEST=y
 363 +CONFIG_CMD_LED=y
 364 +CONFIG_CMD_LINK_LOCAL=y
 365 +# CONFIG_CMD_MBR is not set
 366 +CONFIG_CMD_MTD=y
 367 +CONFIG_CMD_MTDPARTS=y
 368 +# CONFIG_CMD_PCI is not set
 369 +CONFIG_CMD_SF_TEST=y
 370 +CONFIG_CMD_PING=y
 371 +CONFIG_CMD_PXE=y
 372 +CONFIG_CMD_SMC=y
 373 +CONFIG_CMD_TFTPBOOT=y
 374 +CONFIG_CMD_TFTPSRV=y
 375 +# CONFIG_CMD_UNLZ4 is not set
 376 +CONFIG_CMD_ASKENV=y
 377 +CONFIG_CMD_PSTORE=y
 378 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 379 +CONFIG_CMD_RARP=y
 380 +CONFIG_CMD_SETEXPR=y
 381 +CONFIG_CMD_SLEEP=y
 382 +CONFIG_CMD_SOURCE=y
 383 +CONFIG_CMD_UUID=y
 384 +CONFIG_DISPLAY_CPUINFO=y
 385 +CONFIG_DM_ETH=y
 386 +CONFIG_DM_ETH_PHY=y
 387 +CONFIG_DM_GPIO=y
 388 +CONFIG_DM_MDIO=y
 389 +CONFIG_DM_MTD=y
 390 +CONFIG_DM_REGULATOR=y
 391 +CONFIG_DM_REGULATOR_FIXED=y
 392 +CONFIG_DM_REGULATOR_GPIO=y
 393 +# CONFIG_DM_MMC is not set
 394 +CONFIG_DM_SERIAL=y
 395 +CONFIG_DM_SPI=y
 396 +CONFIG_DM_SPI_FLASH=y
 397 +CONFIG_HUSH_PARSER=y
 398 +# CONFIG_PARTITION_UUIDS is not set
 399 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 400 +# CONFIG_LED is not set
 401 +# CONFIG_LZ4 is not set
 402 +CONFIG_VERSION_VARIABLE=y
 403 +CONFIG_NETCONSOLE=y
 404 +CONFIG_REGMAP=y
 405 +CONFIG_SYSCON=y
 406 +CONFIG_CLK=y
 407 +CONFIG_PHY=y
 408 +CONFIG_PHY_FIXED=y
 409 +CONFIG_PHY_REALTEK=y
 410 +CONFIG_PHY_ADDR_ENABLE=y
 411 +CONFIG_PHY_ADDR=0
 412 +CONFIG_MEDIATEK_ETH=y
 413 +CONFIG_MTD=y
 414 +# CONFIG_MMC is not set
 415 +CONFIG_PINCTRL=y
 416 +CONFIG_PINCONF=y
 417 +CONFIG_PINCTRL_MT7622=y
 418 +CONFIG_POWER_DOMAIN=y
 419 +CONFIG_PRE_CONSOLE_BUFFER=y
 420 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 421 +CONFIG_MTK_POWER_DOMAIN=y
 422 +CONFIG_RAM=y
 423 +CONFIG_MTK_SERIAL=y
 424 +CONFIG_SPI=y
 425 +CONFIG_MTK_SNFI_SPI=y
 426 +CONFIG_MTK_SNOR=y
 427 +CONFIG_SYSRESET_WATCHDOG=y
 428 +CONFIG_WDT_MTK=y
 429 +CONFIG_HEXDUMP=y
 430 +CONFIG_RANDOM_UUID=y
 431 +CONFIG_REGEX=y
 432 +CONFIG_SPI_FLASH=y
 433 +CONFIG_SPI_FLASH_BAR=y
 434 +CONFIG_SPI_FLASH_MTD=y
 435 +CONFIG_SPI_FLASH_UNLOCK_ALL=y
 436 +CONFIG_SPI_FLASH_EON=y
 437 +CONFIG_SPI_FLASH_GIGADEVICE=y
 438 +CONFIG_SPI_FLASH_MACRONIX=y
 439 +CONFIG_SPI_FLASH_SPANSION=y
 440 +CONFIG_SPI_FLASH_STMICRO=y
 441 +CONFIG_SPI_FLASH_SST=y
 442 +CONFIG_SPI_FLASH_WINBOND=y
 443 +CONFIG_SPI_FLASH_XMC=y
 444 +CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 445 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 446 +CONFIG_USE_IPADDR=y
 447 +CONFIG_IPADDR="192.168.1.1"
 448 +CONFIG_USE_SERVERIP=y
 449 +CONFIG_SERVERIP="192.168.1.254"
 450 --- /dev/null
 451 +++ b/arch/arm/dts/mt7622-ubnt-unifi-6-lr.dts
 452 @@ -0,0 +1,193 @@
 453 +// SPDX-License-Identifier: GPL-2.0
 454 +/*
 455 + * Copyright (c) 2019 MediaTek Inc.
 456 + * Author: Sam Shih <sam.shih@mediatek.com>
 457 + */
 458 +
 459 +/dts-v1/;
 460 +#include <dt-bindings/input/linux-event-codes.h>
 461 +#include "mt7622.dtsi"
 462 +#include "mt7622-u-boot.dtsi"
 463 +
 464 +/ {
 465 +       #address-cells = <1>;
 466 +       #size-cells = <1>;
 467 +       model = "mt7622-ubnt-unifi-6-lr";
 468 +       compatible = "mediatek,mt7622", "ubnt,unifi-6-lr";
 469 +
 470 +       chosen {
 471 +               stdout-path = &uart0;
 472 +               tick-timer = &timer0;
 473 +       };
 474 +
 475 +       memory@40000000 {
 476 +               device_type = "memory";
 477 +               reg = <0x40000000 0x20000000>;
 478 +       };
 479 +
 480 +       aliases {
 481 +               spi0 = &snor;
 482 +       };
 483 +
 484 +       gpio-keys {
 485 +               compatible = "gpio-keys";
 486 +
 487 +               reset {
 488 +                       label = "reset";
 489 +                       gpios = <&gpio 62 GPIO_ACTIVE_LOW>;
 490 +                       linux,code = <KEY_RESTART>;
 491 +               };
 492 +       };
 493 +
 494 +       memory@40000000 {
 495 +               device_type = "memory";
 496 +               reg = <0x40000000 0x20000000>;
 497 +       };
 498 +
 499 +       reg_1p8v: regulator-1p8v {
 500 +               compatible = "regulator-fixed";
 501 +               regulator-name = "fixed-1.8V";
 502 +               regulator-min-microvolt = <1800000>;
 503 +               regulator-max-microvolt = <1800000>;
 504 +               regulator-boot-on;
 505 +               regulator-always-on;
 506 +       };
 507 +
 508 +       reg_3p3v: regulator-3p3v {
 509 +               compatible = "regulator-fixed";
 510 +               regulator-name = "fixed-3.3V";
 511 +               regulator-min-microvolt = <3300000>;
 512 +               regulator-max-microvolt = <3300000>;
 513 +               regulator-boot-on;
 514 +               regulator-always-on;
 515 +       };
 516 +
 517 +       reg_5v: regulator-5v {
 518 +               compatible = "regulator-fixed";
 519 +               regulator-name = "fixed-5V";
 520 +               regulator-min-microvolt = <5000000>;
 521 +               regulator-max-microvolt = <5000000>;
 522 +               regulator-boot-on;
 523 +               regulator-always-on;
 524 +       };
 525 +};
 526 +
 527 +&pcie {
 528 +       pinctrl-names = "default";
 529 +       pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
 530 +       status = "okay";
 531 +
 532 +       pcie@0,0 {
 533 +               status = "okay";
 534 +       };
 535 +
 536 +       pcie@1,0 {
 537 +               status = "okay";
 538 +       };
 539 +};
 540 +
 541 +&pinctrl {
 542 +       eth_pins: eth-pins {
 543 +               mux {
 544 +                       function = "eth";
 545 +                       groups = "mdc_mdio", "rgmii_via_gmac2";
 546 +               };
 547 +       };
 548 +
 549 +       pcie0_pins: pcie0-pins {
 550 +               mux {
 551 +                       function = "pcie";
 552 +                       groups = "pcie0_pad_perst",
 553 +                                "pcie0_1_waken",
 554 +                                "pcie0_1_clkreq";
 555 +               };
 556 +       };
 557 +
 558 +       pcie1_pins: pcie1-pins {
 559 +               mux {
 560 +                       function = "pcie";
 561 +                       groups = "pcie1_pad_perst",
 562 +                                "pcie1_0_waken",
 563 +                                "pcie1_0_clkreq";
 564 +               };
 565 +       };
 566 +
 567 +       snfi_pins: snfi-pins {
 568 +               mux {
 569 +                       function = "flash";
 570 +                       groups = "snfi";
 571 +               };
 572 +       };
 573 +
 574 +       snor_pins: snor-pins {
 575 +               mux {
 576 +                       function = "flash";
 577 +                       groups = "spi_nor";
 578 +               };
 579 +       };
 580 +
 581 +       uart0_pins: uart0 {
 582 +               mux {
 583 +                       function = "uart";
 584 +                       groups = "uart0_0_tx_rx" ;
 585 +               };
 586 +       };
 587 +
 588 +       watchdog_pins: watchdog-default {
 589 +               mux {
 590 +                       function = "watchdog";
 591 +                       groups = "watchdog";
 592 +               };
 593 +       };
 594 +};
 595 +
 596 +&snor {
 597 +       pinctrl-names = "default";
 598 +       pinctrl-0 = <&snor_pins>;
 599 +       status = "okay";
 600 +
 601 +       spi-flash@0 {
 602 +               compatible = "jedec,spi-nor";
 603 +               reg = <0>;
 604 +               spi-tx-bus-width = <1>;
 605 +               spi-rx-bus-width = <4>;
 606 +               u-boot,dm-pre-reloc;
 607 +       };
 608 +};
 609 +
 610 +&uart0 {
 611 +       mediatek,force-highspeed;
 612 +       status = "okay";
 613 +};
 614 +
 615 +&watchdog {
 616 +       pinctrl-names = "default";
 617 +       pinctrl-0 = <&watchdog_pins>;
 618 +       status = "okay";
 619 +};
 620 +
 621 +&eth {
 622 +       status = "okay";
 623 +       pinctrl-names = "default";
 624 +       pinctrl-0 = <&eth_pins>;
 625 +
 626 +       mediatek,gmac-id = <0>;
 627 +       phy-mode = "2500base-x";
 628 +       phy-handle = <&gphy>;
 629 +
 630 +       fixed-link {
 631 +               speed = <2500>;
 632 +               full-duplex;
 633 +       };
 634 +
 635 +       mdio-bus {
 636 +               #address-cells = <1>;
 637 +               #size-cells = <0>;
 638 +
 639 +               gphy: ethernet-phy@8 {
 640 +                       /* Marvell AQRate AQR112W - no driver */
 641 +                       compatible = "ethernet-phy-ieee802.3-c45";
 642 +                       reg = <0x8>;
 643 +               };
 644 +       };
 645 +};
 646 --- /dev/null
 647 +++ b/arch/arm/dts/mt7622-ubnt-unifi-6-lr-v3.dts
 648 @@ -0,0 +1,193 @@
 649 +// SPDX-License-Identifier: GPL-2.0
 650 +/*
 651 + * Copyright (c) 2019 MediaTek Inc.
 652 + * Author: Sam Shih <sam.shih@mediatek.com>
 653 + */
 654 +
 655 +/dts-v1/;
 656 +#include <dt-bindings/input/linux-event-codes.h>
 657 +#include "mt7622.dtsi"
 658 +#include "mt7622-u-boot.dtsi"
 659 +
 660 +/ {
 661 +       #address-cells = <1>;
 662 +       #size-cells = <1>;
 663 +       model = "mt7622-ubnt-unifi-6-lr-v3";
 664 +       compatible = "mediatek,mt7622", "ubnt,unifi-6-lr-v3";
 665 +
 666 +       chosen {
 667 +               stdout-path = &uart0;
 668 +               tick-timer = &timer0;
 669 +       };
 670 +
 671 +       memory@40000000 {
 672 +               device_type = "memory";
 673 +               reg = <0x40000000 0x20000000>;
 674 +       };
 675 +
 676 +       aliases {
 677 +               spi0 = &snor;
 678 +       };
 679 +
 680 +       gpio-keys {
 681 +               compatible = "gpio-keys";
 682 +
 683 +               reset {
 684 +                       label = "reset";
 685 +                       gpios = <&gpio 62 GPIO_ACTIVE_LOW>;
 686 +                       linux,code = <KEY_RESTART>;
 687 +               };
 688 +       };
 689 +
 690 +       memory@40000000 {
 691 +               device_type = "memory";
 692 +               reg = <0x40000000 0x20000000>;
 693 +       };
 694 +
 695 +       reg_1p8v: regulator-1p8v {
 696 +               compatible = "regulator-fixed";
 697 +               regulator-name = "fixed-1.8V";
 698 +               regulator-min-microvolt = <1800000>;
 699 +               regulator-max-microvolt = <1800000>;
 700 +               regulator-boot-on;
 701 +               regulator-always-on;
 702 +       };
 703 +
 704 +       reg_3p3v: regulator-3p3v {
 705 +               compatible = "regulator-fixed";
 706 +               regulator-name = "fixed-3.3V";
 707 +               regulator-min-microvolt = <3300000>;
 708 +               regulator-max-microvolt = <3300000>;
 709 +               regulator-boot-on;
 710 +               regulator-always-on;
 711 +       };
 712 +
 713 +       reg_5v: regulator-5v {
 714 +               compatible = "regulator-fixed";
 715 +               regulator-name = "fixed-5V";
 716 +               regulator-min-microvolt = <5000000>;
 717 +               regulator-max-microvolt = <5000000>;
 718 +               regulator-boot-on;
 719 +               regulator-always-on;
 720 +       };
 721 +};
 722 +
 723 +&pcie {
 724 +       pinctrl-names = "default";
 725 +       pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
 726 +       status = "okay";
 727 +
 728 +       pcie@0,0 {
 729 +               status = "okay";
 730 +       };
 731 +
 732 +       pcie@1,0 {
 733 +               status = "okay";
 734 +       };
 735 +};
 736 +
 737 +&pinctrl {
 738 +       eth_pins: eth-pins {
 739 +               mux {
 740 +                       function = "eth";
 741 +                       groups = "mdc_mdio", "rgmii_via_gmac2";
 742 +               };
 743 +       };
 744 +
 745 +       pcie0_pins: pcie0-pins {
 746 +               mux {
 747 +                       function = "pcie";
 748 +                       groups = "pcie0_pad_perst",
 749 +                                "pcie0_1_waken",
 750 +                                "pcie0_1_clkreq";
 751 +               };
 752 +       };
 753 +
 754 +       pcie1_pins: pcie1-pins {
 755 +               mux {
 756 +                       function = "pcie";
 757 +                       groups = "pcie1_pad_perst",
 758 +                                "pcie1_0_waken",
 759 +                                "pcie1_0_clkreq";
 760 +               };
 761 +       };
 762 +
 763 +       snfi_pins: snfi-pins {
 764 +               mux {
 765 +                       function = "flash";
 766 +                       groups = "snfi";
 767 +               };
 768 +       };
 769 +
 770 +       snor_pins: snor-pins {
 771 +               mux {
 772 +                       function = "flash";
 773 +                       groups = "spi_nor";
 774 +               };
 775 +       };
 776 +
 777 +       uart0_pins: uart0 {
 778 +               mux {
 779 +                       function = "uart";
 780 +                       groups = "uart0_0_tx_rx" ;
 781 +               };
 782 +       };
 783 +
 784 +       watchdog_pins: watchdog-default {
 785 +               mux {
 786 +                       function = "watchdog";
 787 +                       groups = "watchdog";
 788 +               };
 789 +       };
 790 +};
 791 +
 792 +&snor {
 793 +       pinctrl-names = "default";
 794 +       pinctrl-0 = <&snor_pins>;
 795 +       status = "okay";
 796 +
 797 +       spi-flash@0 {
 798 +               compatible = "jedec,spi-nor";
 799 +               reg = <0>;
 800 +               spi-tx-bus-width = <1>;
 801 +               spi-rx-bus-width = <4>;
 802 +               u-boot,dm-pre-reloc;
 803 +       };
 804 +};
 805 +
 806 +&uart0 {
 807 +       mediatek,force-highspeed;
 808 +       status = "okay";
 809 +};
 810 +
 811 +&watchdog {
 812 +       pinctrl-names = "default";
 813 +       pinctrl-0 = <&watchdog_pins>;
 814 +       status = "okay";
 815 +};
 816 +
 817 +&eth {
 818 +       status = "okay";
 819 +       pinctrl-names = "default";
 820 +       pinctrl-0 = <&eth_pins>;
 821 +
 822 +       mediatek,gmac-id = <0>;
 823 +       phy-mode = "sgmii";
 824 +       phy-handle = <&gphy>;
 825 +
 826 +       fixed-link {
 827 +               speed = <2500>;
 828 +               full-duplex;
 829 +       };
 830 +
 831 +       mdio-bus {
 832 +               #address-cells = <1>;
 833 +               #size-cells = <0>;
 834 +
 835 +               gphy: ethernet-phy@0 {
 836 +                       /* RealTek RTL8211FS */
 837 +                       compatible = "ethernet-phy-ieee802.3-c22";
 838 +                       reg = <0x0>;
 839 +               };
 840 +       };
 841 +};
 842 --- a/arch/arm/dts/Makefile
 843 +++ b/arch/arm/dts/Makefile
 844 @@ -1306,6 +1306,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
 845         mt7623a-unielec-u7623-02-emmc.dtb \
 846         mt7622-bananapi-bpi-r64.dtb \
 847         mt7622-linksys-e8450-ubi.dtb \
 848 +       mt7622-ubnt-unifi-6-lr.dtb \
 849 +       mt7622-ubnt-unifi-6-lr-v3.dtb \
 850         mt7623n-bananapi-bpi-r2.dtb \
 851         mt7629-rfb.dtb \
 852         mt7981-rfb.dtb \
 853 --- /dev/null
 854 +++ b/ubnt_unifi-6-lr_env
 855 @@ -0,0 +1,50 @@
 856 +ethaddr_factory=mtd read nor0 $loadaddr 0x110000 0x10000 && env readmem -b ethaddr $loadaddr 0x6 ; setenv ethaddr_factory
 857 +ipaddr=192.168.1.1
 858 +serverip=192.168.1.254
 859 +loadaddr=0x48000000
 860 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_nor ; fi
 861 +bootdelay=0
 862 +bootfile=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v1-ubootmod-initramfs-recovery.itb
 863 +bootfile_bl2=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v1-ubootmod-preloader.bin
 864 +bootfile_fip=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v1-ubootmod-bl31-uboot.fip
 865 +bootfile_upg=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v1-ubootmod-squashfs-sysupgrade.itb
 866 +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
 867 +bootmenu_default=0
 868 +bootmenu_delay=0
 869 +bootmenu_title=      \e[0;34m( ( ( \e[1;39mOpenWrt\e[0;34m ) ) )\e[0m
 870 +bootmenu_0=Initialize environment.=run _firstboot
 871 +bootmenu_0d=Run default boot command.=run boot_default
 872 +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
 873 +bootmenu_2=Boot production system from flash.=run boot_production ; run bootmenu_confirm_return
 874 +bootmenu_3=Boot recovery system from flash.=run boot_recovery ; run bootmenu_confirm_return
 875 +bootmenu_4=Load production system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 876 +bootmenu_5=Load recovery system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 877 +bootmenu_6=\e[31mLoad BL31+U-Boot FIP via TFTP then write to flash.\e[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
 878 +bootmenu_7=\e[31mLoad BL2 preloader via TFTP then write to flash.\e[0m=run boot_tftp_write_preloader ; run bootmenu_confirm_return
 879 +bootmenu_8=Reboot.=reset
 880 +bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
 881 +boot_first=if button reset ; then run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
 882 +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
 883 +boot_production=run nor_read_production && bootm $loadaddr
 884 +boot_recovery=run nor_read_recovery ; bootm $loadaddr
 885 +boot_serial_write_fip=loadx $loadaddr 115200 && run boot_write_fip
 886 +boot_serial_write_preloader=loadx $loadaddr 115200 && run boot_write_preloader
 887 +boot_tftp_forever=while true ; do run boot_tftp_recovery ; sleep 1 ; done
 888 +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run nor_write_production ; if env exists noboot ; then else bootm $loadaddr ; fi
 889 +boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run nor_write_recovery ; if env exists noboot ; then else bootm $loadaddr ; fi
 890 +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr
 891 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip
 892 +boot_tftp_write_preloader=tftpboot $loadaddr $bootfile_bl2 && run boot_write_preloader
 893 +boot_nor=run boot_production ; run boot_recovery
 894 +boot_write_fip=mtd erase nor0 0x20000 0x80000 && mtd write nor0 $loadaddr 0x20000 0x80000
 895 +boot_write_preloader=mtd erase nor0 0x0 0x20000 && mtd write nor0 $loadaddr 0x0 0x20000
 896 +reset_factory=mtd erase nor0 0xc0000 0x10000 && reset
 897 +nor_read_production=mtd read nor0 $loadaddr 0x1000000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x1000000 $image_size
 898 +nor_read_recovery=mtd read nor0 $loadaddr 0x120000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x120000 $image_size
 899 +nor_pad_size=imsz $loadaddr image_size ; setexpr image_eb 0x$image_size / 0x1000 ; setexpr tmp1 0x$image_size % 0x1000 ; test 0x$tmp1 -gt 0 && setexpr image_eb 0x$image_eb + 1 ; setexpr image_eb 0x$image_eb * 0x1000
 900 +nor_write_production=run nor_pad_size ; test 0x$image_eb -le 0x3000000 && mtd erase nor0 0x1000000 0x$image_eb && mtd write nor0 $loadaddr 0x1000000 $filesize
 901 +nor_write_recovery=run nor_pad_size ; test 0x$image_eb -le 0xee0000 && mtd erase nor0 0x120000 0x$image_eb && mtd write nor0 $loadaddr 0x120000 $filesize
 902 +_init_env=setenv _init_env ; saveenv
 903 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run ethaddr_factory ; run _init_env ; run boot_first
 904 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
 905 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       \e[33m$ver\e[0m"
 906 --- /dev/null
 907 +++ b/ubnt_unifi-6-lr-v2_env
 908 @@ -0,0 +1,50 @@
 909 +ethaddr_factory=mtd read nor0 $loadaddr 0x110000 0x10000 && env readmem -b ethaddr $loadaddr 0x6 ; setenv ethaddr_factory
 910 +ipaddr=192.168.1.1
 911 +serverip=192.168.1.254
 912 +loadaddr=0x48000000
 913 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_nor ; fi
 914 +bootdelay=0
 915 +bootfile=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v2-ubootmod-initramfs-recovery.itb
 916 +bootfile_bl2=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v2-ubootmod-preloader.bin
 917 +bootfile_fip=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v2-ubootmod-bl31-uboot.fip
 918 +bootfile_upg=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v2-ubootmod-squashfs-sysupgrade.itb
 919 +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
 920 +bootmenu_default=0
 921 +bootmenu_delay=0
 922 +bootmenu_title=      \e[0;34m( ( ( \e[1;39mOpenWrt\e[0;34m ) ) )\e[0m
 923 +bootmenu_0=Initialize environment.=run _firstboot
 924 +bootmenu_0d=Run default boot command.=run boot_default
 925 +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
 926 +bootmenu_2=Boot production system from flash.=run boot_production ; run bootmenu_confirm_return
 927 +bootmenu_3=Boot recovery system from flash.=run boot_recovery ; run bootmenu_confirm_return
 928 +bootmenu_4=Load production system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 929 +bootmenu_5=Load recovery system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 930 +bootmenu_6=\e[31mLoad BL31+U-Boot FIP via TFTP then write to flash.\e[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
 931 +bootmenu_7=\e[31mLoad BL2 preloader via TFTP then write to flash.\e[0m=run boot_tftp_write_preloader ; run bootmenu_confirm_return
 932 +bootmenu_8=Reboot.=reset
 933 +bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
 934 +boot_first=if button reset ; then run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
 935 +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
 936 +boot_production=run nor_read_production && bootm $loadaddr
 937 +boot_recovery=run nor_read_recovery ; bootm $loadaddr
 938 +boot_serial_write_fip=loadx $loadaddr 115200 && run boot_write_fip
 939 +boot_serial_write_preloader=loadx $loadaddr 115200 && run boot_write_preloader
 940 +boot_tftp_forever=while true ; do run boot_tftp_recovery ; sleep 1 ; done
 941 +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run nor_write_production ; if env exists noboot ; then else bootm $loadaddr ; fi
 942 +boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run nor_write_recovery ; if env exists noboot ; then else bootm $loadaddr ; fi
 943 +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr
 944 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip
 945 +boot_tftp_write_preloader=tftpboot $loadaddr $bootfile_bl2 && run boot_write_preloader
 946 +boot_nor=run boot_production ; run boot_recovery
 947 +boot_write_fip=mtd erase nor0 0x20000 0x80000 && mtd write nor0 $loadaddr 0x20000 0x80000
 948 +boot_write_preloader=mtd erase nor0 0x0 0x20000 && mtd write nor0 $loadaddr 0x0 0x20000
 949 +reset_factory=mtd erase nor0 0xc0000 0x10000 && reset
 950 +nor_read_production=mtd read nor0 $loadaddr 0x1000000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x1000000 $image_size
 951 +nor_read_recovery=mtd read nor0 $loadaddr 0x120000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x120000 $image_size
 952 +nor_pad_size=imsz $loadaddr image_size ; setexpr image_eb 0x$image_size / 0x1000 ; setexpr tmp1 0x$image_size % 0x1000 ; test 0x$tmp1 -gt 0 && setexpr image_eb 0x$image_eb + 1 ; setexpr image_eb 0x$image_eb * 0x1000
 953 +nor_write_production=run nor_pad_size ; test 0x$image_eb -le 0x3000000 && mtd erase nor0 0x1000000 0x$image_eb && mtd write nor0 $loadaddr 0x1000000 $filesize
 954 +nor_write_recovery=run nor_pad_size ; test 0x$image_eb -le 0xee0000 && mtd erase nor0 0x120000 0x$image_eb && mtd write nor0 $loadaddr 0x120000 $filesize
 955 +_init_env=setenv _init_env ; saveenv
 956 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run ethaddr_factory ; run _init_env ; run boot_first
 957 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
 958 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       \e[33m$ver\e[0m"--- /dev/null
 959 --- /dev/null
 960 +++ b/ubnt_unifi-6-lr-v3_env
 961 @@ -0,0 +1,50 @@
 962 +ethaddr_factory=mtd read nor0 $loadaddr 0x110000 0x10000 && env readmem -b ethaddr $loadaddr 0x6 ; setenv ethaddr_factory
 963 +ipaddr=192.168.1.1
 964 +serverip=192.168.1.254
 965 +loadaddr=0x48000000
 966 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_nor ; fi
 967 +bootdelay=0
 968 +bootfile=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v3-ubootmod-initramfs-recovery.itb
 969 +bootfile_bl2=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v3-ubootmod-preloader.bin
 970 +bootfile_fip=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v3-ubootmod-bl31-uboot.fip
 971 +bootfile_upg=openwrt-mediatek-mt7622-ubnt_unifi-6-lr-v3-ubootmod-squashfs-sysupgrade.itb
 972 +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
 973 +bootmenu_default=0
 974 +bootmenu_delay=0
 975 +bootmenu_title=      \e[0;34m( ( ( \e[1;39mOpenWrt\e[0;34m ) ) )\e[0m
 976 +bootmenu_0=Initialize environment.=run _firstboot
 977 +bootmenu_0d=Run default boot command.=run boot_default
 978 +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
 979 +bootmenu_2=Boot production system from flash.=run boot_production ; run bootmenu_confirm_return
 980 +bootmenu_3=Boot recovery system from flash.=run boot_recovery ; run bootmenu_confirm_return
 981 +bootmenu_4=Load production system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 982 +bootmenu_5=Load recovery system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
 983 +bootmenu_6=\e[31mLoad BL31+U-Boot FIP via TFTP then write to flash.\e[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
 984 +bootmenu_7=\e[31mLoad BL2 preloader via TFTP then write to flash.\e[0m=run boot_tftp_write_preloader ; run bootmenu_confirm_return
 985 +bootmenu_8=Reboot.=reset
 986 +bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
 987 +boot_first=if button reset ; then run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
 988 +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
 989 +boot_production=run nor_read_production && bootm $loadaddr
 990 +boot_recovery=run nor_read_recovery ; bootm $loadaddr
 991 +boot_serial_write_fip=loadx $loadaddr 115200 && run boot_write_fip
 992 +boot_serial_write_preloader=loadx $loadaddr 115200 && run boot_write_preloader
 993 +boot_tftp_forever=while true ; do run boot_tftp_recovery ; sleep 1 ; done
 994 +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run nor_write_production ; if env exists noboot ; then else bootm $loadaddr ; fi
 995 +boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run nor_write_recovery ; if env exists noboot ; then else bootm $loadaddr ; fi
 996 +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr
 997 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip
 998 +boot_tftp_write_preloader=tftpboot $loadaddr $bootfile_bl2 && run boot_write_preloader
 999 +boot_nor=run boot_production ; run boot_recovery
1000 +boot_write_fip=mtd erase nor0 0x20000 0x80000 && mtd write nor0 $loadaddr 0x20000 0x80000
1001 +boot_write_preloader=mtd erase nor0 0x0 0x20000 && mtd write nor0 $loadaddr 0x0 0x20000
1002 +reset_factory=mtd erase nor0 0xc0000 0x10000 && reset
1003 +nor_read_production=mtd read nor0 $loadaddr 0x1000000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x1000000 $image_size
1004 +nor_read_recovery=mtd read nor0 $loadaddr 0x120000 0x1000 && imsz $loadaddr image_size && mtd read nor0 $loadaddr 0x120000 $image_size
1005 +nor_pad_size=imsz $loadaddr image_size ; setexpr image_eb 0x$image_size / 0x1000 ; setexpr tmp1 0x$image_size % 0x1000 ; test 0x$tmp1 -gt 0 && setexpr image_eb 0x$image_eb + 1 ; setexpr image_eb 0x$image_eb * 0x1000
1006 +nor_write_production=run nor_pad_size ; test 0x$image_eb -le 0x3000000 && mtd erase nor0 0x1000000 0x$image_eb && mtd write nor0 $loadaddr 0x1000000 $filesize
1007 +nor_write_recovery=run nor_pad_size ; test 0x$image_eb -le 0xee0000 && mtd erase nor0 0x120000 0x$image_eb && mtd write nor0 $loadaddr 0x120000 $filesize
1008 +_init_env=setenv _init_env ; saveenv
1009 +_firstboot=setenv _firstboot ; run _switch_to_menu ; run ethaddr_factory ; run _init_env ; run boot_first
1010 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
1011 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       \e[33m$ver\e[0m"
1012 --- a/common/board_r.c
1013 +++ b/common/board_r.c
1014 @@ -66,6 +66,7 @@
1015  #include <asm-generic/gpio.h>
1016  #include <efi_loader.h>
1017  #include <relocate.h>
1018 +#include <spi_flash.h>
1019
1020  DECLARE_GLOBAL_DATA_PTR;
1021
1022 @@ -412,6 +413,20 @@ static int initr_onenand(void)
1023  }
1024  #endif
1025
1026 +#if defined(CONFIG_SPI_FLASH)
1027 +/* probe SPI FLASH */
1028 +static int initr_spiflash(void)
1029 +{
1030 +       struct udevice *new;
1031 +
1032 +spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS,
1033 +                       CONFIG_SF_DEFAULT_CS,
1034 +                       &new);
1035 +
1036 +       return 0;
1037 +}
1038 +#endif
1039 +
1040  #ifdef CONFIG_MMC
1041  static int initr_mmc(void)
1042  {
1043 @@ -713,6 +728,9 @@ static init_fnc_t init_sequence_r[] = {
1044  #ifdef CONFIG_NMBM_MTD
1045         initr_nmbm,
1046  #endif
1047 +#ifdef CONFIG_SPI_FLASH
1048 +       initr_spiflash,
1049 +#endif
1050  #ifdef CONFIG_MMC
1051         initr_mmc,
1052  #endif