package/boot/uboot-mediatek/patches/101-12-pinctrl-mediatek-convert-most-definitions-to-const.patch

   1 From 30227fcf55ac95ad6778de2fc3e6d1e00cf82566 Mon Sep 17 00:00:00 2001
   2 From: Weijie Gao <weijie.gao@mediatek.com>
   3 Date: Wed, 19 Jul 2023 17:16:37 +0800
   4 Subject: [PATCH 12/29] pinctrl: mediatek: convert most definitions to const
   5
   6 There exists a situation of the mediatek pinctrl driver that may return
   7 wrong pin function value for the pinmux driver:
   8 - All pin function arrays are defined without const
   9 - Some pin function arrays contain all-zero value, e.g.:
  10   static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, };
  11 - These arrays will be put into .bss section during compilation
  12 - .bss section has no "a" attribute and does not exist in the final binary
  13   file after objcopy.
  14 - FDT binary blob is appended to the u-boot binary, which occupies the
  15   .bss section.
  16 - During board_f stage, .bss has not been initialized, and contains the
  17   data of FDT, which is not full-zero data.
  18 - pinctrl driver is initialized in board_f stage, and it will get wrong
  19   data if another driver is going to set default pinctrl.
  20
  21 Since pinmux information and soc data are only meant to be read-only, thus
  22 should be declared as const. This will force all pinctrl data being put
  23 into .rodata section. Since .rodata has "a" attribute, even the all-zero
  24 data will be allocated and filled with correct value in to u-boot binary.
  25
  26 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  27 ---
  28  drivers/pinctrl/mediatek/pinctrl-mt7622.c     | 474 ++++++-------
  29  drivers/pinctrl/mediatek/pinctrl-mt7623.c     | 650 +++++++++---------
  30  drivers/pinctrl/mediatek/pinctrl-mt7629.c     | 174 ++---
  31  drivers/pinctrl/mediatek/pinctrl-mt7981.c     | 270 ++++----
  32  drivers/pinctrl/mediatek/pinctrl-mt7986.c     | 145 ++--
  33  drivers/pinctrl/mediatek/pinctrl-mt8512.c     |  24 +-
  34  drivers/pinctrl/mediatek/pinctrl-mt8516.c     |  18 +-
  35  drivers/pinctrl/mediatek/pinctrl-mt8518.c     |  20 +-
  36  drivers/pinctrl/mediatek/pinctrl-mtk-common.c |   4 +-
  37  drivers/pinctrl/mediatek/pinctrl-mtk-common.h |   8 +-
  38  10 files changed, 898 insertions(+), 889 deletions(-)
  39
  40 --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c
  41 +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
  42 @@ -233,283 +233,285 @@ static const struct mtk_pin_desc mt7622_
  43   */
  44
  45  /* EMMC */
  46 -static int mt7622_emmc_pins[] = { 40, 41, 42, 43, 44, 45, 47, 48, 49, 50, };
  47 -static int mt7622_emmc_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
  48 +static const int mt7622_emmc_pins[] = {
  49 +       40, 41, 42, 43, 44, 45, 47, 48, 49, 50, };
  50 +static const int mt7622_emmc_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
  51
  52 -static int mt7622_emmc_rst_pins[] = { 37, };
  53 -static int mt7622_emmc_rst_funcs[] = { 1, };
  54 +static const int mt7622_emmc_rst_pins[] = { 37, };
  55 +static const int mt7622_emmc_rst_funcs[] = { 1, };
  56
  57  /* LED for EPHY */
  58 -static int mt7622_ephy_leds_pins[] = { 86, 91, 92, 93, 94, };
  59 -static int mt7622_ephy_leds_funcs[] = { 0, 0, 0, 0, 0, };
  60 -static int mt7622_ephy0_led_pins[] = { 86, };
  61 -static int mt7622_ephy0_led_funcs[] = { 0, };
  62 -static int mt7622_ephy1_led_pins[] = { 91, };
  63 -static int mt7622_ephy1_led_funcs[] = { 2, };
  64 -static int mt7622_ephy2_led_pins[] = { 92, };
  65 -static int mt7622_ephy2_led_funcs[] = { 2, };
  66 -static int mt7622_ephy3_led_pins[] = { 93, };
  67 -static int mt7622_ephy3_led_funcs[] = { 2, };
  68 -static int mt7622_ephy4_led_pins[] = { 94, };
  69 -static int mt7622_ephy4_led_funcs[] = { 2, };
  70 +static const int mt7622_ephy_leds_pins[] = { 86, 91, 92, 93, 94, };
  71 +static const int mt7622_ephy_leds_funcs[] = { 0, 0, 0, 0, 0, };
  72 +static const int mt7622_ephy0_led_pins[] = { 86, };
  73 +static const int mt7622_ephy0_led_funcs[] = { 0, };
  74 +static const int mt7622_ephy1_led_pins[] = { 91, };
  75 +static const int mt7622_ephy1_led_funcs[] = { 2, };
  76 +static const int mt7622_ephy2_led_pins[] = { 92, };
  77 +static const int mt7622_ephy2_led_funcs[] = { 2, };
  78 +static const int mt7622_ephy3_led_pins[] = { 93, };
  79 +static const int mt7622_ephy3_led_funcs[] = { 2, };
  80 +static const int mt7622_ephy4_led_pins[] = { 94, };
  81 +static const int mt7622_ephy4_led_funcs[] = { 2, };
  82
  83  /* Embedded Switch */
  84 -static int mt7622_esw_pins[] = { 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
  85 -                                62, 63, 64, 65, 66, 67, 68, 69, 70, };
  86 -static int mt7622_esw_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  87 -                                 0, 0, 0, 0, 0, 0, 0, 0, 0, };
  88 -static int mt7622_esw_p0_p1_pins[] = { 51, 52, 53, 54, 55, 56, 57, 58, };
  89 -static int mt7622_esw_p0_p1_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
  90 -static int mt7622_esw_p2_p3_p4_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66, 67,
  91 -                                         68, 69, 70, };
  92 -static int mt7622_esw_p2_p3_p4_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0,
  93 -                                          0, 0, 0, };
  94 +static const int mt7622_esw_pins[] = {
  95 +       51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
  96 +       69, 70, };
  97 +static const int mt7622_esw_funcs[] = {
  98 +       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
  99 +static const int mt7622_esw_p0_p1_pins[] = { 51, 52, 53, 54, 55, 56, 57, 58, };
 100 +static const int mt7622_esw_p0_p1_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, };
 101 +static const int mt7622_esw_p2_p3_p4_pins[] = {
 102 +       59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, };
 103 +static const int mt7622_esw_p2_p3_p4_funcs[] = {
 104 +       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
 105  /* RGMII via ESW */
 106 -static int mt7622_rgmii_via_esw_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66,
 107 -                                          67, 68, 69, 70, };
 108 -static int mt7622_rgmii_via_esw_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 109 -                                           0, };
 110 +static const int mt7622_rgmii_via_esw_pins[] = {
 111 +       59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, };
 112 +static const int mt7622_rgmii_via_esw_funcs[] = {
 113 +       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
 114
 115  /* RGMII via GMAC1 */
 116 -static int mt7622_rgmii_via_gmac1_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66,
 117 -                                            67, 68, 69, 70, };
 118 -static int mt7622_rgmii_via_gmac1_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
 119 -                                             2, };
 120 +static const int mt7622_rgmii_via_gmac1_pins[] = {
 121 +       59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, };
 122 +static const int mt7622_rgmii_via_gmac1_funcs[] = {
 123 +       2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
 124
 125  /* RGMII via GMAC2 */
 126 -static int mt7622_rgmii_via_gmac2_pins[] = { 25, 26, 27, 28, 29, 30, 31, 32,
 127 -                                            33, 34, 35, 36, };
 128 -static int mt7622_rgmii_via_gmac2_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 129 -                                             0, };
 130 +static const int mt7622_rgmii_via_gmac2_pins[] = {
 131 +       25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, };
 132 +static const int mt7622_rgmii_via_gmac2_funcs[] = {
 133 +       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
 134
 135  /* I2C */
 136 -static int mt7622_i2c0_pins[] = { 14, 15, };
 137 -static int mt7622_i2c0_funcs[] = { 0, 0, };
 138 -static int mt7622_i2c1_0_pins[] = { 55, 56, };
 139 -static int mt7622_i2c1_0_funcs[] = { 0, 0, };
 140 -static int mt7622_i2c1_1_pins[] = { 73, 74, };
 141 -static int mt7622_i2c1_1_funcs[] = { 3, 3, };
 142 -static int mt7622_i2c1_2_pins[] = { 87, 88, };
 143 -static int mt7622_i2c1_2_funcs[] = { 0, 0, };
 144 -static int mt7622_i2c2_0_pins[] = { 57, 58, };
 145 -static int mt7622_i2c2_0_funcs[] = { 0, 0, };
 146 -static int mt7622_i2c2_1_pins[] = { 75, 76, };
 147 -static int mt7622_i2c2_1_funcs[] = { 3, 3, };
 148 -static int mt7622_i2c2_2_pins[] = { 89, 90, };
 149 -static int mt7622_i2c2_2_funcs[] = { 0, 0, };
 150 +static const int mt7622_i2c0_pins[] = { 14, 15, };
 151 +static const int mt7622_i2c0_funcs[] = { 0, 0, };
 152 +static const int mt7622_i2c1_0_pins[] = { 55, 56, };
 153 +static const int mt7622_i2c1_0_funcs[] = { 0, 0, };
 154 +static const int mt7622_i2c1_1_pins[] = { 73, 74, };
 155 +static const int mt7622_i2c1_1_funcs[] = { 3, 3, };
 156 +static const int mt7622_i2c1_2_pins[] = { 87, 88, };
 157 +static const int mt7622_i2c1_2_funcs[] = { 0, 0, };
 158 +static const int mt7622_i2c2_0_pins[] = { 57, 58, };
 159 +static const int mt7622_i2c2_0_funcs[] = { 0, 0, };
 160 +static const int mt7622_i2c2_1_pins[] = { 75, 76, };
 161 +static const int mt7622_i2c2_1_funcs[] = { 3, 3, };
 162 +static const int mt7622_i2c2_2_pins[] = { 89, 90, };
 163 +static const int mt7622_i2c2_2_funcs[] = { 0, 0, };
 164
 165  /* I2S */
 166 -static int mt7622_i2s_in_mclk_bclk_ws_pins[] = { 3, 4, 5, };
 167 -static int mt7622_i2s_in_mclk_bclk_ws_funcs[] = { 3, 3, 0, };
 168 -static int mt7622_i2s1_in_data_pins[] = { 1, };
 169 -static int mt7622_i2s1_in_data_funcs[] = { 0, };
 170 -static int mt7622_i2s2_in_data_pins[] = { 16, };
 171 -static int mt7622_i2s2_in_data_funcs[] = { 0, };
 172 -static int mt7622_i2s3_in_data_pins[] = { 17, };
 173 -static int mt7622_i2s3_in_data_funcs[] = { 0, };
 174 -static int mt7622_i2s4_in_data_pins[] = { 18, };
 175 -static int mt7622_i2s4_in_data_funcs[] = { 0, };
 176 -static int mt7622_i2s_out_mclk_bclk_ws_pins[] = { 3, 4, 5, };
 177 -static int mt7622_i2s_out_mclk_bclk_ws_funcs[] = { 0, 0, 0, };
 178 -static int mt7622_i2s1_out_data_pins[] = { 2, };
 179 -static int mt7622_i2s1_out_data_funcs[] = { 0, };
 180 -static int mt7622_i2s2_out_data_pins[] = { 19, };
 181 -static int mt7622_i2s2_out_data_funcs[] = { 0, };
 182 -static int mt7622_i2s3_out_data_pins[] = { 20, };
 183 -static int mt7622_i2s3_out_data_funcs[] = { 0, };
 184 -static int mt7622_i2s4_out_data_pins[] = { 21, };
 185 -static int mt7622_i2s4_out_data_funcs[] = { 0, };
 186 +static const int mt7622_i2s_in_mclk_bclk_ws_pins[] = { 3, 4, 5, };
 187 +static const int mt7622_i2s_in_mclk_bclk_ws_funcs[] = { 3, 3, 0, };
 188 +static const int mt7622_i2s1_in_data_pins[] = { 1, };
 189 +static const int mt7622_i2s1_in_data_funcs[] = { 0, };
 190 +static const int mt7622_i2s2_in_data_pins[] = { 16, };
 191 +static const int mt7622_i2s2_in_data_funcs[] = { 0, };
 192 +static const int mt7622_i2s3_in_data_pins[] = { 17, };
 193 +static const int mt7622_i2s3_in_data_funcs[] = { 0, };
 194 +static const int mt7622_i2s4_in_data_pins[] = { 18, };
 195 +static const int mt7622_i2s4_in_data_funcs[] = { 0, };
 196 +static const int mt7622_i2s_out_mclk_bclk_ws_pins[] = { 3, 4, 5, };
 197 +static const int mt7622_i2s_out_mclk_bclk_ws_funcs[] = { 0, 0, 0, };
 198 +static const int mt7622_i2s1_out_data_pins[] = { 2, };
 199 +static const int mt7622_i2s1_out_data_funcs[] = { 0, };
 200 +static const int mt7622_i2s2_out_data_pins[] = { 19, };
 201 +static const int mt7622_i2s2_out_data_funcs[] = { 0, };
 202 +static const int mt7622_i2s3_out_data_pins[] = { 20, };
 203 +static const int mt7622_i2s3_out_data_funcs[] = { 0, };
 204 +static const int mt7622_i2s4_out_data_pins[] = { 21, };
 205 +static const int mt7622_i2s4_out_data_funcs[] = { 0, };
 206
 207  /* IR */
 208 -static int mt7622_ir_0_tx_pins[] = { 16, };
 209 -static int mt7622_ir_0_tx_funcs[] = { 4, };
 210 -static int mt7622_ir_1_tx_pins[] = { 59, };
 211 -static int mt7622_ir_1_tx_funcs[] = { 5, };
 212 -static int mt7622_ir_2_tx_pins[] = { 99, };
 213 -static int mt7622_ir_2_tx_funcs[] = { 3, };
 214 -static int mt7622_ir_0_rx_pins[] = { 17, };
 215 -static int mt7622_ir_0_rx_funcs[] = { 4, };
 216 -static int mt7622_ir_1_rx_pins[] = { 60, };
 217 -static int mt7622_ir_1_rx_funcs[] = { 5, };
 218 -static int mt7622_ir_2_rx_pins[] = { 100, };
 219 -static int mt7622_ir_2_rx_funcs[] = { 3, };
 220 +static const int mt7622_ir_0_tx_pins[] = { 16, };
 221 +static const int mt7622_ir_0_tx_funcs[] = { 4, };
 222 +static const int mt7622_ir_1_tx_pins[] = { 59, };
 223 +static const int mt7622_ir_1_tx_funcs[] = { 5, };
 224 +static const int mt7622_ir_2_tx_pins[] = { 99, };
 225 +static const int mt7622_ir_2_tx_funcs[] = { 3, };
 226 +static const int mt7622_ir_0_rx_pins[] = { 17, };
 227 +static const int mt7622_ir_0_rx_funcs[] = { 4, };
 228 +static const int mt7622_ir_1_rx_pins[] = { 60, };
 229 +static const int mt7622_ir_1_rx_funcs[] = { 5, };
 230 +static const int mt7622_ir_2_rx_pins[] = { 100, };
 231 +static const int mt7622_ir_2_rx_funcs[] = { 3, };
 232
 233  /* MDIO */
 234 -static int mt7622_mdc_mdio_pins[] = { 23, 24, };
 235 -static int mt7622_mdc_mdio_funcs[] = { 0, 0, };
 236 +static const int mt7622_mdc_mdio_pins[] = { 23, 24, };
 237 +static const int mt7622_mdc_mdio_funcs[] = { 0, 0, };
 238
 239  /* PCIE */
 240 -static int mt7622_pcie0_0_waken_pins[] = { 14, };
 241 -static int mt7622_pcie0_0_waken_funcs[] = { 2, };
 242 -static int mt7622_pcie0_0_clkreq_pins[] = { 15, };
 243 -static int mt7622_pcie0_0_clkreq_funcs[] = { 2, };
 244 -static int mt7622_pcie0_1_waken_pins[] = { 79, };
 245 -static int mt7622_pcie0_1_waken_funcs[] = { 4, };
 246 -static int mt7622_pcie0_1_clkreq_pins[] = { 80, };
 247 -static int mt7622_pcie0_1_clkreq_funcs[] = { 4, };
 248 -static int mt7622_pcie1_0_waken_pins[] = { 14, };
 249 -static int mt7622_pcie1_0_waken_funcs[] = { 3, };
 250 -static int mt7622_pcie1_0_clkreq_pins[] = { 15, };
 251 -static int mt7622_pcie1_0_clkreq_funcs[] = { 3, };
 252 -
 253 -static int mt7622_pcie0_pad_perst_pins[] = { 83, };
 254 -static int mt7622_pcie0_pad_perst_funcs[] = { 0, };
 255 -static int mt7622_pcie1_pad_perst_pins[] = { 84, };
 256 -static int mt7622_pcie1_pad_perst_funcs[] = { 0, };
 257 +static const int mt7622_pcie0_0_waken_pins[] = { 14, };
 258 +static const int mt7622_pcie0_0_waken_funcs[] = { 2, };
 259 +static const int mt7622_pcie0_0_clkreq_pins[] = { 15, };
 260 +static const int mt7622_pcie0_0_clkreq_funcs[] = { 2, };
 261 +static const int mt7622_pcie0_1_waken_pins[] = { 79, };
 262 +static const int mt7622_pcie0_1_waken_funcs[] = { 4, };
 263 +static const int mt7622_pcie0_1_clkreq_pins[] = { 80, };
 264 +static const int mt7622_pcie0_1_clkreq_funcs[] = { 4, };
 265 +static const int mt7622_pcie1_0_waken_pins[] = { 14, };
 266 +static const int mt7622_pcie1_0_waken_funcs[] = { 3, };
 267 +static const int mt7622_pcie1_0_clkreq_pins[] = { 15, };
 268 +static const int mt7622_pcie1_0_clkreq_funcs[] = { 3, };
 269 +
 270 +static const int mt7622_pcie0_pad_perst_pins[] = { 83, };
 271 +static const int mt7622_pcie0_pad_perst_funcs[] = { 0, };
 272 +static const int mt7622_pcie1_pad_perst_pins[] = { 84, };
 273 +static const int mt7622_pcie1_pad_perst_funcs[] = { 0, };
 274
 275  /* PMIC bus */
 276 -static int mt7622_pmic_bus_pins[] = { 71, 72, };
 277 -static int mt7622_pmic_bus_funcs[] = { 0, 0, };
 278 +static const int mt7622_pmic_bus_pins[] = { 71, 72, };
 279 +static const int mt7622_pmic_bus_funcs[] = { 0, 0, };
 280
 281  /* Parallel NAND */
 282 -static int mt7622_pnand_pins[] = { 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
 283 -                                  48, 49, 50, };
 284 -static int mt7622_pnand_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 285 -                                   0, };
 286 +static const int mt7622_pnand_pins[] = {
 287 +       37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, };
 288 +static const int mt7622_pnand_funcs[] = {
 289 +       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
 290
 291  /* PWM */
 292 -static int mt7622_pwm_ch1_0_pins[] = { 51, };
 293 -static int mt7622_pwm_ch1_0_funcs[] = { 3, };
 294 -static int mt7622_pwm_ch1_1_pins[] = { 73, };
 295 -static int mt7622_pwm_ch1_1_funcs[] = { 4, };
 296 -static int mt7622_pwm_ch1_2_pins[] = { 95, };
 297 -static int mt7622_pwm_ch1_2_funcs[] = { 0, };
 298 -static int mt7622_pwm_ch2_0_pins[] = { 52, };
 299 -static int mt7622_pwm_ch2_0_funcs[] = { 3, };
 300 -static int mt7622_pwm_ch2_1_pins[] = { 74, };
 301 -static int mt7622_pwm_ch2_1_funcs[] = { 4, };
 302 -static int mt7622_pwm_ch2_2_pins[] = { 96, };
 303 -static int mt7622_pwm_ch2_2_funcs[] = { 0, };
 304 -static int mt7622_pwm_ch3_0_pins[] = { 53, };
 305 -static int mt7622_pwm_ch3_0_funcs[] = { 3, };
 306 -static int mt7622_pwm_ch3_1_pins[] = { 75, };
 307 -static int mt7622_pwm_ch3_1_funcs[] = { 4, };
 308 -static int mt7622_pwm_ch3_2_pins[] = { 97, };
 309 -static int mt7622_pwm_ch3_2_funcs[] = { 0, };
 310 -static int mt7622_pwm_ch4_0_pins[] = { 54, };
 311 -static int mt7622_pwm_ch4_0_funcs[] = { 3, };
 312 -static int mt7622_pwm_ch4_1_pins[] = { 67, };
 313 -static int mt7622_pwm_ch4_1_funcs[] = { 3, };
 314 -static int mt7622_pwm_ch4_2_pins[] = { 76, };
 315 -static int mt7622_pwm_ch4_2_funcs[] = { 4, };
 316 -static int mt7622_pwm_ch4_3_pins[] = { 98, };
 317 -static int mt7622_pwm_ch4_3_funcs[] = { 0, };
 318 -static int mt7622_pwm_ch5_0_pins[] = { 68, };
 319 -static int mt7622_pwm_ch5_0_funcs[] = { 3, };
 320 -static int mt7622_pwm_ch5_1_pins[] = { 77, };
 321 -static int mt7622_pwm_ch5_1_funcs[] = { 4, };
 322 -static int mt7622_pwm_ch5_2_pins[] = { 99, };
 323 -static int mt7622_pwm_ch5_2_funcs[] = { 0, };
 324 -static int mt7622_pwm_ch6_0_pins[] = { 69, };
 325 -static int mt7622_pwm_ch6_0_funcs[] = { 3, };
 326 -static int mt7622_pwm_ch6_1_pins[] = { 78, };
 327 -static int mt7622_pwm_ch6_1_funcs[] = { 4, };
 328 -static int mt7622_pwm_ch6_2_pins[] = { 81, };
 329 -static int mt7622_pwm_ch6_2_funcs[] = { 4, };
 330 -static int mt7622_pwm_ch6_3_pins[] = { 100, };
 331 -static int mt7622_pwm_ch6_3_funcs[] = { 0, };
 332 -static int mt7622_pwm_ch7_0_pins[] = { 70, };
 333 -static int mt7622_pwm_ch7_0_funcs[] = { 3, };
 334 -static int mt7622_pwm_ch7_1_pins[] = { 82, };
 335 -static int mt7622_pwm_ch7_1_funcs[] = { 4, };
 336 -static int mt7622_pwm_ch7_2_pins[] = { 101, };
 337 -static int mt7622_pwm_ch7_2_funcs[] = { 0, };
 338 +static const int mt7622_pwm_ch1_0_pins[] = { 51, };
 339 +static const int mt7622_pwm_ch1_0_funcs[] = { 3, };
 340 +static const int mt7622_pwm_ch1_1_pins[] = { 73, };
 341 +static const int mt7622_pwm_ch1_1_funcs[] = { 4, };
 342 +static const int mt7622_pwm_ch1_2_pins[] = { 95, };
 343 +static const int mt7622_pwm_ch1_2_funcs[] = { 0, };
 344 +static const int mt7622_pwm_ch2_0_pins[] = { 52, };
 345 +static const int mt7622_pwm_ch2_0_funcs[] = { 3, };
 346 +static const int mt7622_pwm_ch2_1_pins[] = { 74, };
 347 +static const int mt7622_pwm_ch2_1_funcs[] = { 4, };
 348 +static const int mt7622_pwm_ch2_2_pins[] = { 96, };
 349 +static const int mt7622_pwm_ch2_2_funcs[] = { 0, };
 350 +static const int mt7622_pwm_ch3_0_pins[] = { 53, };
 351 +static const int mt7622_pwm_ch3_0_funcs[] = { 3, };
 352 +static const int mt7622_pwm_ch3_1_pins[] = { 75, };
 353 +static const int mt7622_pwm_ch3_1_funcs[] = { 4, };
 354 +static const int mt7622_pwm_ch3_2_pins[] = { 97, };
 355 +static const int mt7622_pwm_ch3_2_funcs[] = { 0, };
 356 +static const int mt7622_pwm_ch4_0_pins[] = { 54, };
 357 +static const int mt7622_pwm_ch4_0_funcs[] = { 3, };
 358 +static const int mt7622_pwm_ch4_1_pins[] = { 67, };
 359 +static const int mt7622_pwm_ch4_1_funcs[] = { 3, };
 360 +static const int mt7622_pwm_ch4_2_pins[] = { 76, };
 361 +static const int mt7622_pwm_ch4_2_funcs[] = { 4, };
 362 +static const int mt7622_pwm_ch4_3_pins[] = { 98, };
 363 +static const int mt7622_pwm_ch4_3_funcs[] = { 0, };
 364 +static const int mt7622_pwm_ch5_0_pins[] = { 68, };
 365 +static const int mt7622_pwm_ch5_0_funcs[] = { 3, };
 366 +static const int mt7622_pwm_ch5_1_pins[] = { 77, };
 367 +static const int mt7622_pwm_ch5_1_funcs[] = { 4, };
 368 +static const int mt7622_pwm_ch5_2_pins[] = { 99, };
 369 +static const int mt7622_pwm_ch5_2_funcs[] = { 0, };
 370 +static const int mt7622_pwm_ch6_0_pins[] = { 69, };
 371 +static const int mt7622_pwm_ch6_0_funcs[] = { 3, };
 372 +static const int mt7622_pwm_ch6_1_pins[] = { 78, };
 373 +static const int mt7622_pwm_ch6_1_funcs[] = { 4, };
 374 +static const int mt7622_pwm_ch6_2_pins[] = { 81, };
 375 +static const int mt7622_pwm_ch6_2_funcs[] = { 4, };
 376 +static const int mt7622_pwm_ch6_3_pins[] = { 100, };
 377 +static const int mt7622_pwm_ch6_3_funcs[] = { 0, };
 378 +static const int mt7622_pwm_ch7_0_pins[] = { 70, };
 379 +static const int mt7622_pwm_ch7_0_funcs[] = { 3, };
 380 +static const int mt7622_pwm_ch7_1_pins[] = { 82, };
 381 +static const int mt7622_pwm_ch7_1_funcs[] = { 4, };
 382 +static const int mt7622_pwm_ch7_2_pins[] = { 101, };
 383 +static const int mt7622_pwm_ch7_2_funcs[] = { 0, };
 384
 385  /* SD */
 386 -static int mt7622_sd_0_pins[] = { 16, 17, 18, 19, 20, 21, };
 387 -static int mt7622_sd_0_funcs[] = { 2, 2, 2, 2, 2, 2, };
 388 -static int mt7622_sd_1_pins[] = { 25, 26, 27, 28, 29, 30, };
 389 -static int mt7622_sd_1_funcs[] = { 2, 2, 2, 2, 2, 2, };
 390 +static const int mt7622_sd_0_pins[] = { 16, 17, 18, 19, 20, 21, };
 391 +static const int mt7622_sd_0_funcs[] = { 2, 2, 2, 2, 2, 2, };
 392 +static const int mt7622_sd_1_pins[] = { 25, 26, 27, 28, 29, 30, };
 393 +static const int mt7622_sd_1_funcs[] = { 2, 2, 2, 2, 2, 2, };
 394
 395  /* Serial NAND */
 396 -static int mt7622_snfi_pins[] = { 8, 9, 10, 11, 12, 13, };
 397 -static int mt7622_snfi_funcs[] = { 2, 2, 2, 2, 2, 2, };
 398 +static const int mt7622_snfi_pins[] = { 8, 9, 10, 11, 12, 13, };
 399 +static const int mt7622_snfi_funcs[] = { 2, 2, 2, 2, 2, 2, };
 400
 401  /* SPI NOR */
 402 -static int mt7622_spi_pins[] = { 8, 9, 10, 11, 12, 13 };
 403 -static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, };
 404 +static const int mt7622_spi_pins[] = { 8, 9, 10, 11, 12, 13 };
 405 +static const int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, };
 406
 407  /* SPIC */
 408 -static int mt7622_spic0_0_pins[] = { 63, 64, 65, 66, };
 409 -static int mt7622_spic0_0_funcs[] = { 4, 4, 4, 4, };
 410 -static int mt7622_spic0_1_pins[] = { 79, 80, 81, 82, };
 411 -static int mt7622_spic0_1_funcs[] = { 3, 3, 3, 3, };
 412 -static int mt7622_spic1_0_pins[] = { 67, 68, 69, 70, };
 413 -static int mt7622_spic1_0_funcs[] = { 4, 4, 4, 4, };
 414 -static int mt7622_spic1_1_pins[] = { 73, 74, 75, 76, };
 415 -static int mt7622_spic1_1_funcs[] = { 0, 0, 0, 0, };
 416 -static int mt7622_spic2_0_pins[] = { 10, 11, 12, 13, };
 417 -static int mt7622_spic2_0_funcs[] = { 0, 0, 0, 0, };
 418 -static int mt7622_spic2_0_wp_hold_pins[] = { 8, 9, };
 419 -static int mt7622_spic2_0_wp_hold_funcs[] = { 0, 0, };
 420 +static const int mt7622_spic0_0_pins[] = { 63, 64, 65, 66, };
 421 +static const int mt7622_spic0_0_funcs[] = { 4, 4, 4, 4, };
 422 +static const int mt7622_spic0_1_pins[] = { 79, 80, 81, 82, };
 423 +static const int mt7622_spic0_1_funcs[] = { 3, 3, 3, 3, };
 424 +static const int mt7622_spic1_0_pins[] = { 67, 68, 69, 70, };
 425 +static const int mt7622_spic1_0_funcs[] = { 4, 4, 4, 4, };
 426 +static const int mt7622_spic1_1_pins[] = { 73, 74, 75, 76, };
 427 +static const int mt7622_spic1_1_funcs[] = { 0, 0, 0, 0, };
 428 +static const int mt7622_spic2_0_pins[] = { 10, 11, 12, 13, };
 429 +static const int mt7622_spic2_0_funcs[] = { 0, 0, 0, 0, };
 430 +static const int mt7622_spic2_0_wp_hold_pins[] = { 8, 9, };
 431 +static const int mt7622_spic2_0_wp_hold_funcs[] = { 0, 0, };
 432
 433  /* TDM */
 434 -static int mt7622_tdm_0_out_mclk_bclk_ws_pins[] = { 8, 9, 10, };
 435 -static int mt7622_tdm_0_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
 436 -static int mt7622_tdm_0_in_mclk_bclk_ws_pins[] = { 11, 12, 13, };
 437 -static int mt7622_tdm_0_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
 438 -static int mt7622_tdm_0_out_data_pins[] = { 20, };
 439 -static int mt7622_tdm_0_out_data_funcs[] = { 3, };
 440 -static int mt7622_tdm_0_in_data_pins[] = { 21, };
 441 -static int mt7622_tdm_0_in_data_funcs[] = { 3, };
 442 -static int mt7622_tdm_1_out_mclk_bclk_ws_pins[] = { 57, 58, 59, };
 443 -static int mt7622_tdm_1_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
 444 -static int mt7622_tdm_1_in_mclk_bclk_ws_pins[] = { 60, 61, 62, };
 445 -static int mt7622_tdm_1_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
 446 -static int mt7622_tdm_1_out_data_pins[] = { 55, };
 447 -static int mt7622_tdm_1_out_data_funcs[] = { 3, };
 448 -static int mt7622_tdm_1_in_data_pins[] = { 56, };
 449 -static int mt7622_tdm_1_in_data_funcs[] = { 3, };
 450 +static const int mt7622_tdm_0_out_mclk_bclk_ws_pins[] = { 8, 9, 10, };
 451 +static const int mt7622_tdm_0_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
 452 +static const int mt7622_tdm_0_in_mclk_bclk_ws_pins[] = { 11, 12, 13, };
 453 +static const int mt7622_tdm_0_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
 454 +static const int mt7622_tdm_0_out_data_pins[] = { 20, };
 455 +static const int mt7622_tdm_0_out_data_funcs[] = { 3, };
 456 +static const int mt7622_tdm_0_in_data_pins[] = { 21, };
 457 +static const int mt7622_tdm_0_in_data_funcs[] = { 3, };
 458 +static const int mt7622_tdm_1_out_mclk_bclk_ws_pins[] = { 57, 58, 59, };
 459 +static const int mt7622_tdm_1_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
 460 +static const int mt7622_tdm_1_in_mclk_bclk_ws_pins[] = { 60, 61, 62, };
 461 +static const int mt7622_tdm_1_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, };
 462 +static const int mt7622_tdm_1_out_data_pins[] = { 55, };
 463 +static const int mt7622_tdm_1_out_data_funcs[] = { 3, };
 464 +static const int mt7622_tdm_1_in_data_pins[] = { 56, };
 465 +static const int mt7622_tdm_1_in_data_funcs[] = { 3, };
 466
 467  /* UART */
 468 -static int mt7622_uart0_0_tx_rx_pins[] = { 6, 7, };
 469 -static int mt7622_uart0_0_tx_rx_funcs[] = { 0, 0, };
 470 -static int mt7622_uart1_0_tx_rx_pins[] = { 55, 56, };
 471 -static int mt7622_uart1_0_tx_rx_funcs[] = { 2, 2, };
 472 -static int mt7622_uart1_0_rts_cts_pins[] = { 57, 58, };
 473 -static int mt7622_uart1_0_rts_cts_funcs[] = { 2, 2, };
 474 -static int mt7622_uart1_1_tx_rx_pins[] = { 73, 74, };
 475 -static int mt7622_uart1_1_tx_rx_funcs[] = { 2, 2, };
 476 -static int mt7622_uart1_1_rts_cts_pins[] = { 75, 76, };
 477 -static int mt7622_uart1_1_rts_cts_funcs[] = { 2, 2, };
 478 -static int mt7622_uart2_0_tx_rx_pins[] = { 3, 4, };
 479 -static int mt7622_uart2_0_tx_rx_funcs[] = { 2, 2, };
 480 -static int mt7622_uart2_0_rts_cts_pins[] = { 1, 2, };
 481 -static int mt7622_uart2_0_rts_cts_funcs[] = { 2, 2, };
 482 -static int mt7622_uart2_1_tx_rx_pins[] = { 51, 52, };
 483 -static int mt7622_uart2_1_tx_rx_funcs[] = { 0, 0, };
 484 -static int mt7622_uart2_1_rts_cts_pins[] = { 53, 54, };
 485 -static int mt7622_uart2_1_rts_cts_funcs[] = { 0, 0, };
 486 -static int mt7622_uart2_2_tx_rx_pins[] = { 59, 60, };
 487 -static int mt7622_uart2_2_tx_rx_funcs[] = { 4, 4, };
 488 -static int mt7622_uart2_2_rts_cts_pins[] = { 61, 62, };
 489 -static int mt7622_uart2_2_rts_cts_funcs[] = { 4, 4, };
 490 -static int mt7622_uart2_3_tx_rx_pins[] = { 95, 96, };
 491 -static int mt7622_uart2_3_tx_rx_funcs[] = { 3, 3, };
 492 -static int mt7622_uart3_0_tx_rx_pins[] = { 57, 58, };
 493 -static int mt7622_uart3_0_tx_rx_funcs[] = { 5, 5, };
 494 -static int mt7622_uart3_1_tx_rx_pins[] = { 81, 82, };
 495 -static int mt7622_uart3_1_tx_rx_funcs[] = { 0, 0, };
 496 -static int mt7622_uart3_1_rts_cts_pins[] = { 79, 80, };
 497 -static int mt7622_uart3_1_rts_cts_funcs[] = { 0, 0, };
 498 -static int mt7622_uart4_0_tx_rx_pins[] = { 61, 62, };
 499 -static int mt7622_uart4_0_tx_rx_funcs[] = { 5, 5, };
 500 -static int mt7622_uart4_1_tx_rx_pins[] = { 91, 92, };
 501 -static int mt7622_uart4_1_tx_rx_funcs[] = { 0, 0, };
 502 -static int mt7622_uart4_1_rts_cts_pins[] = { 93, 94 };
 503 -static int mt7622_uart4_1_rts_cts_funcs[] = { 0, 0, };
 504 -static int mt7622_uart4_2_tx_rx_pins[] = { 97, 98, };
 505 -static int mt7622_uart4_2_tx_rx_funcs[] = { 2, 2, };
 506 -static int mt7622_uart4_2_rts_cts_pins[] = { 95, 96 };
 507 -static int mt7622_uart4_2_rts_cts_funcs[] = { 2, 2, };
 508 +static const int mt7622_uart0_0_tx_rx_pins[] = { 6, 7, };
 509 +static const int mt7622_uart0_0_tx_rx_funcs[] = { 0, 0, };
 510 +static const int mt7622_uart1_0_tx_rx_pins[] = { 55, 56, };
 511 +static const int mt7622_uart1_0_tx_rx_funcs[] = { 2, 2, };
 512 +static const int mt7622_uart1_0_rts_cts_pins[] = { 57, 58, };
 513 +static const int mt7622_uart1_0_rts_cts_funcs[] = { 2, 2, };
 514 +static const int mt7622_uart1_1_tx_rx_pins[] = { 73, 74, };
 515 +static const int mt7622_uart1_1_tx_rx_funcs[] = { 2, 2, };
 516 +static const int mt7622_uart1_1_rts_cts_pins[] = { 75, 76, };
 517 +static const int mt7622_uart1_1_rts_cts_funcs[] = { 2, 2, };
 518 +static const int mt7622_uart2_0_tx_rx_pins[] = { 3, 4, };
 519 +static const int mt7622_uart2_0_tx_rx_funcs[] = { 2, 2, };
 520 +static const int mt7622_uart2_0_rts_cts_pins[] = { 1, 2, };
 521 +static const int mt7622_uart2_0_rts_cts_funcs[] = { 2, 2, };
 522 +static const int mt7622_uart2_1_tx_rx_pins[] = { 51, 52, };
 523 +static const int mt7622_uart2_1_tx_rx_funcs[] = { 0, 0, };
 524 +static const int mt7622_uart2_1_rts_cts_pins[] = { 53, 54, };
 525 +static const int mt7622_uart2_1_rts_cts_funcs[] = { 0, 0, };
 526 +static const int mt7622_uart2_2_tx_rx_pins[] = { 59, 60, };
 527 +static const int mt7622_uart2_2_tx_rx_funcs[] = { 4, 4, };
 528 +static const int mt7622_uart2_2_rts_cts_pins[] = { 61, 62, };
 529 +static const int mt7622_uart2_2_rts_cts_funcs[] = { 4, 4, };
 530 +static const int mt7622_uart2_3_tx_rx_pins[] = { 95, 96, };
 531 +static const int mt7622_uart2_3_tx_rx_funcs[] = { 3, 3, };
 532 +static const int mt7622_uart3_0_tx_rx_pins[] = { 57, 58, };
 533 +static const int mt7622_uart3_0_tx_rx_funcs[] = { 5, 5, };
 534 +static const int mt7622_uart3_1_tx_rx_pins[] = { 81, 82, };
 535 +static const int mt7622_uart3_1_tx_rx_funcs[] = { 0, 0, };
 536 +static const int mt7622_uart3_1_rts_cts_pins[] = { 79, 80, };
 537 +static const int mt7622_uart3_1_rts_cts_funcs[] = { 0, 0, };
 538 +static const int mt7622_uart4_0_tx_rx_pins[] = { 61, 62, };
 539 +static const int mt7622_uart4_0_tx_rx_funcs[] = { 5, 5, };
 540 +static const int mt7622_uart4_1_tx_rx_pins[] = { 91, 92, };
 541 +static const int mt7622_uart4_1_tx_rx_funcs[] = { 0, 0, };
 542 +static const int mt7622_uart4_1_rts_cts_pins[] = { 93, 94 };
 543 +static const int mt7622_uart4_1_rts_cts_funcs[] = { 0, 0, };
 544 +static const int mt7622_uart4_2_tx_rx_pins[] = { 97, 98, };
 545 +static const int mt7622_uart4_2_tx_rx_funcs[] = { 2, 2, };
 546 +static const int mt7622_uart4_2_rts_cts_pins[] = { 95, 96 };
 547 +static const int mt7622_uart4_2_rts_cts_funcs[] = { 2, 2, };
 548
 549  /* Watchdog */
 550 -static int mt7622_watchdog_pins[] = { 78, };
 551 -static int mt7622_watchdog_funcs[] = { 0, };
 552 +static const int mt7622_watchdog_pins[] = { 78, };
 553 +static const int mt7622_watchdog_funcs[] = { 0, };
 554
 555  /* WLAN LED */
 556 -static int mt7622_wled_pins[] = { 85, };
 557 -static int mt7622_wled_funcs[] = { 0, };
 558 +static const int mt7622_wled_pins[] = { 85, };
 559 +static const int mt7622_wled_funcs[] = { 0, };
 560
 561  static const struct mtk_group_desc mt7622_groups[] = {
 562         PINCTRL_PIN_GROUP("emmc", mt7622_emmc),
 563 @@ -719,7 +721,7 @@ static const struct mtk_function_desc mt
 564         {"watchdog", mt7622_wdt_groups, ARRAY_SIZE(mt7622_wdt_groups)},
 565  };
 566
 567 -static struct mtk_pinctrl_soc mt7622_data = {
 568 +static const struct mtk_pinctrl_soc mt7622_data = {
 569         .name = "mt7622_pinctrl",
 570         .reg_cal = mt7622_reg_cals,
 571         .pins = mt7622_pins,
 572 --- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c
 573 +++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
 574 @@ -692,377 +692,377 @@ static const struct mtk_pin_desc mt7623_
 575   */
 576
 577  /* AUDIO EXT CLK */
 578 -static int mt7623_aud_ext_clk0_pins[] = { 208, };
 579 -static int mt7623_aud_ext_clk0_funcs[] = { 1, };
 580 -static int mt7623_aud_ext_clk1_pins[] = { 209, };
 581 -static int mt7623_aud_ext_clk1_funcs[] = { 1, };
 582 +static const int mt7623_aud_ext_clk0_pins[] = { 208, };
 583 +static const int mt7623_aud_ext_clk0_funcs[] = { 1, };
 584 +static const int mt7623_aud_ext_clk1_pins[] = { 209, };
 585 +static const int mt7623_aud_ext_clk1_funcs[] = { 1, };
 586
 587  /* DISP PWM */
 588 -static int mt7623_disp_pwm_0_pins[] = { 72, };
 589 -static int mt7623_disp_pwm_0_funcs[] = { 5, };
 590 -static int mt7623_disp_pwm_1_pins[] = { 203, };
 591 -static int mt7623_disp_pwm_1_funcs[] = { 2, };
 592 -static int mt7623_disp_pwm_2_pins[] = { 208, };
 593 -static int mt7623_disp_pwm_2_funcs[] = { 5, };
 594 +static const int mt7623_disp_pwm_0_pins[] = { 72, };
 595 +static const int mt7623_disp_pwm_0_funcs[] = { 5, };
 596 +static const int mt7623_disp_pwm_1_pins[] = { 203, };
 597 +static const int mt7623_disp_pwm_1_funcs[] = { 2, };
 598 +static const int mt7623_disp_pwm_2_pins[] = { 208, };
 599 +static const int mt7623_disp_pwm_2_funcs[] = { 5, };
 600
 601  /* ESW */
 602 -static int mt7623_esw_int_pins[] = { 273, };
 603 -static int mt7623_esw_int_funcs[] = { 1, };
 604 -static int mt7623_esw_rst_pins[] = { 277, };
 605 -static int mt7623_esw_rst_funcs[] = { 1, };
 606 +static const int mt7623_esw_int_pins[] = { 273, };
 607 +static const int mt7623_esw_int_funcs[] = { 1, };
 608 +static const int mt7623_esw_rst_pins[] = { 277, };
 609 +static const int mt7623_esw_rst_funcs[] = { 1, };
 610
 611  /* EPHY */
 612 -static int mt7623_ephy_pins[] = { 262, 263, 264, 265, 266, 267, 268,
 613 -                                 269, 270, 271, 272, 274, };
 614 -static int mt7623_ephy_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
 615 +static const int mt7623_ephy_pins[] = { 262, 263, 264, 265, 266, 267, 268,
 616 +                                       269, 270, 271, 272, 274, };
 617 +static const int mt7623_ephy_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
 618
 619  /* EXT_SDIO */
 620 -static int mt7623_ext_sdio_pins[] = { 236, 237, 238, 239, 240, 241, };
 621 -static int mt7623_ext_sdio_funcs[] = { 1, 1, 1, 1, 1, 1, };
 622 +static const int mt7623_ext_sdio_pins[] = { 236, 237, 238, 239, 240, 241, };
 623 +static const int mt7623_ext_sdio_funcs[] = { 1, 1, 1, 1, 1, 1, };
 624
 625  /* HDMI RX */
 626 -static int mt7623_hdmi_rx_pins[] = { 247, 248, };
 627 -static int mt7623_hdmi_rx_funcs[] = { 1, 1 };
 628 -static int mt7623_hdmi_rx_i2c_pins[] = { 244, 245, };
 629 -static int mt7623_hdmi_rx_i2c_funcs[] = { 1, 1 };
 630 +static const int mt7623_hdmi_rx_pins[] = { 247, 248, };
 631 +static const int mt7623_hdmi_rx_funcs[] = { 1, 1 };
 632 +static const int mt7623_hdmi_rx_i2c_pins[] = { 244, 245, };
 633 +static const int mt7623_hdmi_rx_i2c_funcs[] = { 1, 1 };
 634
 635  /* HDMI TX */
 636 -static int mt7623_hdmi_cec_pins[] = { 122, };
 637 -static int mt7623_hdmi_cec_funcs[] = { 1, };
 638 -static int mt7623_hdmi_htplg_pins[] = { 123, };
 639 -static int mt7623_hdmi_htplg_funcs[] = { 1, };
 640 -static int mt7623_hdmi_i2c_pins[] = { 124, 125, };
 641 -static int mt7623_hdmi_i2c_funcs[] = { 1, 1 };
 642 +static const int mt7623_hdmi_cec_pins[] = { 122, };
 643 +static const int mt7623_hdmi_cec_funcs[] = { 1, };
 644 +static const int mt7623_hdmi_htplg_pins[] = { 123, };
 645 +static const int mt7623_hdmi_htplg_funcs[] = { 1, };
 646 +static const int mt7623_hdmi_i2c_pins[] = { 124, 125, };
 647 +static const int mt7623_hdmi_i2c_funcs[] = { 1, 1 };
 648
 649  /* I2C */
 650 -static int mt7623_i2c0_pins[] = { 75, 76, };
 651 -static int mt7623_i2c0_funcs[] = { 1, 1, };
 652 -static int mt7623_i2c1_0_pins[] = { 57, 58, };
 653 -static int mt7623_i2c1_0_funcs[] = { 1, 1, };
 654 -static int mt7623_i2c1_1_pins[] = { 242, 243, };
 655 -static int mt7623_i2c1_1_funcs[] = { 4, 4, };
 656 -static int mt7623_i2c1_2_pins[] = { 85, 86, };
 657 -static int mt7623_i2c1_2_funcs[] = { 3, 3, };
 658 -static int mt7623_i2c1_3_pins[] = { 105, 106, };
 659 -static int mt7623_i2c1_3_funcs[] = { 3, 3, };
 660 -static int mt7623_i2c1_4_pins[] = { 124, 125, };
 661 -static int mt7623_i2c1_4_funcs[] = { 4, 4, };
 662 -static int mt7623_i2c2_0_pins[] = { 77, 78, };
 663 -static int mt7623_i2c2_0_funcs[] = { 1, 1, };
 664 -static int mt7623_i2c2_1_pins[] = { 89, 90, };
 665 -static int mt7623_i2c2_1_funcs[] = { 3, 3, };
 666 -static int mt7623_i2c2_2_pins[] = { 109, 110, };
 667 -static int mt7623_i2c2_2_funcs[] = { 3, 3, };
 668 -static int mt7623_i2c2_3_pins[] = { 122, 123, };
 669 -static int mt7623_i2c2_3_funcs[] = { 4, 4, };
 670 +static const int mt7623_i2c0_pins[] = { 75, 76, };
 671 +static const int mt7623_i2c0_funcs[] = { 1, 1, };
 672 +static const int mt7623_i2c1_0_pins[] = { 57, 58, };
 673 +static const int mt7623_i2c1_0_funcs[] = { 1, 1, };
 674 +static const int mt7623_i2c1_1_pins[] = { 242, 243, };
 675 +static const int mt7623_i2c1_1_funcs[] = { 4, 4, };
 676 +static const int mt7623_i2c1_2_pins[] = { 85, 86, };
 677 +static const int mt7623_i2c1_2_funcs[] = { 3, 3, };
 678 +static const int mt7623_i2c1_3_pins[] = { 105, 106, };
 679 +static const int mt7623_i2c1_3_funcs[] = { 3, 3, };
 680 +static const int mt7623_i2c1_4_pins[] = { 124, 125, };
 681 +static const int mt7623_i2c1_4_funcs[] = { 4, 4, };
 682 +static const int mt7623_i2c2_0_pins[] = { 77, 78, };
 683 +static const int mt7623_i2c2_0_funcs[] = { 1, 1, };
 684 +static const int mt7623_i2c2_1_pins[] = { 89, 90, };
 685 +static const int mt7623_i2c2_1_funcs[] = { 3, 3, };
 686 +static const int mt7623_i2c2_2_pins[] = { 109, 110, };
 687 +static const int mt7623_i2c2_2_funcs[] = { 3, 3, };
 688 +static const int mt7623_i2c2_3_pins[] = { 122, 123, };
 689 +static const int mt7623_i2c2_3_funcs[] = { 4, 4, };
 690
 691  /* I2S */
 692 -static int mt7623_i2s0_pins[] = { 49, 72, 73, 74, 126, };
 693 -static int mt7623_i2s0_funcs[] = { 1, 1, 1, 1, 1, };
 694 -static int mt7623_i2s1_pins[] = { 33, 34, 35, 36, 37, };
 695 -static int mt7623_i2s1_funcs[] = { 1, 1, 1, 1, 1, };
 696 -static int mt7623_i2s2_bclk_lrclk_mclk_pins[] = { 50, 52, 188, };
 697 -static int mt7623_i2s2_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, };
 698 -static int mt7623_i2s2_data_in_pins[] = { 51, };
 699 -static int mt7623_i2s2_data_in_funcs[] = { 1, };
 700 -static int mt7623_i2s2_data_0_pins[] = { 203, };
 701 -static int mt7623_i2s2_data_0_funcs[] = { 9, };
 702 -static int mt7623_i2s2_data_1_pins[] = { 38,  };
 703 -static int mt7623_i2s2_data_1_funcs[] = { 4, };
 704 -static int mt7623_i2s3_bclk_lrclk_mclk_pins[] = { 191, 192, 193, };
 705 -static int mt7623_i2s3_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, };
 706 -static int mt7623_i2s3_data_in_pins[] = { 190, };
 707 -static int mt7623_i2s3_data_in_funcs[] = { 1, };
 708 -static int mt7623_i2s3_data_0_pins[] = { 204, };
 709 -static int mt7623_i2s3_data_0_funcs[] = { 9, };
 710 -static int mt7623_i2s3_data_1_pins[] = { 2, };
 711 -static int mt7623_i2s3_data_1_funcs[] = { 0, };
 712 -static int mt7623_i2s4_pins[] = { 194, 195, 196, 197, 198, };
 713 -static int mt7623_i2s4_funcs[] = { 1, 1, 1, 1, 1, };
 714 -static int mt7623_i2s5_pins[] = { 16, 17, 30, 31, 32, };
 715 -static int mt7623_i2s5_funcs[] = { 1, 1, 1, 1, 1, };
 716 +static const int mt7623_i2s0_pins[] = { 49, 72, 73, 74, 126, };
 717 +static const int mt7623_i2s0_funcs[] = { 1, 1, 1, 1, 1, };
 718 +static const int mt7623_i2s1_pins[] = { 33, 34, 35, 36, 37, };
 719 +static const int mt7623_i2s1_funcs[] = { 1, 1, 1, 1, 1, };
 720 +static const int mt7623_i2s2_bclk_lrclk_mclk_pins[] = { 50, 52, 188, };
 721 +static const int mt7623_i2s2_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, };
 722 +static const int mt7623_i2s2_data_in_pins[] = { 51, };
 723 +static const int mt7623_i2s2_data_in_funcs[] = { 1, };
 724 +static const int mt7623_i2s2_data_0_pins[] = { 203, };
 725 +static const int mt7623_i2s2_data_0_funcs[] = { 9, };
 726 +static const int mt7623_i2s2_data_1_pins[] = { 38,  };
 727 +static const int mt7623_i2s2_data_1_funcs[] = { 4, };
 728 +static const int mt7623_i2s3_bclk_lrclk_mclk_pins[] = { 191, 192, 193, };
 729 +static const int mt7623_i2s3_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, };
 730 +static const int mt7623_i2s3_data_in_pins[] = { 190, };
 731 +static const int mt7623_i2s3_data_in_funcs[] = { 1, };
 732 +static const int mt7623_i2s3_data_0_pins[] = { 204, };
 733 +static const int mt7623_i2s3_data_0_funcs[] = { 9, };
 734 +static const int mt7623_i2s3_data_1_pins[] = { 2, };
 735 +static const int mt7623_i2s3_data_1_funcs[] = { 0, };
 736 +static const int mt7623_i2s4_pins[] = { 194, 195, 196, 197, 198, };
 737 +static const int mt7623_i2s4_funcs[] = { 1, 1, 1, 1, 1, };
 738 +static const int mt7623_i2s5_pins[] = { 16, 17, 30, 31, 32, };
 739 +static const int mt7623_i2s5_funcs[] = { 1, 1, 1, 1, 1, };
 740
 741  /* IR */
 742 -static int mt7623_ir_pins[] = { 46, };
 743 -static int mt7623_ir_funcs[] = { 1, };
 744 +static const int mt7623_ir_pins[] = { 46, };
 745 +static const int mt7623_ir_funcs[] = { 1, };
 746
 747  /* LCD */
 748 -static int mt7623_mipi_tx_pins[] = { 91, 92, 93, 94, 95, 96, 97, 98,
 749 -                                    99, 100, };
 750 -static int mt7623_mipi_tx_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
 751 -static int mt7623_dsi_te_pins[] = { 84, };
 752 -static int mt7623_dsi_te_funcs[] = { 1, };
 753 -static int mt7623_lcm_rst_pins[] = { 83, };
 754 -static int mt7623_lcm_rst_funcs[] = { 1, };
 755 +static const int mt7623_mipi_tx_pins[] = { 91, 92, 93, 94, 95, 96, 97, 98,
 756 +                                          99, 100, };
 757 +static const int mt7623_mipi_tx_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
 758 +static const int mt7623_dsi_te_pins[] = { 84, };
 759 +static const int mt7623_dsi_te_funcs[] = { 1, };
 760 +static const int mt7623_lcm_rst_pins[] = { 83, };
 761 +static const int mt7623_lcm_rst_funcs[] = { 1, };
 762
 763  /* MDC/MDIO */
 764 -static int mt7623_mdc_mdio_pins[] = { 275, 276, };
 765 -static int mt7623_mdc_mdio_funcs[] = { 1, 1, };
 766 +static const int mt7623_mdc_mdio_pins[] = { 275, 276, };
 767 +static const int mt7623_mdc_mdio_funcs[] = { 1, 1, };
 768
 769  /* MSDC */
 770 -static int mt7623_msdc0_pins[] = { 111, 112, 113, 114, 115, 116, 117, 118,
 771 -                                  119, 120, 121, };
 772 -static int mt7623_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
 773 -static int mt7623_msdc1_pins[] = { 105, 106, 107, 108, 109, 110, };
 774 -static int mt7623_msdc1_funcs[] = { 1, 1, 1, 1, 1, 1, };
 775 -static int mt7623_msdc1_ins_pins[] = { 261, };
 776 -static int mt7623_msdc1_ins_funcs[] = { 1, };
 777 -static int mt7623_msdc1_wp_0_pins[] = { 29, };
 778 -static int mt7623_msdc1_wp_0_funcs[] = { 1, };
 779 -static int mt7623_msdc1_wp_1_pins[] = { 55, };
 780 -static int mt7623_msdc1_wp_1_funcs[] = { 3, };
 781 -static int mt7623_msdc1_wp_2_pins[] = { 209, };
 782 -static int mt7623_msdc1_wp_2_funcs[] = { 2, };
 783 -static int mt7623_msdc2_pins[] = { 85, 86, 87, 88, 89, 90, };
 784 -static int mt7623_msdc2_funcs[] = { 1, 1, 1, 1, 1, 1, };
 785 -static int mt7623_msdc3_pins[] = { 249, 250, 251, 252, 253, 254, 255, 256,
 786 -                                  257, 258, 259, 260, };
 787 -static int mt7623_msdc3_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
 788 +static const int mt7623_msdc0_pins[] = { 111, 112, 113, 114, 115, 116, 117, 118,
 789 +                                        119, 120, 121, };
 790 +static const int mt7623_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
 791 +static const int mt7623_msdc1_pins[] = { 105, 106, 107, 108, 109, 110, };
 792 +static const int mt7623_msdc1_funcs[] = { 1, 1, 1, 1, 1, 1, };
 793 +static const int mt7623_msdc1_ins_pins[] = { 261, };
 794 +static const int mt7623_msdc1_ins_funcs[] = { 1, };
 795 +static const int mt7623_msdc1_wp_0_pins[] = { 29, };
 796 +static const int mt7623_msdc1_wp_0_funcs[] = { 1, };
 797 +static const int mt7623_msdc1_wp_1_pins[] = { 55, };
 798 +static const int mt7623_msdc1_wp_1_funcs[] = { 3, };
 799 +static const int mt7623_msdc1_wp_2_pins[] = { 209, };
 800 +static const int mt7623_msdc1_wp_2_funcs[] = { 2, };
 801 +static const int mt7623_msdc2_pins[] = { 85, 86, 87, 88, 89, 90, };
 802 +static const int mt7623_msdc2_funcs[] = { 1, 1, 1, 1, 1, 1, };
 803 +static const int mt7623_msdc3_pins[] = { 249, 250, 251, 252, 253, 254, 255, 256,
 804 +                                        257, 258, 259, 260, };
 805 +static const int mt7623_msdc3_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
 806
 807  /* NAND */
 808 -static int mt7623_nandc_pins[] = { 43, 47, 48, 111, 112, 113, 114, 115,
 809 -                                  116, 117, 118, 119, 120, 121, };
 810 -static int mt7623_nandc_funcs[] = { 1, 1, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4,
 811 -                                  4, 4, };
 812 -static int mt7623_nandc_ceb0_pins[] = { 45, };
 813 -static int mt7623_nandc_ceb0_funcs[] = { 1, };
 814 -static int mt7623_nandc_ceb1_pins[] = { 44, };
 815 -static int mt7623_nandc_ceb1_funcs[] = { 1, };
 816 +static const int mt7623_nandc_pins[] = { 43, 47, 48, 111, 112, 113, 114, 115,
 817 +                                        116, 117, 118, 119, 120, 121, };
 818 +static const int mt7623_nandc_funcs[] = { 1, 1, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4,
 819 +                                         4, 4, };
 820 +static const int mt7623_nandc_ceb0_pins[] = { 45, };
 821 +static const int mt7623_nandc_ceb0_funcs[] = { 1, };
 822 +static const int mt7623_nandc_ceb1_pins[] = { 44, };
 823 +static const int mt7623_nandc_ceb1_funcs[] = { 1, };
 824
 825  /* RTC */
 826 -static int mt7623_rtc_pins[] = { 10, };
 827 -static int mt7623_rtc_funcs[] = { 1, };
 828 +static const int mt7623_rtc_pins[] = { 10, };
 829 +static const int mt7623_rtc_funcs[] = { 1, };
 830
 831  /* OTG */
 832 -static int mt7623_otg_iddig0_0_pins[] = { 29, };
 833 -static int mt7623_otg_iddig0_0_funcs[] = { 1, };
 834 -static int mt7623_otg_iddig0_1_pins[] = { 44, };
 835 -static int mt7623_otg_iddig0_1_funcs[] = { 2, };
 836 -static int mt7623_otg_iddig0_2_pins[] = { 236, };
 837 -static int mt7623_otg_iddig0_2_funcs[] = { 2, };
 838 -static int mt7623_otg_iddig1_0_pins[] = { 27, };
 839 -static int mt7623_otg_iddig1_0_funcs[] = { 2, };
 840 -static int mt7623_otg_iddig1_1_pins[] = { 47, };
 841 -static int mt7623_otg_iddig1_1_funcs[] = { 2, };
 842 -static int mt7623_otg_iddig1_2_pins[] = { 238, };
 843 -static int mt7623_otg_iddig1_2_funcs[] = { 2, };
 844 -static int mt7623_otg_drv_vbus0_0_pins[] = { 28, };
 845 -static int mt7623_otg_drv_vbus0_0_funcs[] = { 1, };
 846 -static int mt7623_otg_drv_vbus0_1_pins[] = { 45, };
 847 -static int mt7623_otg_drv_vbus0_1_funcs[] = { 2, };
 848 -static int mt7623_otg_drv_vbus0_2_pins[] = { 237, };
 849 -static int mt7623_otg_drv_vbus0_2_funcs[] = { 2, };
 850 -static int mt7623_otg_drv_vbus1_0_pins[] = { 26, };
 851 -static int mt7623_otg_drv_vbus1_0_funcs[] = { 2, };
 852 -static int mt7623_otg_drv_vbus1_1_pins[] = { 48, };
 853 -static int mt7623_otg_drv_vbus1_1_funcs[] = { 2, };
 854 -static int mt7623_otg_drv_vbus1_2_pins[] = { 239, };
 855 -static int mt7623_otg_drv_vbus1_2_funcs[] = { 2, };
 856 +static const int mt7623_otg_iddig0_0_pins[] = { 29, };
 857 +static const int mt7623_otg_iddig0_0_funcs[] = { 1, };
 858 +static const int mt7623_otg_iddig0_1_pins[] = { 44, };
 859 +static const int mt7623_otg_iddig0_1_funcs[] = { 2, };
 860 +static const int mt7623_otg_iddig0_2_pins[] = { 236, };
 861 +static const int mt7623_otg_iddig0_2_funcs[] = { 2, };
 862 +static const int mt7623_otg_iddig1_0_pins[] = { 27, };
 863 +static const int mt7623_otg_iddig1_0_funcs[] = { 2, };
 864 +static const int mt7623_otg_iddig1_1_pins[] = { 47, };
 865 +static const int mt7623_otg_iddig1_1_funcs[] = { 2, };
 866 +static const int mt7623_otg_iddig1_2_pins[] = { 238, };
 867 +static const int mt7623_otg_iddig1_2_funcs[] = { 2, };
 868 +static const int mt7623_otg_drv_vbus0_0_pins[] = { 28, };
 869 +static const int mt7623_otg_drv_vbus0_0_funcs[] = { 1, };
 870 +static const int mt7623_otg_drv_vbus0_1_pins[] = { 45, };
 871 +static const int mt7623_otg_drv_vbus0_1_funcs[] = { 2, };
 872 +static const int mt7623_otg_drv_vbus0_2_pins[] = { 237, };
 873 +static const int mt7623_otg_drv_vbus0_2_funcs[] = { 2, };
 874 +static const int mt7623_otg_drv_vbus1_0_pins[] = { 26, };
 875 +static const int mt7623_otg_drv_vbus1_0_funcs[] = { 2, };
 876 +static const int mt7623_otg_drv_vbus1_1_pins[] = { 48, };
 877 +static const int mt7623_otg_drv_vbus1_1_funcs[] = { 2, };
 878 +static const int mt7623_otg_drv_vbus1_2_pins[] = { 239, };
 879 +static const int mt7623_otg_drv_vbus1_2_funcs[] = { 2, };
 880
 881  /* PCIE */
 882 -static int mt7623_pcie0_0_perst_pins[] = { 208, };
 883 -static int mt7623_pcie0_0_perst_funcs[] = { 3, };
 884 -static int mt7623_pcie0_1_perst_pins[] = { 22, };
 885 -static int mt7623_pcie0_1_perst_funcs[] = { 2, };
 886 -static int mt7623_pcie1_0_perst_pins[] = { 209, };
 887 -static int mt7623_pcie1_0_perst_funcs[] = { 3, };
 888 -static int mt7623_pcie1_1_perst_pins[] = { 23, };
 889 -static int mt7623_pcie1_1_perst_funcs[] = { 2, };
 890 -static int mt7623_pcie2_0_perst_pins[] = { 24, };
 891 -static int mt7623_pcie2_0_perst_funcs[] = { 2, };
 892 -static int mt7623_pcie2_1_perst_pins[] = { 29, };
 893 -static int mt7623_pcie2_1_perst_funcs[] = { 6, };
 894 -static int mt7623_pcie0_0_wake_pins[] = { 28, };
 895 -static int mt7623_pcie0_0_wake_funcs[] = { 6, };
 896 -static int mt7623_pcie0_1_wake_pins[] = { 251, };
 897 -static int mt7623_pcie0_1_wake_funcs[] = { 6, };
 898 -static int mt7623_pcie1_0_wake_pins[] = { 27, };
 899 -static int mt7623_pcie1_0_wake_funcs[] = { 6, };
 900 -static int mt7623_pcie1_1_wake_pins[] = { 253, };
 901 -static int mt7623_pcie1_1_wake_funcs[] = { 6, };
 902 -static int mt7623_pcie2_0_wake_pins[] = { 26, };
 903 -static int mt7623_pcie2_0_wake_funcs[] = { 6, };
 904 -static int mt7623_pcie2_1_wake_pins[] = { 255, };
 905 -static int mt7623_pcie2_1_wake_funcs[] = { 6, };
 906 -static int mt7623_pcie0_clkreq_pins[] = { 250, };
 907 -static int mt7623_pcie0_clkreq_funcs[] = { 6, };
 908 -static int mt7623_pcie1_clkreq_pins[] = { 252, };
 909 -static int mt7623_pcie1_clkreq_funcs[] = { 6, };
 910 -static int mt7623_pcie2_clkreq_pins[] = { 254, };
 911 -static int mt7623_pcie2_clkreq_funcs[] = { 6, };
 912 +static const int mt7623_pcie0_0_perst_pins[] = { 208, };
 913 +static const int mt7623_pcie0_0_perst_funcs[] = { 3, };
 914 +static const int mt7623_pcie0_1_perst_pins[] = { 22, };
 915 +static const int mt7623_pcie0_1_perst_funcs[] = { 2, };
 916 +static const int mt7623_pcie1_0_perst_pins[] = { 209, };
 917 +static const int mt7623_pcie1_0_perst_funcs[] = { 3, };
 918 +static const int mt7623_pcie1_1_perst_pins[] = { 23, };
 919 +static const int mt7623_pcie1_1_perst_funcs[] = { 2, };
 920 +static const int mt7623_pcie2_0_perst_pins[] = { 24, };
 921 +static const int mt7623_pcie2_0_perst_funcs[] = { 2, };
 922 +static const int mt7623_pcie2_1_perst_pins[] = { 29, };
 923 +static const int mt7623_pcie2_1_perst_funcs[] = { 6, };
 924 +static const int mt7623_pcie0_0_wake_pins[] = { 28, };
 925 +static const int mt7623_pcie0_0_wake_funcs[] = { 6, };
 926 +static const int mt7623_pcie0_1_wake_pins[] = { 251, };
 927 +static const int mt7623_pcie0_1_wake_funcs[] = { 6, };
 928 +static const int mt7623_pcie1_0_wake_pins[] = { 27, };
 929 +static const int mt7623_pcie1_0_wake_funcs[] = { 6, };
 930 +static const int mt7623_pcie1_1_wake_pins[] = { 253, };
 931 +static const int mt7623_pcie1_1_wake_funcs[] = { 6, };
 932 +static const int mt7623_pcie2_0_wake_pins[] = { 26, };
 933 +static const int mt7623_pcie2_0_wake_funcs[] = { 6, };
 934 +static const int mt7623_pcie2_1_wake_pins[] = { 255, };
 935 +static const int mt7623_pcie2_1_wake_funcs[] = { 6, };
 936 +static const int mt7623_pcie0_clkreq_pins[] = { 250, };
 937 +static const int mt7623_pcie0_clkreq_funcs[] = { 6, };
 938 +static const int mt7623_pcie1_clkreq_pins[] = { 252, };
 939 +static const int mt7623_pcie1_clkreq_funcs[] = { 6, };
 940 +static const int mt7623_pcie2_clkreq_pins[] = { 254, };
 941 +static const int mt7623_pcie2_clkreq_funcs[] = { 6, };
 942  /* the pcie_*_rev are only used for MT7623 */
 943 -static int mt7623_pcie0_0_rev_perst_pins[] = { 208, };
 944 -static int mt7623_pcie0_0_rev_perst_funcs[] = { 11, };
 945 -static int mt7623_pcie0_1_rev_perst_pins[] = { 22, };
 946 -static int mt7623_pcie0_1_rev_perst_funcs[] = { 10, };
 947 -static int mt7623_pcie1_0_rev_perst_pins[] = { 209, };
 948 -static int mt7623_pcie1_0_rev_perst_funcs[] = { 11, };
 949 -static int mt7623_pcie1_1_rev_perst_pins[] = { 23, };
 950 -static int mt7623_pcie1_1_rev_perst_funcs[] = { 10, };
 951 -static int mt7623_pcie2_0_rev_perst_pins[] = { 24, };
 952 -static int mt7623_pcie2_0_rev_perst_funcs[] = { 11, };
 953 -static int mt7623_pcie2_1_rev_perst_pins[] = { 29, };
 954 -static int mt7623_pcie2_1_rev_perst_funcs[] = { 14, };
 955 +static const int mt7623_pcie0_0_rev_perst_pins[] = { 208, };
 956 +static const int mt7623_pcie0_0_rev_perst_funcs[] = { 11, };
 957 +static const int mt7623_pcie0_1_rev_perst_pins[] = { 22, };
 958 +static const int mt7623_pcie0_1_rev_perst_funcs[] = { 10, };
 959 +static const int mt7623_pcie1_0_rev_perst_pins[] = { 209, };
 960 +static const int mt7623_pcie1_0_rev_perst_funcs[] = { 11, };
 961 +static const int mt7623_pcie1_1_rev_perst_pins[] = { 23, };
 962 +static const int mt7623_pcie1_1_rev_perst_funcs[] = { 10, };
 963 +static const int mt7623_pcie2_0_rev_perst_pins[] = { 24, };
 964 +static const int mt7623_pcie2_0_rev_perst_funcs[] = { 11, };
 965 +static const int mt7623_pcie2_1_rev_perst_pins[] = { 29, };
 966 +static const int mt7623_pcie2_1_rev_perst_funcs[] = { 14, };
 967
 968  /* PCM */
 969 -static int mt7623_pcm_clk_0_pins[] = { 18, };
 970 -static int mt7623_pcm_clk_0_funcs[] = { 1, };
 971 -static int mt7623_pcm_clk_1_pins[] = { 17, };
 972 -static int mt7623_pcm_clk_1_funcs[] = { 3, };
 973 -static int mt7623_pcm_clk_2_pins[] = { 35, };
 974 -static int mt7623_pcm_clk_2_funcs[] = { 3, };
 975 -static int mt7623_pcm_clk_3_pins[] = { 50, };
 976 -static int mt7623_pcm_clk_3_funcs[] = { 3, };
 977 -static int mt7623_pcm_clk_4_pins[] = { 74, };
 978 -static int mt7623_pcm_clk_4_funcs[] = { 3, };
 979 -static int mt7623_pcm_clk_5_pins[] = { 191, };
 980 -static int mt7623_pcm_clk_5_funcs[] = { 3, };
 981 -static int mt7623_pcm_clk_6_pins[] = { 196, };
 982 -static int mt7623_pcm_clk_6_funcs[] = { 3, };
 983 -static int mt7623_pcm_sync_0_pins[] = { 19, };
 984 -static int mt7623_pcm_sync_0_funcs[] = { 1, };
 985 -static int mt7623_pcm_sync_1_pins[] = { 30, };
 986 -static int mt7623_pcm_sync_1_funcs[] = { 3, };
 987 -static int mt7623_pcm_sync_2_pins[] = { 36, };
 988 -static int mt7623_pcm_sync_2_funcs[] = { 3, };
 989 -static int mt7623_pcm_sync_3_pins[] = { 52, };
 990 -static int mt7623_pcm_sync_3_funcs[] = { 31, };
 991 -static int mt7623_pcm_sync_4_pins[] = { 73, };
 992 -static int mt7623_pcm_sync_4_funcs[] = { 3, };
 993 -static int mt7623_pcm_sync_5_pins[] = { 192, };
 994 -static int mt7623_pcm_sync_5_funcs[] = { 3, };
 995 -static int mt7623_pcm_sync_6_pins[] = { 197, };
 996 -static int mt7623_pcm_sync_6_funcs[] = { 3, };
 997 -static int mt7623_pcm_rx_0_pins[] = { 20, };
 998 -static int mt7623_pcm_rx_0_funcs[] = { 1, };
 999 -static int mt7623_pcm_rx_1_pins[] = { 16, };
1000 -static int mt7623_pcm_rx_1_funcs[] = { 3, };
1001 -static int mt7623_pcm_rx_2_pins[] = { 34, };
1002 -static int mt7623_pcm_rx_2_funcs[] = { 3, };
1003 -static int mt7623_pcm_rx_3_pins[] = { 51, };
1004 -static int mt7623_pcm_rx_3_funcs[] = { 3, };
1005 -static int mt7623_pcm_rx_4_pins[] = { 72, };
1006 -static int mt7623_pcm_rx_4_funcs[] = { 3, };
1007 -static int mt7623_pcm_rx_5_pins[] = { 190, };
1008 -static int mt7623_pcm_rx_5_funcs[] = { 3, };
1009 -static int mt7623_pcm_rx_6_pins[] = { 195, };
1010 -static int mt7623_pcm_rx_6_funcs[] = { 3, };
1011 -static int mt7623_pcm_tx_0_pins[] = { 21, };
1012 -static int mt7623_pcm_tx_0_funcs[] = { 1, };
1013 -static int mt7623_pcm_tx_1_pins[] = { 32, };
1014 -static int mt7623_pcm_tx_1_funcs[] = { 3, };
1015 -static int mt7623_pcm_tx_2_pins[] = { 33, };
1016 -static int mt7623_pcm_tx_2_funcs[] = { 3, };
1017 -static int mt7623_pcm_tx_3_pins[] = { 38, };
1018 -static int mt7623_pcm_tx_3_funcs[] = { 3, };
1019 -static int mt7623_pcm_tx_4_pins[] = { 49, };
1020 -static int mt7623_pcm_tx_4_funcs[] = { 3, };
1021 -static int mt7623_pcm_tx_5_pins[] = { 189, };
1022 -static int mt7623_pcm_tx_5_funcs[] = { 3, };
1023 -static int mt7623_pcm_tx_6_pins[] = { 194, };
1024 -static int mt7623_pcm_tx_6_funcs[] = { 3, };
1025 +static const int mt7623_pcm_clk_0_pins[] = { 18, };
1026 +static const int mt7623_pcm_clk_0_funcs[] = { 1, };
1027 +static const int mt7623_pcm_clk_1_pins[] = { 17, };
1028 +static const int mt7623_pcm_clk_1_funcs[] = { 3, };
1029 +static const int mt7623_pcm_clk_2_pins[] = { 35, };
1030 +static const int mt7623_pcm_clk_2_funcs[] = { 3, };
1031 +static const int mt7623_pcm_clk_3_pins[] = { 50, };
1032 +static const int mt7623_pcm_clk_3_funcs[] = { 3, };
1033 +static const int mt7623_pcm_clk_4_pins[] = { 74, };
1034 +static const int mt7623_pcm_clk_4_funcs[] = { 3, };
1035 +static const int mt7623_pcm_clk_5_pins[] = { 191, };
1036 +static const int mt7623_pcm_clk_5_funcs[] = { 3, };
1037 +static const int mt7623_pcm_clk_6_pins[] = { 196, };
1038 +static const int mt7623_pcm_clk_6_funcs[] = { 3, };
1039 +static const int mt7623_pcm_sync_0_pins[] = { 19, };
1040 +static const int mt7623_pcm_sync_0_funcs[] = { 1, };
1041 +static const int mt7623_pcm_sync_1_pins[] = { 30, };
1042 +static const int mt7623_pcm_sync_1_funcs[] = { 3, };
1043 +static const int mt7623_pcm_sync_2_pins[] = { 36, };
1044 +static const int mt7623_pcm_sync_2_funcs[] = { 3, };
1045 +static const int mt7623_pcm_sync_3_pins[] = { 52, };
1046 +static const int mt7623_pcm_sync_3_funcs[] = { 31, };
1047 +static const int mt7623_pcm_sync_4_pins[] = { 73, };
1048 +static const int mt7623_pcm_sync_4_funcs[] = { 3, };
1049 +static const int mt7623_pcm_sync_5_pins[] = { 192, };
1050 +static const int mt7623_pcm_sync_5_funcs[] = { 3, };
1051 +static const int mt7623_pcm_sync_6_pins[] = { 197, };
1052 +static const int mt7623_pcm_sync_6_funcs[] = { 3, };
1053 +static const int mt7623_pcm_rx_0_pins[] = { 20, };
1054 +static const int mt7623_pcm_rx_0_funcs[] = { 1, };
1055 +static const int mt7623_pcm_rx_1_pins[] = { 16, };
1056 +static const int mt7623_pcm_rx_1_funcs[] = { 3, };
1057 +static const int mt7623_pcm_rx_2_pins[] = { 34, };
1058 +static const int mt7623_pcm_rx_2_funcs[] = { 3, };
1059 +static const int mt7623_pcm_rx_3_pins[] = { 51, };
1060 +static const int mt7623_pcm_rx_3_funcs[] = { 3, };
1061 +static const int mt7623_pcm_rx_4_pins[] = { 72, };
1062 +static const int mt7623_pcm_rx_4_funcs[] = { 3, };
1063 +static const int mt7623_pcm_rx_5_pins[] = { 190, };
1064 +static const int mt7623_pcm_rx_5_funcs[] = { 3, };
1065 +static const int mt7623_pcm_rx_6_pins[] = { 195, };
1066 +static const int mt7623_pcm_rx_6_funcs[] = { 3, };
1067 +static const int mt7623_pcm_tx_0_pins[] = { 21, };
1068 +static const int mt7623_pcm_tx_0_funcs[] = { 1, };
1069 +static const int mt7623_pcm_tx_1_pins[] = { 32, };
1070 +static const int mt7623_pcm_tx_1_funcs[] = { 3, };
1071 +static const int mt7623_pcm_tx_2_pins[] = { 33, };
1072 +static const int mt7623_pcm_tx_2_funcs[] = { 3, };
1073 +static const int mt7623_pcm_tx_3_pins[] = { 38, };
1074 +static const int mt7623_pcm_tx_3_funcs[] = { 3, };
1075 +static const int mt7623_pcm_tx_4_pins[] = { 49, };
1076 +static const int mt7623_pcm_tx_4_funcs[] = { 3, };
1077 +static const int mt7623_pcm_tx_5_pins[] = { 189, };
1078 +static const int mt7623_pcm_tx_5_funcs[] = { 3, };
1079 +static const int mt7623_pcm_tx_6_pins[] = { 194, };
1080 +static const int mt7623_pcm_tx_6_funcs[] = { 3, };
1081
1082  /* PWM */
1083 -static int mt7623_pwm_ch1_0_pins[] = { 203, };
1084 -static int mt7623_pwm_ch1_0_funcs[] = { 1, };
1085 -static int mt7623_pwm_ch1_1_pins[] = { 208, };
1086 -static int mt7623_pwm_ch1_1_funcs[] = { 2, };
1087 -static int mt7623_pwm_ch1_2_pins[] = { 72, };
1088 -static int mt7623_pwm_ch1_2_funcs[] = { 4, };
1089 -static int mt7623_pwm_ch1_3_pins[] = { 88, };
1090 -static int mt7623_pwm_ch1_3_funcs[] = { 3, };
1091 -static int mt7623_pwm_ch1_4_pins[] = { 108, };
1092 -static int mt7623_pwm_ch1_4_funcs[] = { 3, };
1093 -static int mt7623_pwm_ch2_0_pins[] = { 204, };
1094 -static int mt7623_pwm_ch2_0_funcs[] = { 1, };
1095 -static int mt7623_pwm_ch2_1_pins[] = { 53, };
1096 -static int mt7623_pwm_ch2_1_funcs[] = { 5, };
1097 -static int mt7623_pwm_ch2_2_pins[] = { 88, };
1098 -static int mt7623_pwm_ch2_2_funcs[] = { 6, };
1099 -static int mt7623_pwm_ch2_3_pins[] = { 108, };
1100 -static int mt7623_pwm_ch2_3_funcs[] = { 6, };
1101 -static int mt7623_pwm_ch2_4_pins[] = { 209, };
1102 -static int mt7623_pwm_ch2_4_funcs[] = { 5, };
1103 -static int mt7623_pwm_ch3_0_pins[] = { 205, };
1104 -static int mt7623_pwm_ch3_0_funcs[] = { 1, };
1105 -static int mt7623_pwm_ch3_1_pins[] = { 55, };
1106 -static int mt7623_pwm_ch3_1_funcs[] = { 5, };
1107 -static int mt7623_pwm_ch3_2_pins[] = { 89, };
1108 -static int mt7623_pwm_ch3_2_funcs[] = { 6, };
1109 -static int mt7623_pwm_ch3_3_pins[] = { 109, };
1110 -static int mt7623_pwm_ch3_3_funcs[] = { 6, };
1111 -static int mt7623_pwm_ch4_0_pins[] = { 206, };
1112 -static int mt7623_pwm_ch4_0_funcs[] = { 1, };
1113 -static int mt7623_pwm_ch4_1_pins[] = { 90, };
1114 -static int mt7623_pwm_ch4_1_funcs[] = { 6, };
1115 -static int mt7623_pwm_ch4_2_pins[] = { 110, };
1116 -static int mt7623_pwm_ch4_2_funcs[] = { 6, };
1117 -static int mt7623_pwm_ch4_3_pins[] = { 124, };
1118 -static int mt7623_pwm_ch4_3_funcs[] = { 5, };
1119 -static int mt7623_pwm_ch5_0_pins[] = { 207, };
1120 -static int mt7623_pwm_ch5_0_funcs[] = { 1, };
1121 -static int mt7623_pwm_ch5_1_pins[] = { 125, };
1122 -static int mt7623_pwm_ch5_1_funcs[] = { 5, };
1123 +static const int mt7623_pwm_ch1_0_pins[] = { 203, };
1124 +static const int mt7623_pwm_ch1_0_funcs[] = { 1, };
1125 +static const int mt7623_pwm_ch1_1_pins[] = { 208, };
1126 +static const int mt7623_pwm_ch1_1_funcs[] = { 2, };
1127 +static const int mt7623_pwm_ch1_2_pins[] = { 72, };
1128 +static const int mt7623_pwm_ch1_2_funcs[] = { 4, };
1129 +static const int mt7623_pwm_ch1_3_pins[] = { 88, };
1130 +static const int mt7623_pwm_ch1_3_funcs[] = { 3, };
1131 +static const int mt7623_pwm_ch1_4_pins[] = { 108, };
1132 +static const int mt7623_pwm_ch1_4_funcs[] = { 3, };
1133 +static const int mt7623_pwm_ch2_0_pins[] = { 204, };
1134 +static const int mt7623_pwm_ch2_0_funcs[] = { 1, };
1135 +static const int mt7623_pwm_ch2_1_pins[] = { 53, };
1136 +static const int mt7623_pwm_ch2_1_funcs[] = { 5, };
1137 +static const int mt7623_pwm_ch2_2_pins[] = { 88, };
1138 +static const int mt7623_pwm_ch2_2_funcs[] = { 6, };
1139 +static const int mt7623_pwm_ch2_3_pins[] = { 108, };
1140 +static const int mt7623_pwm_ch2_3_funcs[] = { 6, };
1141 +static const int mt7623_pwm_ch2_4_pins[] = { 209, };
1142 +static const int mt7623_pwm_ch2_4_funcs[] = { 5, };
1143 +static const int mt7623_pwm_ch3_0_pins[] = { 205, };
1144 +static const int mt7623_pwm_ch3_0_funcs[] = { 1, };
1145 +static const int mt7623_pwm_ch3_1_pins[] = { 55, };
1146 +static const int mt7623_pwm_ch3_1_funcs[] = { 5, };
1147 +static const int mt7623_pwm_ch3_2_pins[] = { 89, };
1148 +static const int mt7623_pwm_ch3_2_funcs[] = { 6, };
1149 +static const int mt7623_pwm_ch3_3_pins[] = { 109, };
1150 +static const int mt7623_pwm_ch3_3_funcs[] = { 6, };
1151 +static const int mt7623_pwm_ch4_0_pins[] = { 206, };
1152 +static const int mt7623_pwm_ch4_0_funcs[] = { 1, };
1153 +static const int mt7623_pwm_ch4_1_pins[] = { 90, };
1154 +static const int mt7623_pwm_ch4_1_funcs[] = { 6, };
1155 +static const int mt7623_pwm_ch4_2_pins[] = { 110, };
1156 +static const int mt7623_pwm_ch4_2_funcs[] = { 6, };
1157 +static const int mt7623_pwm_ch4_3_pins[] = { 124, };
1158 +static const int mt7623_pwm_ch4_3_funcs[] = { 5, };
1159 +static const int mt7623_pwm_ch5_0_pins[] = { 207, };
1160 +static const int mt7623_pwm_ch5_0_funcs[] = { 1, };
1161 +static const int mt7623_pwm_ch5_1_pins[] = { 125, };
1162 +static const int mt7623_pwm_ch5_1_funcs[] = { 5, };
1163
1164  /* PWRAP */
1165 -static int mt7623_pwrap_pins[] = { 0, 1, 2, 3, 4, 5, 6, };
1166 -static int mt7623_pwrap_funcs[] = { 1, 1, 1, 1, 1, 1, 1, };
1167 +static const int mt7623_pwrap_pins[] = { 0, 1, 2, 3, 4, 5, 6, };
1168 +static const int mt7623_pwrap_funcs[] = { 1, 1, 1, 1, 1, 1, 1, };
1169
1170  /* SPDIF */
1171 -static int mt7623_spdif_in0_0_pins[] = { 56, };
1172 -static int mt7623_spdif_in0_0_funcs[] = { 3, };
1173 -static int mt7623_spdif_in0_1_pins[] = { 201, };
1174 -static int mt7623_spdif_in0_1_funcs[] = { 1, };
1175 -static int mt7623_spdif_in1_0_pins[] = { 54, };
1176 -static int mt7623_spdif_in1_0_funcs[] = { 3, };
1177 -static int mt7623_spdif_in1_1_pins[] = { 202, };
1178 -static int mt7623_spdif_in1_1_funcs[] = { 1, };
1179 -static int mt7623_spdif_out_pins[] = { 202, };
1180 -static int mt7623_spdif_out_funcs[] = { 1, };
1181 +static const int mt7623_spdif_in0_0_pins[] = { 56, };
1182 +static const int mt7623_spdif_in0_0_funcs[] = { 3, };
1183 +static const int mt7623_spdif_in0_1_pins[] = { 201, };
1184 +static const int mt7623_spdif_in0_1_funcs[] = { 1, };
1185 +static const int mt7623_spdif_in1_0_pins[] = { 54, };
1186 +static const int mt7623_spdif_in1_0_funcs[] = { 3, };
1187 +static const int mt7623_spdif_in1_1_pins[] = { 202, };
1188 +static const int mt7623_spdif_in1_1_funcs[] = { 1, };
1189 +static const int mt7623_spdif_out_pins[] = { 202, };
1190 +static const int mt7623_spdif_out_funcs[] = { 1, };
1191
1192  /* SPI */
1193 -static int mt7623_spi0_pins[] = { 53, 54, 55, 56, };
1194 -static int mt7623_spi0_funcs[] = { 1, 1, 1, 1, };
1195 -static int mt7623_spi1_pins[] = { 7, 199, 8, 9, };
1196 -static int mt7623_spi1_funcs[] = { 1, 1, 1, 1, };
1197 -static int mt7623_spi2_pins[] = { 101, 104, 102, 103, };
1198 -static int mt7623_spi2_funcs[] = { 1, 1, 1, 1, };
1199 +static const int mt7623_spi0_pins[] = { 53, 54, 55, 56, };
1200 +static const int mt7623_spi0_funcs[] = { 1, 1, 1, 1, };
1201 +static const int mt7623_spi1_pins[] = { 7, 199, 8, 9, };
1202 +static const int mt7623_spi1_funcs[] = { 1, 1, 1, 1, };
1203 +static const int mt7623_spi2_pins[] = { 101, 104, 102, 103, };
1204 +static const int mt7623_spi2_funcs[] = { 1, 1, 1, 1, };
1205
1206  /* UART */
1207 -static int mt7623_uart0_0_txd_rxd_pins[] = { 79, 80, };
1208 -static int mt7623_uart0_0_txd_rxd_funcs[] = { 1, 1, };
1209 -static int mt7623_uart0_1_txd_rxd_pins[] = { 87, 88, };
1210 -static int mt7623_uart0_1_txd_rxd_funcs[] = { 5, 5, };
1211 -static int mt7623_uart0_2_txd_rxd_pins[] = { 107, 108, };
1212 -static int mt7623_uart0_2_txd_rxd_funcs[] = { 5, 5, };
1213 -static int mt7623_uart0_3_txd_rxd_pins[] = { 123, 122, };
1214 -static int mt7623_uart0_3_txd_rxd_funcs[] = { 5, 5, };
1215 -static int mt7623_uart0_rts_cts_pins[] = { 22, 23, };
1216 -static int mt7623_uart0_rts_cts_funcs[] = { 1, 1, };
1217 -static int mt7623_uart1_0_txd_rxd_pins[] = { 81, 82, };
1218 -static int mt7623_uart1_0_txd_rxd_funcs[] = { 1, 1, };
1219 -static int mt7623_uart1_1_txd_rxd_pins[] = { 89, 90, };
1220 -static int mt7623_uart1_1_txd_rxd_funcs[] = { 5, 5, };
1221 -static int mt7623_uart1_2_txd_rxd_pins[] = { 109, 110, };
1222 -static int mt7623_uart1_2_txd_rxd_funcs[] = { 5, 5, };
1223 -static int mt7623_uart1_rts_cts_pins[] = { 24, 25, };
1224 -static int mt7623_uart1_rts_cts_funcs[] = { 1, 1, };
1225 -static int mt7623_uart2_0_txd_rxd_pins[] = { 14, 15, };
1226 -static int mt7623_uart2_0_txd_rxd_funcs[] = { 1, 1, };
1227 -static int mt7623_uart2_1_txd_rxd_pins[] = { 200, 201, };
1228 -static int mt7623_uart2_1_txd_rxd_funcs[] = { 6, 6, };
1229 -static int mt7623_uart2_rts_cts_pins[] = { 242, 243, };
1230 -static int mt7623_uart2_rts_cts_funcs[] = { 1, 1, };
1231 -static int mt7623_uart3_txd_rxd_pins[] = { 242, 243, };
1232 -static int mt7623_uart3_txd_rxd_funcs[] = { 2, 2, };
1233 -static int mt7623_uart3_rts_cts_pins[] = { 26, 27, };
1234 -static int mt7623_uart3_rts_cts_funcs[] = { 1, 1, };
1235 +static const int mt7623_uart0_0_txd_rxd_pins[] = { 79, 80, };
1236 +static const int mt7623_uart0_0_txd_rxd_funcs[] = { 1, 1, };
1237 +static const int mt7623_uart0_1_txd_rxd_pins[] = { 87, 88, };
1238 +static const int mt7623_uart0_1_txd_rxd_funcs[] = { 5, 5, };
1239 +static const int mt7623_uart0_2_txd_rxd_pins[] = { 107, 108, };
1240 +static const int mt7623_uart0_2_txd_rxd_funcs[] = { 5, 5, };
1241 +static const int mt7623_uart0_3_txd_rxd_pins[] = { 123, 122, };
1242 +static const int mt7623_uart0_3_txd_rxd_funcs[] = { 5, 5, };
1243 +static const int mt7623_uart0_rts_cts_pins[] = { 22, 23, };
1244 +static const int mt7623_uart0_rts_cts_funcs[] = { 1, 1, };
1245 +static const int mt7623_uart1_0_txd_rxd_pins[] = { 81, 82, };
1246 +static const int mt7623_uart1_0_txd_rxd_funcs[] = { 1, 1, };
1247 +static const int mt7623_uart1_1_txd_rxd_pins[] = { 89, 90, };
1248 +static const int mt7623_uart1_1_txd_rxd_funcs[] = { 5, 5, };
1249 +static const int mt7623_uart1_2_txd_rxd_pins[] = { 109, 110, };
1250 +static const int mt7623_uart1_2_txd_rxd_funcs[] = { 5, 5, };
1251 +static const int mt7623_uart1_rts_cts_pins[] = { 24, 25, };
1252 +static const int mt7623_uart1_rts_cts_funcs[] = { 1, 1, };
1253 +static const int mt7623_uart2_0_txd_rxd_pins[] = { 14, 15, };
1254 +static const int mt7623_uart2_0_txd_rxd_funcs[] = { 1, 1, };
1255 +static const int mt7623_uart2_1_txd_rxd_pins[] = { 200, 201, };
1256 +static const int mt7623_uart2_1_txd_rxd_funcs[] = { 6, 6, };
1257 +static const int mt7623_uart2_rts_cts_pins[] = { 242, 243, };
1258 +static const int mt7623_uart2_rts_cts_funcs[] = { 1, 1, };
1259 +static const int mt7623_uart3_txd_rxd_pins[] = { 242, 243, };
1260 +static const int mt7623_uart3_txd_rxd_funcs[] = { 2, 2, };
1261 +static const int mt7623_uart3_rts_cts_pins[] = { 26, 27, };
1262 +static const int mt7623_uart3_rts_cts_funcs[] = { 1, 1, };
1263
1264  /* Watchdog */
1265 -static int mt7623_watchdog_0_pins[] = { 11, };
1266 -static int mt7623_watchdog_0_funcs[] = { 1, };
1267 -static int mt7623_watchdog_1_pins[] = { 121, };
1268 -static int mt7623_watchdog_1_funcs[] = { 5, };
1269 +static const int mt7623_watchdog_0_pins[] = { 11, };
1270 +static const int mt7623_watchdog_0_funcs[] = { 1, };
1271 +static const int mt7623_watchdog_1_pins[] = { 121, };
1272 +static const int mt7623_watchdog_1_funcs[] = { 5, };
1273
1274  static const struct mtk_group_desc mt7623_groups[] = {
1275         PINCTRL_PIN_GROUP("aud_ext_clk0", mt7623_aud_ext_clk0),
1276 @@ -1362,7 +1362,7 @@ static const struct mtk_function_desc mt
1277         {"watchdog", mt7623_wdt_groups, ARRAY_SIZE(mt7623_wdt_groups)},
1278  };
1279
1280 -static struct mtk_pinctrl_soc mt7623_data = {
1281 +static const struct mtk_pinctrl_soc mt7623_data = {
1282         .name = "mt7623_pinctrl",
1283         .reg_cal = mt7623_reg_cals,
1284         .pins = mt7623_pins,
1285 --- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c
1286 +++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c
1287 @@ -180,118 +180,118 @@ static const struct mtk_pin_desc mt7629_
1288   */
1289
1290  /* WF 5G */
1291 -static int mt7629_wf0_5g_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, };
1292 -static int mt7629_wf0_5g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
1293 +static const int mt7629_wf0_5g_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, };
1294 +static const int mt7629_wf0_5g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
1295
1296  /* LED for EPHY */
1297 -static int mt7629_ephy_leds_pins[] = { 12, 13, 14, 15, 16, 17, 18, };
1298 -static int mt7629_ephy_leds_funcs[] = { 1, 1, 1, 1, 1, 1, 1, };
1299 -static int mt7629_ephy_led0_pins[] = { 12, };
1300 -static int mt7629_ephy_led0_funcs[] = { 1, };
1301 -static int mt7629_ephy_led1_pins[] = { 13, };
1302 -static int mt7629_ephy_led1_funcs[] = { 1, };
1303 -static int mt7629_ephy_led2_pins[] = { 14, };
1304 -static int mt7629_ephy_led2_funcs[] = { 1, };
1305 -static int mt7629_ephy_led3_pins[] = { 15, };
1306 -static int mt7629_ephy_led3_funcs[] = { 1, };
1307 -static int mt7629_ephy_led4_pins[] = { 16, };
1308 -static int mt7629_ephy_led4_funcs[] = { 1, };
1309 -static int mt7629_wf2g_led_pins[] = { 17, };
1310 -static int mt7629_wf2g_led_funcs[] = { 1, };
1311 -static int mt7629_wf5g_led_pins[] = { 18, };
1312 -static int mt7629_wf5g_led_funcs[] = { 1, };
1313 +static const int mt7629_ephy_leds_pins[] = { 12, 13, 14, 15, 16, 17, 18, };
1314 +static const int mt7629_ephy_leds_funcs[] = { 1, 1, 1, 1, 1, 1, 1, };
1315 +static const int mt7629_ephy_led0_pins[] = { 12, };
1316 +static const int mt7629_ephy_led0_funcs[] = { 1, };
1317 +static const int mt7629_ephy_led1_pins[] = { 13, };
1318 +static const int mt7629_ephy_led1_funcs[] = { 1, };
1319 +static const int mt7629_ephy_led2_pins[] = { 14, };
1320 +static const int mt7629_ephy_led2_funcs[] = { 1, };
1321 +static const int mt7629_ephy_led3_pins[] = { 15, };
1322 +static const int mt7629_ephy_led3_funcs[] = { 1, };
1323 +static const int mt7629_ephy_led4_pins[] = { 16, };
1324 +static const int mt7629_ephy_led4_funcs[] = { 1, };
1325 +static const int mt7629_wf2g_led_pins[] = { 17, };
1326 +static const int mt7629_wf2g_led_funcs[] = { 1, };
1327 +static const int mt7629_wf5g_led_pins[] = { 18, };
1328 +static const int mt7629_wf5g_led_funcs[] = { 1, };
1329
1330  /* LED for EPHY used as JTAG */
1331 -static int mt7629_ephy_leds_jtag_pins[] = { 12, 13, 14, 15, 16, };
1332 -static int mt7629_ephy_leds_jtag_funcs[] = { 7, 7, 7, 7, 7, };
1333 +static const int mt7629_ephy_leds_jtag_pins[] = { 12, 13, 14, 15, 16, };
1334 +static const int mt7629_ephy_leds_jtag_funcs[] = { 7, 7, 7, 7, 7, };
1335
1336  /* Watchdog */
1337 -static int mt7629_watchdog_pins[] = { 11, };
1338 -static int mt7629_watchdog_funcs[] = { 1, };
1339 +static const int mt7629_watchdog_pins[] = { 11, };
1340 +static const int mt7629_watchdog_funcs[] = { 1, };
1341
1342  /* LED for GPHY */
1343 -static int mt7629_gphy_leds_0_pins[] = { 21, 22, 23, };
1344 -static int mt7629_gphy_leds_0_funcs[] = { 2, 2, 2, };
1345 -static int mt7629_gphy_led1_0_pins[] = { 21, };
1346 -static int mt7629_gphy_led1_0_funcs[] = { 2, };
1347 -static int mt7629_gphy_led2_0_pins[] = { 22, };
1348 -static int mt7629_gphy_led2_0_funcs[] = { 2, };
1349 -static int mt7629_gphy_led3_0_pins[] = { 23, };
1350 -static int mt7629_gphy_led3_0_funcs[] = { 2, };
1351 -static int mt7629_gphy_leds_1_pins[] = { 57, 58, 59, };
1352 -static int mt7629_gphy_leds_1_funcs[] = { 1, 1, 1, };
1353 -static int mt7629_gphy_led1_1_pins[] = { 57, };
1354 -static int mt7629_gphy_led1_1_funcs[] = { 1, };
1355 -static int mt7629_gphy_led2_1_pins[] = { 58, };
1356 -static int mt7629_gphy_led2_1_funcs[] = { 1, };
1357 -static int mt7629_gphy_led3_1_pins[] = { 59, };
1358 -static int mt7629_gphy_led3_1_funcs[] = { 1, };
1359 +static const int mt7629_gphy_leds_0_pins[] = { 21, 22, 23, };
1360 +static const int mt7629_gphy_leds_0_funcs[] = { 2, 2, 2, };
1361 +static const int mt7629_gphy_led1_0_pins[] = { 21, };
1362 +static const int mt7629_gphy_led1_0_funcs[] = { 2, };
1363 +static const int mt7629_gphy_led2_0_pins[] = { 22, };
1364 +static const int mt7629_gphy_led2_0_funcs[] = { 2, };
1365 +static const int mt7629_gphy_led3_0_pins[] = { 23, };
1366 +static const int mt7629_gphy_led3_0_funcs[] = { 2, };
1367 +static const int mt7629_gphy_leds_1_pins[] = { 57, 58, 59, };
1368 +static const int mt7629_gphy_leds_1_funcs[] = { 1, 1, 1, };
1369 +static const int mt7629_gphy_led1_1_pins[] = { 57, };
1370 +static const int mt7629_gphy_led1_1_funcs[] = { 1, };
1371 +static const int mt7629_gphy_led2_1_pins[] = { 58, };
1372 +static const int mt7629_gphy_led2_1_funcs[] = { 1, };
1373 +static const int mt7629_gphy_led3_1_pins[] = { 59, };
1374 +static const int mt7629_gphy_led3_1_funcs[] = { 1, };
1375
1376  /* I2C */
1377 -static int mt7629_i2c_0_pins[] = { 19, 20, };
1378 -static int mt7629_i2c_0_funcs[] = { 1, 1, };
1379 -static int mt7629_i2c_1_pins[] = { 53, 54, };
1380 -static int mt7629_i2c_1_funcs[] = { 1, 1, };
1381 +static const int mt7629_i2c_0_pins[] = { 19, 20, };
1382 +static const int mt7629_i2c_0_funcs[] = { 1, 1, };
1383 +static const int mt7629_i2c_1_pins[] = { 53, 54, };
1384 +static const int mt7629_i2c_1_funcs[] = { 1, 1, };
1385
1386  /* SPI */
1387 -static int mt7629_spi_0_pins[] = { 21, 22, 23, 24, };
1388 -static int mt7629_spi_0_funcs[] = { 1, 1, 1, 1, };
1389 -static int mt7629_spi_1_pins[] = { 62, 63, 64, 65, };
1390 -static int mt7629_spi_1_funcs[] = { 1, 1, 1, 1, };
1391 -static int mt7629_spi_wp_pins[] = { 66, };
1392 -static int mt7629_spi_wp_funcs[] = { 1, };
1393 -static int mt7629_spi_hold_pins[] = { 67, };
1394 -static int mt7629_spi_hold_funcs[] = { 1, };
1395 +static const int mt7629_spi_0_pins[] = { 21, 22, 23, 24, };
1396 +static const int mt7629_spi_0_funcs[] = { 1, 1, 1, 1, };
1397 +static const int mt7629_spi_1_pins[] = { 62, 63, 64, 65, };
1398 +static const int mt7629_spi_1_funcs[] = { 1, 1, 1, 1, };
1399 +static const int mt7629_spi_wp_pins[] = { 66, };
1400 +static const int mt7629_spi_wp_funcs[] = { 1, };
1401 +static const int mt7629_spi_hold_pins[] = { 67, };
1402 +static const int mt7629_spi_hold_funcs[] = { 1, };
1403
1404  /* UART */
1405 -static int mt7629_uart1_0_txd_rxd_pins[] = { 25, 26, };
1406 -static int mt7629_uart1_0_txd_rxd_funcs[] = { 1, 1, };
1407 -static int mt7629_uart1_1_txd_rxd_pins[] = { 53, 54, };
1408 -static int mt7629_uart1_1_txd_rxd_funcs[] = { 2, 2, };
1409 -static int mt7629_uart2_0_txd_rxd_pins[] = { 29, 30, };
1410 -static int mt7629_uart2_0_txd_rxd_funcs[] = { 1, 1, };
1411 -static int mt7629_uart2_1_txd_rxd_pins[] = { 57, 58, };
1412 -static int mt7629_uart2_1_txd_rxd_funcs[] = { 2, 2, };
1413 -static int mt7629_uart1_0_cts_rts_pins[] = { 27, 28, };
1414 -static int mt7629_uart1_0_cts_rts_funcs[] = { 1, 1, };
1415 -static int mt7629_uart1_1_cts_rts_pins[] = { 55, 56, };
1416 -static int mt7629_uart1_1_cts_rts_funcs[] = { 2, 2, };
1417 -static int mt7629_uart2_0_cts_rts_pins[] = { 31, 32, };
1418 -static int mt7629_uart2_0_cts_rts_funcs[] = { 1, 1, };
1419 -static int mt7629_uart2_1_cts_rts_pins[] = { 59, 60, };
1420 -static int mt7629_uart2_1_cts_rts_funcs[] = { 2, 2, };
1421 -static int mt7629_uart0_txd_rxd_pins[] = { 68, 69, };
1422 -static int mt7629_uart0_txd_rxd_funcs[] = { 1, 1, };
1423 +static const int mt7629_uart1_0_txd_rxd_pins[] = { 25, 26, };
1424 +static const int mt7629_uart1_0_txd_rxd_funcs[] = { 1, 1, };
1425 +static const int mt7629_uart1_1_txd_rxd_pins[] = { 53, 54, };
1426 +static const int mt7629_uart1_1_txd_rxd_funcs[] = { 2, 2, };
1427 +static const int mt7629_uart2_0_txd_rxd_pins[] = { 29, 30, };
1428 +static const int mt7629_uart2_0_txd_rxd_funcs[] = { 1, 1, };
1429 +static const int mt7629_uart2_1_txd_rxd_pins[] = { 57, 58, };
1430 +static const int mt7629_uart2_1_txd_rxd_funcs[] = { 2, 2, };
1431 +static const int mt7629_uart1_0_cts_rts_pins[] = { 27, 28, };
1432 +static const int mt7629_uart1_0_cts_rts_funcs[] = { 1, 1, };
1433 +static const int mt7629_uart1_1_cts_rts_pins[] = { 55, 56, };
1434 +static const int mt7629_uart1_1_cts_rts_funcs[] = { 2, 2, };
1435 +static const int mt7629_uart2_0_cts_rts_pins[] = { 31, 32, };
1436 +static const int mt7629_uart2_0_cts_rts_funcs[] = { 1, 1, };
1437 +static const int mt7629_uart2_1_cts_rts_pins[] = { 59, 60, };
1438 +static const int mt7629_uart2_1_cts_rts_funcs[] = { 2, 2, };
1439 +static const int mt7629_uart0_txd_rxd_pins[] = { 68, 69, };
1440 +static const int mt7629_uart0_txd_rxd_funcs[] = { 1, 1, };
1441
1442  /* MDC/MDIO */
1443 -static int mt7629_mdc_mdio_pins[] = { 49, 50, };
1444 -static int mt7629_mdc_mdio_funcs[] = { 1, 1, };
1445 +static const int mt7629_mdc_mdio_pins[] = { 49, 50, };
1446 +static const int mt7629_mdc_mdio_funcs[] = { 1, 1, };
1447
1448  /* PCIE */
1449 -static int mt7629_pcie_pereset_pins[] = { 51, };
1450 -static int mt7629_pcie_pereset_funcs[] = { 1, };
1451 -static int mt7629_pcie_wake_pins[] = { 55, };
1452 -static int mt7629_pcie_wake_funcs[] = { 1, };
1453 -static int mt7629_pcie_clkreq_pins[] = { 56, };
1454 -static int mt7629_pcie_clkreq_funcs[] = { 1, };
1455 +static const int mt7629_pcie_pereset_pins[] = { 51, };
1456 +static const int mt7629_pcie_pereset_funcs[] = { 1, };
1457 +static const int mt7629_pcie_wake_pins[] = { 55, };
1458 +static const int mt7629_pcie_wake_funcs[] = { 1, };
1459 +static const int mt7629_pcie_clkreq_pins[] = { 56, };
1460 +static const int mt7629_pcie_clkreq_funcs[] = { 1, };
1461
1462  /* PWM */
1463 -static int mt7629_pwm_0_pins[] = { 52, };
1464 -static int mt7629_pwm_0_funcs[] = { 1, };
1465 -static int mt7629_pwm_1_pins[] = { 61, };
1466 -static int mt7629_pwm_1_funcs[] = { 2, };
1467 +static const int mt7629_pwm_0_pins[] = { 52, };
1468 +static const int mt7629_pwm_0_funcs[] = { 1, };
1469 +static const int mt7629_pwm_1_pins[] = { 61, };
1470 +static const int mt7629_pwm_1_funcs[] = { 2, };
1471
1472  /* WF 2G */
1473 -static int mt7629_wf0_2g_pins[] = { 70, 71, 72, 73, 74, 75, 76, 77, 78, };
1474 -static int mt7629_wf0_2g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, };
1475 +static const int mt7629_wf0_2g_pins[] = { 70, 71, 72, 73, 74, 75, 76, 77, 78, };
1476 +static const int mt7629_wf0_2g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, };
1477
1478  /* SNFI */
1479 -static int mt7629_snfi_pins[] = { 62, 63, 64, 65, 66, 67 };
1480 -static int mt7629_snfi_funcs[] = { 2, 2, 2, 2, 2, 2 };
1481 +static const int mt7629_snfi_pins[] = { 62, 63, 64, 65, 66, 67 };
1482 +static const int mt7629_snfi_funcs[] = { 2, 2, 2, 2, 2, 2 };
1483
1484  /* SPI NOR */
1485 -static int mt7629_snor_pins[] = { 62, 63, 64, 65, 66, 67 };
1486 -static int mt7629_snor_funcs[] = { 1, 1, 1, 1, 1, 1 };
1487 +static const int mt7629_snor_pins[] = { 62, 63, 64, 65, 66, 67 };
1488 +static const int mt7629_snor_funcs[] = { 1, 1, 1, 1, 1, 1 };
1489
1490  static const struct mtk_group_desc mt7629_groups[] = {
1491         PINCTRL_PIN_GROUP("wf0_5g", mt7629_wf0_5g),
1492 @@ -385,7 +385,7 @@ static const struct mtk_function_desc mt
1493         {"jtag", mt7629_jtag_groups, ARRAY_SIZE(mt7629_jtag_groups)},
1494  };
1495
1496 -static struct mtk_pinctrl_soc mt7629_data = {
1497 +static const struct mtk_pinctrl_soc mt7629_data = {
1498         .name = "mt7629_pinctrl",
1499         .reg_cal = mt7629_reg_cals,
1500         .pins = mt7629_pins,
1501 --- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c
1502 +++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c
1503 @@ -570,242 +570,246 @@ static const struct mtk_pin_desc mt7981_
1504  };
1505
1506  /* WA_AICE */
1507 -static int mt7981_wa_aice1_pins[] = { 0, 1, };
1508 -static int mt7981_wa_aice1_funcs[] = { 2, 2, };
1509 +static const int mt7981_wa_aice1_pins[] = { 0, 1, };
1510 +static const int mt7981_wa_aice1_funcs[] = { 2, 2, };
1511
1512 -static int mt7981_wa_aice2_pins[] = { 0, 1, };
1513 -static int mt7981_wa_aice2_funcs[] = { 3, 3, };
1514 +static const int mt7981_wa_aice2_pins[] = { 0, 1, };
1515 +static const int mt7981_wa_aice2_funcs[] = { 3, 3, };
1516
1517 -static int mt7981_wa_aice3_pins[] = { 28, 29, };
1518 -static int mt7981_wa_aice3_funcs[] = { 3, 3, };
1519 +static const int mt7981_wa_aice3_pins[] = { 28, 29, };
1520 +static const int mt7981_wa_aice3_funcs[] = { 3, 3, };
1521
1522 -static int mt7981_wm_aice1_pins[] = { 9, 10, };
1523 -static int mt7981_wm_aice1_funcs[] = { 2, 2, };
1524 +static const int mt7981_wm_aice1_pins[] = { 9, 10, };
1525 +static const int mt7981_wm_aice1_funcs[] = { 2, 2, };
1526
1527 -static int mt7981_wm_aice2_pins[] = { 30, 31, };
1528 -static int mt7981_wm_aice2_funcs[] = { 5, 5, };
1529 +static const int mt7981_wm_aice2_pins[] = { 30, 31, };
1530 +static const int mt7981_wm_aice2_funcs[] = { 5, 5, };
1531
1532  /* WM_UART */
1533 -static int mt7981_wm_uart_0_pins[] = { 0, 1, };
1534 -static int mt7981_wm_uart_0_funcs[] = { 5, 5, };
1535 +static const int mt7981_wm_uart_0_pins[] = { 0, 1, };
1536 +static const int mt7981_wm_uart_0_funcs[] = { 5, 5, };
1537
1538 -static int mt7981_wm_uart_1_pins[] = { 20, 21, };
1539 -static int mt7981_wm_uart_1_funcs[] = { 4, 4, };
1540 +static const int mt7981_wm_uart_1_pins[] = { 20, 21, };
1541 +static const int mt7981_wm_uart_1_funcs[] = { 4, 4, };
1542
1543 -static int mt7981_wm_uart_2_pins[] = { 30, 31, };
1544 -static int mt7981_wm_uart_2_funcs[] = { 3, 3, };
1545 +static const int mt7981_wm_uart_2_pins[] = { 30, 31, };
1546 +static const int mt7981_wm_uart_2_funcs[] = { 3, 3, };
1547
1548  /* DFD */
1549 -static int mt7981_dfd_pins[] = { 0, 1, 4, 5, };
1550 -static int mt7981_dfd_funcs[] = { 5, 5, 6, 6, };
1551 +static const int mt7981_dfd_pins[] = { 0, 1, 4, 5, };
1552 +static const int mt7981_dfd_funcs[] = { 5, 5, 6, 6, };
1553
1554  /* SYS_WATCHDOG */
1555 -static int mt7981_watchdog_pins[] = { 2, };
1556 -static int mt7981_watchdog_funcs[] = { 1, };
1557 +static const int mt7981_watchdog_pins[] = { 2, };
1558 +static const int mt7981_watchdog_funcs[] = { 1, };
1559
1560 -static int mt7981_watchdog1_pins[] = { 13, };
1561 -static int mt7981_watchdog1_funcs[] = { 5, };
1562 +static const int mt7981_watchdog1_pins[] = { 13, };
1563 +static const int mt7981_watchdog1_funcs[] = { 5, };
1564
1565  /* PCIE_PERESET_N */
1566 -static int mt7981_pcie_pereset_pins[] = { 3, };
1567 -static int mt7981_pcie_pereset_funcs[] = { 1, };
1568 +static const int mt7981_pcie_pereset_pins[] = { 3, };
1569 +static const int mt7981_pcie_pereset_funcs[] = { 1, };
1570
1571  /* JTAG */
1572 -static int mt7981_jtag_pins[] = { 4, 5, 6, 7, 8, };
1573 -static int mt7981_jtag_funcs[] = { 1, 1, 1, 1, 1, };
1574 +static const int mt7981_jtag_pins[] = { 4, 5, 6, 7, 8, };
1575 +static const int mt7981_jtag_funcs[] = { 1, 1, 1, 1, 1, };
1576
1577  /* WM_JTAG */
1578 -static int mt7981_wm_jtag_0_pins[] = { 4, 5, 6, 7, 8, };
1579 -static int mt7981_wm_jtag_0_funcs[] = { 2, 2, 2, 2, 2, };
1580 +static const int mt7981_wm_jtag_0_pins[] = { 4, 5, 6, 7, 8, };
1581 +static const int mt7981_wm_jtag_0_funcs[] = { 2, 2, 2, 2, 2, };
1582
1583 -static int mt7981_wm_jtag_1_pins[] = { 20, 21, 22, 23, 24, };
1584 -static int mt7981_wm_jtag_1_funcs[] = { 5, 5, 5, 5, 5, };
1585 +static const int mt7981_wm_jtag_1_pins[] = { 20, 21, 22, 23, 24, };
1586 +static const int mt7981_wm_jtag_1_funcs[] = { 5, 5, 5, 5, 5, };
1587
1588  /* WO0_JTAG */
1589 -static int mt7981_wo0_jtag_0_pins[] = { 9, 10, 11, 12, 13, };
1590 -static int mt7981_wo0_jtag_0_funcs[] = { 1, 1, 1, 1, 1, };
1591 +static const int mt7981_wo0_jtag_0_pins[] = { 9, 10, 11, 12, 13, };
1592 +static const int mt7981_wo0_jtag_0_funcs[] = { 1, 1, 1, 1, 1, };
1593
1594 -static int mt7981_wo0_jtag_1_pins[] = { 25, 26, 27, 28, 29, };
1595 -static int mt7981_wo0_jtag_1_funcs[] = { 5, 5, 5, 5, 5, };
1596 +static const int mt7981_wo0_jtag_1_pins[] = { 25, 26, 27, 28, 29, };
1597 +static const int mt7981_wo0_jtag_1_funcs[] = { 5, 5, 5, 5, 5, };
1598
1599  /* UART2 */
1600 -static int mt7981_uart2_0_pins[] = { 4, 5, 6, 7, };
1601 -static int mt7981_uart2_0_funcs[] = { 3, 3, 3, 3, };
1602 +static const int mt7981_uart2_0_pins[] = { 4, 5, 6, 7, };
1603 +static const int mt7981_uart2_0_funcs[] = { 3, 3, 3, 3, };
1604
1605  /* GBE_LED0 */
1606 -static int mt7981_gbe_led0_pins[] = { 8, };
1607 -static int mt7981_gbe_led0_funcs[] = { 3, };
1608 +static const int mt7981_gbe_led0_pins[] = { 8, };
1609 +static const int mt7981_gbe_led0_funcs[] = { 3, };
1610
1611  /* PTA_EXT */
1612 -static int mt7981_pta_ext_0_pins[] = { 4, 5, 6, };
1613 -static int mt7981_pta_ext_0_funcs[] = { 4, 4, 4, };
1614 +static const int mt7981_pta_ext_0_pins[] = { 4, 5, 6, };
1615 +static const int mt7981_pta_ext_0_funcs[] = { 4, 4, 4, };
1616
1617 -static int mt7981_pta_ext_1_pins[] = { 22, 23, 24, };
1618 -static int mt7981_pta_ext_1_funcs[] = { 4, 4, 4, };
1619 +static const int mt7981_pta_ext_1_pins[] = { 22, 23, 24, };
1620 +static const int mt7981_pta_ext_1_funcs[] = { 4, 4, 4, };
1621
1622  /* PWM2 */
1623 -static int mt7981_pwm2_pins[] = { 7, };
1624 -static int mt7981_pwm2_funcs[] = { 4, };
1625 +static const int mt7981_pwm2_pins[] = { 7, };
1626 +static const int mt7981_pwm2_funcs[] = { 4, };
1627
1628  /* NET_WO0_UART_TXD */
1629 -static int mt7981_net_wo0_uart_txd_0_pins[] = { 8, };
1630 -static int mt7981_net_wo0_uart_txd_0_funcs[] = { 4, };
1631 +static const int mt7981_net_wo0_uart_txd_0_pins[] = { 8, };
1632 +static const int mt7981_net_wo0_uart_txd_0_funcs[] = { 4, };
1633
1634 -static int mt7981_net_wo0_uart_txd_1_pins[] = { 14, };
1635 -static int mt7981_net_wo0_uart_txd_1_funcs[] = { 3, };
1636 +static const int mt7981_net_wo0_uart_txd_1_pins[] = { 14, };
1637 +static const int mt7981_net_wo0_uart_txd_1_funcs[] = { 3, };
1638
1639 -static int mt7981_net_wo0_uart_txd_2_pins[] = { 15, };
1640 -static int mt7981_net_wo0_uart_txd_2_funcs[] = { 4, };
1641 +static const int mt7981_net_wo0_uart_txd_2_pins[] = { 15, };
1642 +static const int mt7981_net_wo0_uart_txd_2_funcs[] = { 4, };
1643
1644  /* SPI1 */
1645 -static int mt7981_spi1_0_pins[] = { 4, 5, 6, 7, };
1646 -static int mt7981_spi1_0_funcs[] = { 5, 5, 5, 5, };
1647 +static const int mt7981_spi1_0_pins[] = { 4, 5, 6, 7, };
1648 +static const int mt7981_spi1_0_funcs[] = { 5, 5, 5, 5, };
1649
1650  /* I2C */
1651 -static int mt7981_i2c0_0_pins[] = { 6, 7, };
1652 -static int mt7981_i2c0_0_funcs[] = { 6, 6, };
1653 +static const int mt7981_i2c0_0_pins[] = { 6, 7, };
1654 +static const int mt7981_i2c0_0_funcs[] = { 6, 6, };
1655
1656 -static int mt7981_i2c0_1_pins[] = { 30, 31, };
1657 -static int mt7981_i2c0_1_funcs[] = { 4, 4, };
1658 +static const int mt7981_i2c0_1_pins[] = { 30, 31, };
1659 +static const int mt7981_i2c0_1_funcs[] = { 4, 4, };
1660
1661 -static int mt7981_i2c0_2_pins[] = { 36, 37, };
1662 -static int mt7981_i2c0_2_funcs[] = { 2, 2, };
1663 +static const int mt7981_i2c0_2_pins[] = { 36, 37, };
1664 +static const int mt7981_i2c0_2_funcs[] = { 2, 2, };
1665
1666 -static int mt7981_u2_phy_i2c_pins[] = { 30, 31, };
1667 -static int mt7981_u2_phy_i2c_funcs[] = { 6, 6, };
1668 +static const int mt7981_u2_phy_i2c_pins[] = { 30, 31, };
1669 +static const int mt7981_u2_phy_i2c_funcs[] = { 6, 6, };
1670
1671 -static int mt7981_u3_phy_i2c_pins[] = { 32, 33, };
1672 -static int mt7981_u3_phy_i2c_funcs[] = { 3, 3, };
1673 +static const int mt7981_u3_phy_i2c_pins[] = { 32, 33, };
1674 +static const int mt7981_u3_phy_i2c_funcs[] = { 3, 3, };
1675
1676 -static int mt7981_sgmii1_phy_i2c_pins[] = { 32, 33, };
1677 -static int mt7981_sgmii1_phy_i2c_funcs[] = { 2, 2, };
1678 +static const int mt7981_sgmii1_phy_i2c_pins[] = { 32, 33, };
1679 +static const int mt7981_sgmii1_phy_i2c_funcs[] = { 2, 2, };
1680
1681 -static int mt7981_sgmii0_phy_i2c_pins[] = { 32, 33, };
1682 -static int mt7981_sgmii0_phy_i2c_funcs[] = { 5, 5, };
1683 +static const int mt7981_sgmii0_phy_i2c_pins[] = { 32, 33, };
1684 +static const int mt7981_sgmii0_phy_i2c_funcs[] = { 5, 5, };
1685
1686  /* DFD_NTRST */
1687 -static int mt7981_dfd_ntrst_pins[] = { 8, };
1688 -static int mt7981_dfd_ntrst_funcs[] = { 6, };
1689 +static const int mt7981_dfd_ntrst_pins[] = { 8, };
1690 +static const int mt7981_dfd_ntrst_funcs[] = { 6, };
1691
1692  /* PWM0 */
1693 -static int mt7981_pwm0_0_pins[] = { 13, };
1694 -static int mt7981_pwm0_0_funcs[] = { 2, };
1695 +static const int mt7981_pwm0_0_pins[] = { 13, };
1696 +static const int mt7981_pwm0_0_funcs[] = { 2, };
1697
1698 -static int mt7981_pwm0_1_pins[] = { 15, };
1699 -static int mt7981_pwm0_1_funcs[] = { 1, };
1700 +static const int mt7981_pwm0_1_pins[] = { 15, };
1701 +static const int mt7981_pwm0_1_funcs[] = { 1, };
1702
1703  /* PWM1 */
1704 -static int mt7981_pwm1_0_pins[] = { 14, };
1705 -static int mt7981_pwm1_0_funcs[] = { 2, };
1706 +static const int mt7981_pwm1_0_pins[] = { 14, };
1707 +static const int mt7981_pwm1_0_funcs[] = { 2, };
1708
1709 -static int mt7981_pwm1_1_pins[] = { 15, };
1710 -static int mt7981_pwm1_1_funcs[] = { 3, };
1711 +static const int mt7981_pwm1_1_pins[] = { 15, };
1712 +static const int mt7981_pwm1_1_funcs[] = { 3, };
1713
1714  /* GBE_LED1 */
1715 -static int mt7981_gbe_led1_pins[] = { 13, };
1716 -static int mt7981_gbe_led1_funcs[] = { 3, };
1717 +static const int mt7981_gbe_led1_pins[] = { 13, };
1718 +static const int mt7981_gbe_led1_funcs[] = { 3, };
1719
1720  /* PCM */
1721 -static int mt7981_pcm_pins[] = { 9, 10, 11, 12, 13, 25 };
1722 -static int mt7981_pcm_funcs[] = { 4, 4, 4, 4, 4, 4, };
1723 +static const int mt7981_pcm_pins[] = { 9, 10, 11, 12, 13, 25 };
1724 +static const int mt7981_pcm_funcs[] = { 4, 4, 4, 4, 4, 4, };
1725
1726  /* UDI */
1727 -static int mt7981_udi_pins[] = { 9, 10, 11, 12, 13, };
1728 -static int mt7981_udi_funcs[] = { 6, 6, 6, 6, 6, };
1729 +static const int mt7981_udi_pins[] = { 9, 10, 11, 12, 13, };
1730 +static const int mt7981_udi_funcs[] = { 6, 6, 6, 6, 6, };
1731
1732  /* DRV_VBUS */
1733 -static int mt7981_drv_vbus_pins[] = { 14, };
1734 -static int mt7981_drv_vbus_funcs[] = { 1, };
1735 +static const int mt7981_drv_vbus_pins[] = { 14, };
1736 +static const int mt7981_drv_vbus_funcs[] = { 1, };
1737
1738  /* EMMC */
1739 -static int mt7981_emmc_45_pins[] = { 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, };
1740 -static int mt7981_emmc_45_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
1741 +static const int mt7981_emmc_45_pins[] = {
1742 +       15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, };
1743 +static const int mt7981_emmc_45_funcs[] = {
1744 +       2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
1745
1746  /* SNFI */
1747 -static int mt7981_snfi_pins[] = { 16, 17, 18, 19, 20, 21, };
1748 -static int mt7981_snfi_funcs[] = { 3, 3, 3, 3, 3, 3, };
1749 +static const int mt7981_snfi_pins[] = { 16, 17, 18, 19, 20, 21, };
1750 +static const int mt7981_snfi_funcs[] = { 3, 3, 3, 3, 3, 3, };
1751
1752  /* SPI0 */
1753 -static int mt7981_spi0_pins[] = { 16, 17, 18, 19, };
1754 -static int mt7981_spi0_funcs[] = { 1, 1, 1, 1, };
1755 +static const int mt7981_spi0_pins[] = { 16, 17, 18, 19, };
1756 +static const int mt7981_spi0_funcs[] = { 1, 1, 1, 1, };
1757
1758  /* SPI0 */
1759 -static int mt7981_spi0_wp_hold_pins[] = { 20, 21, };
1760 -static int mt7981_spi0_wp_hold_funcs[] = { 1, 1, };
1761 +static const int mt7981_spi0_wp_hold_pins[] = { 20, 21, };
1762 +static const int mt7981_spi0_wp_hold_funcs[] = { 1, 1, };
1763
1764  /* SPI1 */
1765 -static int mt7981_spi1_1_pins[] = { 22, 23, 24, 25, };
1766 -static int mt7981_spi1_1_funcs[] = { 1, 1, 1, 1, };
1767 +static const int mt7981_spi1_1_pins[] = { 22, 23, 24, 25, };
1768 +static const int mt7981_spi1_1_funcs[] = { 1, 1, 1, 1, };
1769
1770  /* SPI2 */
1771 -static int mt7981_spi2_pins[] = { 26, 27, 28, 29, };
1772 -static int mt7981_spi2_funcs[] = { 1, 1, 1, 1, };
1773 +static const int mt7981_spi2_pins[] = { 26, 27, 28, 29, };
1774 +static const int mt7981_spi2_funcs[] = { 1, 1, 1, 1, };
1775
1776  /* SPI2 */
1777 -static int mt7981_spi2_wp_hold_pins[] = { 30, 31, };
1778 -static int mt7981_spi2_wp_hold_funcs[] = { 1, 1, };
1779 +static const int mt7981_spi2_wp_hold_pins[] = { 30, 31, };
1780 +static const int mt7981_spi2_wp_hold_funcs[] = { 1, 1, };
1781
1782  /* UART1 */
1783 -static int mt7981_uart1_0_pins[] = { 16, 17, 18, 19, };
1784 -static int mt7981_uart1_0_funcs[] = { 4, 4, 4, 4, };
1785 +static const int mt7981_uart1_0_pins[] = { 16, 17, 18, 19, };
1786 +static const int mt7981_uart1_0_funcs[] = { 4, 4, 4, 4, };
1787
1788 -static int mt7981_uart1_1_pins[] = { 26, 27, 28, 29, };
1789 -static int mt7981_uart1_1_funcs[] = { 2, 2, 2, 2, };
1790 +static const int mt7981_uart1_1_pins[] = { 26, 27, 28, 29, };
1791 +static const int mt7981_uart1_1_funcs[] = { 2, 2, 2, 2, };
1792
1793  /* UART2 */
1794 -static int mt7981_uart2_1_pins[] = { 22, 23, 24, 25, };
1795 -static int mt7981_uart2_1_funcs[] = { 3, 3, 3, 3, };
1796 +static const int mt7981_uart2_1_pins[] = { 22, 23, 24, 25, };
1797 +static const int mt7981_uart2_1_funcs[] = { 3, 3, 3, 3, };
1798
1799  /* UART0 */
1800 -static int mt7981_uart0_pins[] = { 32, 33, };
1801 -static int mt7981_uart0_funcs[] = { 1, 1, };
1802 +static const int mt7981_uart0_pins[] = { 32, 33, };
1803 +static const int mt7981_uart0_funcs[] = { 1, 1, };
1804
1805  /* PCIE_CLK_REQ */
1806 -static int mt7981_pcie_clk_pins[] = { 34, };
1807 -static int mt7981_pcie_clk_funcs[] = { 2, };
1808 +static const int mt7981_pcie_clk_pins[] = { 34, };
1809 +static const int mt7981_pcie_clk_funcs[] = { 2, };
1810
1811  /* PCIE_WAKE_N */
1812 -static int mt7981_pcie_wake_pins[] = { 35, };
1813 -static int mt7981_pcie_wake_funcs[] = { 2, };
1814 +static const int mt7981_pcie_wake_pins[] = { 35, };
1815 +static const int mt7981_pcie_wake_funcs[] = { 2, };
1816
1817  /* MDC_MDIO */
1818 -static int mt7981_smi_mdc_mdio_pins[] = { 36, 37, };
1819 -static int mt7981_smi_mdc_mdio_funcs[] = { 1, 1, };
1820 +static const int mt7981_smi_mdc_mdio_pins[] = { 36, 37, };
1821 +static const int mt7981_smi_mdc_mdio_funcs[] = { 1, 1, };
1822
1823 -static int mt7981_gbe_ext_mdc_mdio_pins[] = { 36, 37, };
1824 -static int mt7981_gbe_ext_mdc_mdio_funcs[] = { 3, 3, };
1825 +static const int mt7981_gbe_ext_mdc_mdio_pins[] = { 36, 37, };
1826 +static const int mt7981_gbe_ext_mdc_mdio_funcs[] = { 3, 3, };
1827
1828  /* WF0_MODE1 */
1829 -static int mt7981_wf0_mode1_pins[] = { 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
1830 -                                      50, 51, 52, 53, 54, 55, 56 };
1831 -static int mt7981_wf0_mode1_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1832 -                                       1, 1, 1, 1 };
1833 +static const int mt7981_wf0_mode1_pins[] = {
1834 +       40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56 };
1835 +static const int mt7981_wf0_mode1_funcs[] = {
1836 +       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
1837
1838  /* WF0_MODE3 */
1839 -static int mt7981_wf0_mode3_pins[] = { 45, 46, 47, 48, 49, 51 };
1840 -static int mt7981_wf0_mode3_funcs[] = { 2, 2, 2, 2, 2, 2 };
1841 +static const int mt7981_wf0_mode3_pins[] = { 45, 46, 47, 48, 49, 51 };
1842 +static const int mt7981_wf0_mode3_funcs[] = { 2, 2, 2, 2, 2, 2 };
1843
1844  /* WF2G_LED */
1845 -static int mt7981_wf2g_led0_pins[] = { 30, };
1846 -static int mt7981_wf2g_led0_funcs[] = { 2, };
1847 +static const int mt7981_wf2g_led0_pins[] = { 30, };
1848 +static const int mt7981_wf2g_led0_funcs[] = { 2, };
1849
1850 -static int mt7981_wf2g_led1_pins[] = { 34, };
1851 -static int mt7981_wf2g_led1_funcs[] = { 1, };
1852 +static const int mt7981_wf2g_led1_pins[] = { 34, };
1853 +static const int mt7981_wf2g_led1_funcs[] = { 1, };
1854
1855  /* WF5G_LED */
1856 -static int mt7981_wf5g_led0_pins[] = { 31, };
1857 -static int mt7981_wf5g_led0_funcs[] = { 2, };
1858 +static const int mt7981_wf5g_led0_pins[] = { 31, };
1859 +static const int mt7981_wf5g_led0_funcs[] = { 2, };
1860
1861 -static int mt7981_wf5g_led1_pins[] = { 35, };
1862 -static int mt7981_wf5g_led1_funcs[] = { 1, };
1863 +static const int mt7981_wf5g_led1_pins[] = { 35, };
1864 +static const int mt7981_wf5g_led1_funcs[] = { 1, };
1865
1866  /* MT7531_INT */
1867 -static int mt7981_mt7531_int_pins[] = { 38, };
1868 -static int mt7981_mt7531_int_funcs[] = { 1, };
1869 +static const int mt7981_mt7531_int_pins[] = { 38, };
1870 +static const int mt7981_mt7531_int_funcs[] = { 1, };
1871
1872  /* ANT_SEL */
1873 -static int mt7981_ant_sel_pins[] = { 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 34, 35 };
1874 -static int mt7981_ant_sel_funcs[] = { 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6 };
1875 +static const int mt7981_ant_sel_pins[] = {
1876 +       14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 34, 35 };
1877 +static const int mt7981_ant_sel_funcs[] = {
1878 +       6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6 };
1879
1880  static const struct mtk_group_desc mt7981_groups[] = {
1881         /* @GPIO(0,1): WA_AICE(2) */
1882 @@ -1012,7 +1016,7 @@ static const char *const mt7981_pinctrl_
1883         "iocfg_lb_base", "iocfg_bl_base", "iocfg_tm_base", "iocfg_tl_base",
1884  };
1885
1886 -static struct mtk_pinctrl_soc mt7981_data = {
1887 +static const struct mtk_pinctrl_soc mt7981_data = {
1888         .name = "mt7981_pinctrl",
1889         .reg_cal = mt7981_reg_cals,
1890         .pins = mt7981_pins,
1891 --- a/drivers/pinctrl/mediatek/pinctrl-mt7986.c
1892 +++ b/drivers/pinctrl/mediatek/pinctrl-mt7986.c
1893 @@ -554,114 +554,117 @@ static const struct mtk_io_type_desc mt7
1894   * The hardware probably has multiple combinations of these pinouts.
1895   */
1896
1897 -static int mt7986_watchdog_pins[] = { 0, };
1898 -static int mt7986_watchdog_funcs[] = { 1, };
1899 +static const int mt7986_watchdog_pins[] = { 0, };
1900 +static const int mt7986_watchdog_funcs[] = { 1, };
1901
1902 -static int mt7986_wifi_led_pins[] = { 1, 2, };
1903 -static int mt7986_wifi_led_funcs[] = { 1, 1, };
1904 +static const int mt7986_wifi_led_pins[] = { 1, 2, };
1905 +static const int mt7986_wifi_led_funcs[] = { 1, 1, };
1906
1907 -static int mt7986_i2c_pins[] = { 3, 4, };
1908 -static int mt7986_i2c_funcs[] = { 1, 1, };
1909 +static const int mt7986_i2c_pins[] = { 3, 4, };
1910 +static const int mt7986_i2c_funcs[] = { 1, 1, };
1911
1912 -static int mt7986_uart1_0_pins[] = { 7, 8, 9, 10, };
1913 -static int mt7986_uart1_0_funcs[] = { 3, 3, 3, 3, };
1914 +static const int mt7986_uart1_0_pins[] = { 7, 8, 9, 10, };
1915 +static const int mt7986_uart1_0_funcs[] = { 3, 3, 3, 3, };
1916
1917 -static int mt7986_spi1_0_pins[] = { 11, 12, 13, 14, };
1918 -static int mt7986_spi1_0_funcs[] = { 3, 3, 3, 3, };
1919 +static const int mt7986_spi1_0_pins[] = { 11, 12, 13, 14, };
1920 +static const int mt7986_spi1_0_funcs[] = { 3, 3, 3, 3, };
1921
1922 -static int mt7986_pwm1_1_pins[] = { 20, };
1923 -static int mt7986_pwm1_1_funcs[] = { 2, };
1924 +static const int mt7986_pwm1_1_pins[] = { 20, };
1925 +static const int mt7986_pwm1_1_funcs[] = { 2, };
1926
1927 -static int mt7986_pwm0_pins[] = { 21, };
1928 -static int mt7986_pwm0_funcs[] = { 1, };
1929 +static const int mt7986_pwm0_pins[] = { 21, };
1930 +static const int mt7986_pwm0_funcs[] = { 1, };
1931
1932 -static int mt7986_pwm1_0_pins[] = { 22, };
1933 -static int mt7986_pwm1_0_funcs[] = { 1, };
1934 +static const int mt7986_pwm1_0_pins[] = { 22, };
1935 +static const int mt7986_pwm1_0_funcs[] = { 1, };
1936
1937 -static int mt7986_emmc_45_pins[] = {
1938 +static const int mt7986_emmc_45_pins[] = {
1939         22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, };
1940 -static int mt7986_emmc_45_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
1941 +static const int mt7986_emmc_45_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
1942
1943 -static int mt7986_snfi_pins[] = { 23, 24, 25, 26, 27, 28, };
1944 -static int mt7986_snfi_funcs[] = { 1, 1, 1, 1, 1, 1, };
1945 +static const int mt7986_snfi_pins[] = { 23, 24, 25, 26, 27, 28, };
1946 +static const int mt7986_snfi_funcs[] = { 1, 1, 1, 1, 1, 1, };
1947
1948 -static int mt7986_spi1_1_pins[] = { 23, 24, 25, 26, };
1949 -static int mt7986_spi1_1_funcs[] = { 3, 3, 3, 3, };
1950 +static const int mt7986_spi1_1_pins[] = { 23, 24, 25, 26, };
1951 +static const int mt7986_spi1_1_funcs[] = { 3, 3, 3, 3, };
1952
1953 -static int mt7986_uart1_1_pins[] = { 23, 24, 25, 26, };
1954 -static int mt7986_uart1_1_funcs[] = { 4, 4, 4, 4, };
1955 +static const int mt7986_uart1_1_pins[] = { 23, 24, 25, 26, };
1956 +static const int mt7986_uart1_1_funcs[] = { 4, 4, 4, 4, };
1957
1958 -static int mt7986_spi1_2_pins[] = { 29, 30, 31, 32, };
1959 -static int mt7986_spi1_2_funcs[] = { 1, 1, 1, 1, };
1960 +static const int mt7986_spi1_2_pins[] = { 29, 30, 31, 32, };
1961 +static const int mt7986_spi1_2_funcs[] = { 1, 1, 1, 1, };
1962
1963 -static int mt7986_uart1_2_pins[] = { 29, 30, 31, 32, };
1964 -static int mt7986_uart1_2_funcs[] = { 3, 3, 3, 3, };
1965 +static const int mt7986_uart1_2_pins[] = { 29, 30, 31, 32, };
1966 +static const int mt7986_uart1_2_funcs[] = { 3, 3, 3, 3, };
1967
1968 -static int mt7986_uart2_0_pins[] = { 29, 30, 31, 32, };
1969 -static int mt7986_uart2_0_funcs[] = { 4, 4, 4, 4, };
1970 +static const int mt7986_uart2_0_pins[] = { 29, 30, 31, 32, };
1971 +static const int mt7986_uart2_0_funcs[] = { 4, 4, 4, 4, };
1972
1973 -static int mt7986_spi0_pins[] = { 33, 34, 35, 36, };
1974 -static int mt7986_spi0_funcs[] = { 1, 1, 1, 1, };
1975 +static const int mt7986_spi0_pins[] = { 33, 34, 35, 36, };
1976 +static const int mt7986_spi0_funcs[] = { 1, 1, 1, 1, };
1977
1978 -static int mt7986_spi0_wp_hold_pins[] = { 37, 38, };
1979 -static int mt7986_spi0_wp_hold_funcs[] = { 1, 1, };
1980 +static const int mt7986_spi0_wp_hold_pins[] = { 37, 38, };
1981 +static const int mt7986_spi0_wp_hold_funcs[] = { 1, 1, };
1982
1983 -static int mt7986_uart2_1_pins[] = { 33, 34, 35, 36, };
1984 -static int mt7986_uart2_1_funcs[] = { 3, 3, 3, 3, };
1985 +static const int mt7986_uart2_1_pins[] = { 33, 34, 35, 36, };
1986 +static const int mt7986_uart2_1_funcs[] = { 3, 3, 3, 3, };
1987
1988 -static int mt7986_uart1_3_rx_tx_pins[] = { 35, 36, };
1989 -static int mt7986_uart1_3_rx_tx_funcs[] = { 2, 2, };
1990 +static const int mt7986_uart1_3_rx_tx_pins[] = { 35, 36, };
1991 +static const int mt7986_uart1_3_rx_tx_funcs[] = { 2, 2, };
1992
1993 -static int mt7986_uart1_3_cts_rts_pins[] = { 37, 38, };
1994 -static int mt7986_uart1_3_cts_rts_funcs[] = { 2, 2, };
1995 +static const int mt7986_uart1_3_cts_rts_pins[] = { 37, 38, };
1996 +static const int mt7986_uart1_3_cts_rts_funcs[] = { 2, 2, };
1997
1998 -static int mt7986_spi1_3_pins[] = { 33, 34, 35, 36, };
1999 -static int mt7986_spi1_3_funcs[] = { 4, 4, 4, 4, };
2000 +static const int mt7986_spi1_3_pins[] = { 33, 34, 35, 36, };
2001 +static const int mt7986_spi1_3_funcs[] = { 4, 4, 4, 4, };
2002
2003 -static int mt7986_uart0_pins[] = { 39, 40, };
2004 -static int mt7986_uart0_funcs[] = { 1, 1, };
2005 +static const int mt7986_uart0_pins[] = { 39, 40, };
2006 +static const int mt7986_uart0_funcs[] = { 1, 1, };
2007
2008 -static int mt7986_pcie_reset_pins[] = { 41, };
2009 -static int mt7986_pcie_reset_funcs[] = { 1, };
2010 +static const int mt7986_pcie_reset_pins[] = { 41, };
2011 +static const int mt7986_pcie_reset_funcs[] = { 1, };
2012
2013 -static int mt7986_uart1_pins[] = { 42, 43, 44, 45, };
2014 -static int mt7986_uart1_funcs[] = { 1, 1, 1, 1, };
2015 +static const int mt7986_uart1_pins[] = { 42, 43, 44, 45, };
2016 +static const int mt7986_uart1_funcs[] = { 1, 1, 1, 1, };
2017
2018 -static int mt7986_uart2_pins[] = { 46, 47, 48, 49, };
2019 -static int mt7986_uart2_funcs[] = { 1, 1, 1, 1, };
2020 +static const int mt7986_uart2_pins[] = { 46, 47, 48, 49, };
2021 +static const int mt7986_uart2_funcs[] = { 1, 1, 1, 1, };
2022
2023 -static int mt7986_emmc_51_pins[] = {
2024 +static const int mt7986_emmc_51_pins[] = {
2025         50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, };
2026 -static int mt7986_emmc_51_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2027 +static const int mt7986_emmc_51_funcs[] = {
2028 +       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2029
2030 -static int mt7986_pcm_pins[] = { 62, 63, 64, 65, };
2031 -static int mt7986_pcm_funcs[] = { 1, 1, 1, 1, };
2032 +static const int mt7986_pcm_pins[] = { 62, 63, 64, 65, };
2033 +static const int mt7986_pcm_funcs[] = { 1, 1, 1, 1, };
2034
2035 -static int mt7986_i2s_pins[] = { 62, 63, 64, 65, };
2036 -static int mt7986_i2s_funcs[] = { 1, 1, 1, 1, };
2037 +static const int mt7986_i2s_pins[] = { 62, 63, 64, 65, };
2038 +static const int mt7986_i2s_funcs[] = { 1, 1, 1, 1, };
2039
2040 -static int mt7986_switch_int_pins[] = { 66, };
2041 -static int mt7986_switch_int_funcs[] = { 1, };
2042 +static const int mt7986_switch_int_pins[] = { 66, };
2043 +static const int mt7986_switch_int_funcs[] = { 1, };
2044
2045 -static int mt7986_mdc_mdio_pins[] = { 67, 68, };
2046 -static int mt7986_mdc_mdio_funcs[] = { 1, 1, };
2047 +static const int mt7986_mdc_mdio_pins[] = { 67, 68, };
2048 +static const int mt7986_mdc_mdio_funcs[] = { 1, 1, };
2049
2050 -static int mt7986_wf_2g_pins[] = {74, 75, 76, 77, 78, 79, 80, 81, 82, 83, };
2051 -static int mt7986_wf_2g_funcs[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2052 +static const int mt7986_wf_2g_pins[] = {
2053 +       74, 75, 76, 77, 78, 79, 80, 81, 82, 83, };
2054 +static const int mt7986_wf_2g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2055
2056 -static int mt7986_wf_5g_pins[] = {91, 92, 93, 94, 95, 96, 97, 98, 99, 100, };
2057 -static int mt7986_wf_5g_funcs[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2058 +static const int mt7986_wf_5g_pins[] = {
2059 +       91, 92, 93, 94, 95, 96, 97, 98, 99, 100, };
2060 +static const int mt7986_wf_5g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2061
2062 -static int mt7986_wf_dbdc_pins[] = {
2063 +static const int mt7986_wf_dbdc_pins[] = {
2064         74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, };
2065 -static int mt7986_wf_dbdc_funcs[] = {
2066 +static const int mt7986_wf_dbdc_funcs[] = {
2067         2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, };
2068
2069 -static int mt7986_pcie_clk_pins[] = { 9, };
2070 -static int mt7986_pcie_clk_funcs[] = { 1, };
2071 +static const int mt7986_pcie_clk_pins[] = { 9, };
2072 +static const int mt7986_pcie_clk_funcs[] = { 1, };
2073
2074 -static int mt7986_pcie_wake_pins[] = { 10, };
2075 -static int mt7986_pcie_wake_funcs[] = { 1, };
2076 +static const int mt7986_pcie_wake_pins[] = { 10, };
2077 +static const int mt7986_pcie_wake_funcs[] = { 1, };
2078
2079  static const struct mtk_group_desc mt7986_groups[] = {
2080         PINCTRL_PIN_GROUP("watchdog", mt7986_watchdog),
2081 @@ -738,7 +741,7 @@ static const struct mtk_function_desc mt
2082         {"wifi", mt7986_wf_groups, ARRAY_SIZE(mt7986_wf_groups)},
2083  };
2084
2085 -static struct mtk_pinctrl_soc mt7986_data = {
2086 +static const struct mtk_pinctrl_soc mt7986_data = {
2087         .name = "mt7986_pinctrl",
2088         .reg_cal = mt7986_reg_cals,
2089         .pins = mt7986_pins,
2090 --- a/drivers/pinctrl/mediatek/pinctrl-mt8512.c
2091 +++ b/drivers/pinctrl/mediatek/pinctrl-mt8512.c
2092 @@ -315,12 +315,12 @@ static const struct mtk_pin_desc mt8512_
2093   */
2094
2095  /* UART */
2096 -static int mt8512_uart0_0_rxd_txd_pins[]               = { 52, 53, };
2097 -static int mt8512_uart0_0_rxd_txd_funcs[]              = {  1,  1, };
2098 -static int mt8512_uart1_0_rxd_txd_pins[]               = { 54, 55, };
2099 -static int mt8512_uart1_0_rxd_txd_funcs[]              = {  1,  1, };
2100 -static int mt8512_uart2_0_rxd_txd_pins[]               = { 28, 29, };
2101 -static int mt8512_uart2_0_rxd_txd_funcs[]              = {  1,  1, };
2102 +static const int mt8512_uart0_0_rxd_txd_pins[]         = { 52, 53, };
2103 +static const int mt8512_uart0_0_rxd_txd_funcs[]                = {  1,  1, };
2104 +static const int mt8512_uart1_0_rxd_txd_pins[]         = { 54, 55, };
2105 +static const int mt8512_uart1_0_rxd_txd_funcs[]                = {  1,  1, };
2106 +static const int mt8512_uart2_0_rxd_txd_pins[]         = { 28, 29, };
2107 +static const int mt8512_uart2_0_rxd_txd_funcs[]                = {  1,  1, };
2108
2109  /* Joint those groups owning the same capability in user point of view which
2110   * allows that people tend to use through the device tree.
2111 @@ -330,13 +330,13 @@ static const char *const mt8512_uart_gro
2112                                                 "uart2_0_rxd_txd", };
2113
2114  /* SNAND */
2115 -static int mt8512_snfi_pins[] = { 71, 76, 77, 78, 79, 80, };
2116 -static int mt8512_snfi_funcs[] = { 3, 3, 3, 3, 3, 3, };
2117 +static const int mt8512_snfi_pins[] = { 71, 76, 77, 78, 79, 80, };
2118 +static const int mt8512_snfi_funcs[] = { 3, 3, 3, 3, 3, 3, };
2119
2120  /* MMC0 */
2121 -static int mt8512_msdc0_pins[] = { 76, 77, 78, 79, 80, 81, 82, 83, 84,
2122 -                                  85, 86, };
2123 -static int mt8512_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2124 +static const int mt8512_msdc0_pins[] = { 76, 77, 78, 79, 80, 81, 82, 83, 84,
2125 +                                        85, 86, };
2126 +static const int mt8512_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2127
2128  static const struct mtk_group_desc mt8512_groups[] = {
2129         PINCTRL_PIN_GROUP("uart0_0_rxd_txd", mt8512_uart0_0_rxd_txd),
2130 @@ -356,7 +356,7 @@ static const struct mtk_function_desc mt
2131         {"snand", mt8512_msdc_groups, ARRAY_SIZE(mt8512_msdc_groups)},
2132  };
2133
2134 -static struct mtk_pinctrl_soc mt8512_data = {
2135 +static const struct mtk_pinctrl_soc mt8512_data = {
2136         .name = "mt8512_pinctrl",
2137         .reg_cal = mt8512_reg_cals,
2138         .pins = mt8512_pins,
2139 --- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c
2140 +++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c
2141 @@ -326,12 +326,12 @@ static const struct mtk_pin_desc mt8516_
2142   */
2143
2144  /* UART */
2145 -static int mt8516_uart0_0_rxd_txd_pins[]               = { 62, 63, };
2146 -static int mt8516_uart0_0_rxd_txd_funcs[]              = {  1,  1, };
2147 -static int mt8516_uart1_0_rxd_txd_pins[]               = { 64, 65, };
2148 -static int mt8516_uart1_0_rxd_txd_funcs[]              = {  1,  1, };
2149 -static int mt8516_uart2_0_rxd_txd_pins[]               = { 34, 35, };
2150 -static int mt8516_uart2_0_rxd_txd_funcs[]              = {  1,  1, };
2151 +static const int mt8516_uart0_0_rxd_txd_pins[]         = { 62, 63, };
2152 +static const int mt8516_uart0_0_rxd_txd_funcs[]                = {  1,  1, };
2153 +static const int mt8516_uart1_0_rxd_txd_pins[]         = { 64, 65, };
2154 +static const int mt8516_uart1_0_rxd_txd_funcs[]                = {  1,  1, };
2155 +static const int mt8516_uart2_0_rxd_txd_pins[]         = { 34, 35, };
2156 +static const int mt8516_uart2_0_rxd_txd_funcs[]                = {  1,  1, };
2157
2158  /* Joint those groups owning the same capability in user point of view which
2159   * allows that people tend to use through the device tree.
2160 @@ -341,9 +341,9 @@ static const char *const mt8516_uart_gro
2161                                                 "uart2_0_rxd_txd", };
2162
2163  /* MMC0 */
2164 -static int mt8516_msdc0_pins[] = { 110, 111, 112, 113, 114, 115, 116, 117, 118,
2165 -                                  119, 120, };
2166 -static int mt8516_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2167 +static const int mt8516_msdc0_pins[] = { 110, 111, 112, 113, 114, 115, 116, 117,
2168 +                                        118, 119, 120, };
2169 +static const int mt8516_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2170
2171  static const struct mtk_group_desc mt8516_groups[] = {
2172         PINCTRL_PIN_GROUP("uart0_0_rxd_txd", mt8516_uart0_0_rxd_txd),
2173 --- a/drivers/pinctrl/mediatek/pinctrl-mt8518.c
2174 +++ b/drivers/pinctrl/mediatek/pinctrl-mt8518.c
2175 @@ -346,12 +346,12 @@ static const struct mtk_pin_desc mt8518_
2176   */
2177
2178  /* UART */
2179 -static int mt8518_uart0_0_rxd_txd_pins[]               = { 104, 105, };
2180 -static int mt8518_uart0_0_rxd_txd_funcs[]              = {  1,  1, };
2181 -static int mt8518_uart1_0_rxd_txd_pins[]               = { 52, 53, };
2182 -static int mt8518_uart1_0_rxd_txd_funcs[]              = {  1,  1, };
2183 -static int mt8518_uart2_0_rxd_txd_pins[]               = { 106, 107, };
2184 -static int mt8518_uart2_0_rxd_txd_funcs[]              = {  1,  1, };
2185 +static const int mt8518_uart0_0_rxd_txd_pins[]         = { 104, 105, };
2186 +static const int mt8518_uart0_0_rxd_txd_funcs[]                = {  1,  1, };
2187 +static const int mt8518_uart1_0_rxd_txd_pins[]         = { 52, 53, };
2188 +static const int mt8518_uart1_0_rxd_txd_funcs[]                = {  1,  1, };
2189 +static const int mt8518_uart2_0_rxd_txd_pins[]         = { 106, 107, };
2190 +static const int mt8518_uart2_0_rxd_txd_funcs[]                = {  1,  1, };
2191
2192  /* Joint those groups owning the same capability in user point of view which
2193   * allows that people tend to use through the device tree.
2194 @@ -361,9 +361,9 @@ static const char *const mt8518_uart_gro
2195                                                 "uart2_0_rxd_txd", };
2196
2197  /* MMC0 */
2198 -static int mt8518_msdc0_pins[] = { 3, 4, 5, 6, 7, 8, 9, 10, 11,
2199 -                                  12, 13, };
2200 -static int mt8518_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2201 +static const int mt8518_msdc0_pins[] = { 3, 4, 5, 6, 7, 8, 9, 10, 11,
2202 +                                        12, 13, };
2203 +static const int mt8518_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };
2204
2205  static const struct mtk_group_desc mt8518_groups[] = {
2206         PINCTRL_PIN_GROUP("uart0_0_rxd_txd", mt8518_uart0_0_rxd_txd),
2207 @@ -380,7 +380,7 @@ static const struct mtk_function_desc mt
2208         {"msdc", mt8518_msdc_groups, ARRAY_SIZE(mt8518_msdc_groups)},
2209  };
2210
2211 -static struct mtk_pinctrl_soc mt8518_data = {
2212 +static const struct mtk_pinctrl_soc mt8518_data = {
2213         .name = "mt8518_pinctrl",
2214         .reg_cal = mt8518_reg_cals,
2215         .pins = mt8518_pins,
2216 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
2217 +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
2218 @@ -314,7 +314,7 @@ static int mtk_pinmux_group_set(struct u
2219         int i;
2220
2221         for (i = 0; i < grp->num_pins; i++) {
2222 -               int *pin_modes = grp->data;
2223 +               const int *pin_modes = grp->data;
2224
2225                 mtk_hw_set_value(dev, grp->pins[i], PINCTRL_PIN_REG_MODE,
2226                                  pin_modes[i]);
2227 @@ -769,7 +769,7 @@ static int mtk_gpiochip_register(struct
2228  #endif
2229
2230  int mtk_pinctrl_common_probe(struct udevice *dev,
2231 -                            struct mtk_pinctrl_soc *soc)
2232 +                            const struct mtk_pinctrl_soc *soc)
2233  {
2234         struct mtk_pinctrl_priv *priv = dev_get_priv(dev);
2235         int ret = 0;
2236 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
2237 +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
2238 @@ -174,9 +174,9 @@ struct mtk_pin_desc {
2239   */
2240  struct mtk_group_desc {
2241         const char *name;
2242 -       int *pins;
2243 +       const int *pins;
2244         int num_pins;
2245 -       void *data;
2246 +       const void *data;
2247  };
2248
2249  /**
2250 @@ -233,7 +233,7 @@ struct mtk_pinctrl_soc {
2251   */
2252  struct mtk_pinctrl_priv {
2253         void __iomem *base[MAX_BASE_CALC];
2254 -       struct mtk_pinctrl_soc *soc;
2255 +       const struct mtk_pinctrl_soc *soc;
2256  };
2257
2258  extern const struct pinctrl_ops mtk_pinctrl_ops;
2259 @@ -242,7 +242,7 @@ extern const struct pinctrl_ops mtk_pinc
2260  void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set);
2261  void mtk_i_rmw(struct udevice *dev, u8 i, u32 reg, u32 mask, u32 set);
2262  int mtk_pinctrl_common_probe(struct udevice *dev,
2263 -                            struct mtk_pinctrl_soc *soc);
2264 +                            const struct mtk_pinctrl_soc *soc);
2265
2266  #if CONFIG_IS_ENABLED(PINCONF)
2267