SUBTARGETS:=generic
KERNEL_PATCHVER:=5.15
+KERNEL_TESTING_PATCHVER:=6.1
define Target/Description
Build firmware images for Broadcom based BCM47xx/53xx routers with ARM CPU, *not* MIPS.
--- /dev/null
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_BCM=y
+CONFIG_ARCH_BCM_5301X=y
+CONFIG_ARCH_BCM_53573=y
+# CONFIG_ARCH_BCM_HR2 is not set
+CONFIG_ARCH_BCM_IPROC=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MULTIPLATFORM=y
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARM=y
+CONFIG_ARM_AMBA=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+# CONFIG_ARM_ATAG_DTB_COMPAT is not set
+CONFIG_ARM_CRYPTO=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_ARM_ERRATA_764369=y
+CONFIG_ARM_ERRATA_775420=y
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GLOBAL_TIMER=y
+CONFIG_ARM_GT_INITIAL_PRESCALER_VAL=1
+CONFIG_ARM_HAS_SG_CHAIN=y
+CONFIG_ARM_HEAVY_MB=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_ARM_PATCH_IDIV=y
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_UNWIND=y
+CONFIG_ARM_VIRT_EXT=y
+CONFIG_ATAGS=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_B53=y
+CONFIG_B53_MDIO_DRIVER=y
+CONFIG_B53_SRAB_DRIVER=y
+CONFIG_BCM47XX_NVRAM=y
+CONFIG_BCM47XX_SPROM=y
+CONFIG_BCM47XX_WDT=y
+CONFIG_BCMA=y
+CONFIG_BCMA_BLOCKIO=y
+CONFIG_BCMA_DEBUG=y
+CONFIG_BCMA_DRIVER_GMAC_CMN=y
+CONFIG_BCMA_DRIVER_GPIO=y
+CONFIG_BCMA_DRIVER_PCI=y
+CONFIG_BCMA_FALLBACK_SPROM=y
+CONFIG_BCMA_HOST_PCI=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+CONFIG_BCMA_HOST_SOC=y
+CONFIG_BCMA_SFLASH=y
+# CONFIG_BCM_CYGNUS_PHY is not set
+CONFIG_BCM_NET_PHYLIB=y
+CONFIG_BCM_NS_THERMAL=y
+CONFIG_BCM_SR_THERMAL=y
+CONFIG_BGMAC=y
+CONFIG_BGMAC_BCMA=y
+# CONFIG_BGMAC_PLATFORM is not set
+CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BOUNCE=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_CACHE_L2X0=y
+CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
+CONFIG_CLKSRC_MMIO=y
+# CONFIG_CLK_BCM_NS2 is not set
+CONFIG_CLK_BCM_NSP=y
+# CONFIG_CLK_BCM_SR is not set
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMMON_CLK_IPROC=y
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_RMAP=y
+CONFIG_CPU_SPECTRE=y
+CONFIG_CPU_THUMB_CAPABLE=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_HASH_INFO=y
+CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_ZSTD=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_BCM_5301X=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
+CONFIG_DEBUG_MISC=y
+CONFIG_DEBUG_UART_8250=y
+CONFIG_DEBUG_UART_8250_SHIFT=0
+CONFIG_DEBUG_UART_PHYS=0x18000300
+CONFIG_DEBUG_UART_VIRT=0xf1000300
+CONFIG_DEBUG_UNCOMPRESS=y
+CONFIG_DEBUG_USER=y
+CONFIG_DMA_OPS=y
+CONFIG_DMA_REMAP=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_EDAC_SUPPORT=y
+CONFIG_EXTCON=y
+CONFIG_FIXED_PHY=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_FWNODE_MDIO=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ARCH_TOPOLOGY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_CPU_VULNERABILITIES=y
+CONFIG_GENERIC_EARLY_IOREMAP=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_GENERIC_PINCTRL_GROUPS=y
+CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_VDSO_32=y
+CONFIG_GPIOLIB_IRQCHIP=y
+CONFIG_GPIO_74X164=y
+CONFIG_GPIO_BCM_XGS_IPROC=y
+CONFIG_GPIO_CDEV=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GRO_CELLS=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HARDEN_BRANCH_PREDICTOR=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAVE_SMP=y
+CONFIG_HIGHMEM=y
+CONFIG_HIGHPTE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_BCM2835=y
+CONFIG_HZ_FIXED=0
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_KMAP_LOCAL=y
+CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
+# CONFIG_LEDS_BCM63138 is not set
+CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_MDIO_BCM_IPROC=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_BUS_MUX=y
+# CONFIG_MDIO_BUS_MUX_BCM_IPROC is not set
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_DEVRES=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+CONFIG_MIGRATION=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MTD_BCM47XXSFLASH=y
+CONFIG_MTD_BCM47XX_PARTS=y
+CONFIG_MTD_NAND_BRCMNAND=y
+CONFIG_MTD_NAND_BRCMNAND_IPROC=y
+CONFIG_MTD_NAND_CORE=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+CONFIG_MTD_OF_PARTS_LINKSYS_NS=y
+CONFIG_MTD_PARSER_TPLINK_SAFELOADER=y
+CONFIG_MTD_PARSER_TRX=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPLIT_SEAMA_FW=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_TAG_BRCM=y
+CONFIG_NET_DSA_TAG_BRCM_COMMON=y
+CONFIG_NET_DSA_TAG_BRCM_LEGACY=y
+CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_SELFTESTS=y
+CONFIG_NET_SWITCHDEV=y
+CONFIG_NR_CPUS=2
+CONFIG_NVMEM=y
+CONFIG_NVMEM_BRCM_NVRAM=y
+CONFIG_NVMEM_SYSFS=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_PADATA=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PCI=y
+CONFIG_PCIE_IPROC=y
+CONFIG_PCIE_IPROC_BCMA=y
+# CONFIG_PCIE_IPROC_PLATFORM is not set
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
+# CONFIG_PHY_BCM_NS_USB2 is not set
+# CONFIG_PHY_BCM_NS_USB3 is not set
+# CONFIG_PHY_BCM_SR_PCIE is not set
+CONFIG_PHY_BCM_SR_USB=y
+# CONFIG_PHY_BRCM_SATA is not set
+# CONFIG_PHY_NS2_USB_DRD is not set
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_IPROC_GPIO is not set
+CONFIG_PINCTRL_NS=y
+# CONFIG_PINCTRL_NS2_MUX is not set
+CONFIG_PTP_1588_CLOCK_OPTIONAL=y
+CONFIG_PWM=y
+CONFIG_PWM_BCM_IPROC=y
+CONFIG_PWM_SYSFS=y
+CONFIG_RATIONAL=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SGL_ALLOC=y
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
+CONFIG_SOCK_RX_QUEUE_MAPPING=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPI=y
+CONFIG_SPI_BCM_QSPI=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
+CONFIG_SRCU=y
+CONFIG_SWPHY=y
+CONFIG_SWP_EMULATE=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_OF=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
+CONFIG_UBIFS_FS=y
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_UNWINDER_ARM=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_OF=y
+# CONFIG_VFP is not set
+CONFIG_WATCHDOG_CORE=y
+CONFIG_XPS=y
+CONFIG_XXHASH=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZSTD_COMPRESS=y
+CONFIG_ZSTD_DECOMPRESS=y
--- /dev/null
+From c8ee9f119bfb4244f76c9971c341ec06b49332cd Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 8 Nov 2022 12:07:08 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Correct description of TP-Link partitions
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+TP-Link routers have flash space partitioned according to the partitions
+table. It may look like fixed partitioning but those partitions can be
+actually reorganized. New can be added (or some removed), offsets and
+sizes may change.
+
+Fix DT to use binding for the TP-Link SafeLoader partitioning method.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Link: https://lore.kernel.org/r/20221108110708.13693-1-zajec5@gmail.com
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../boot/dts/bcm47081-tplink-archer-c5-v2.dts | 25 ++++---------------
+ .../boot/dts/bcm4709-tplink-archer-c9-v1.dts | 25 ++++---------------
+ 2 files changed, 10 insertions(+), 40 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
++++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
+@@ -95,30 +95,15 @@
+ status = "okay";
+
+ partitions {
+- compatible = "fixed-partitions";
+- #address-cells = <1>;
+- #size-cells = <1>;
++ compatible = "tplink,safeloader-partitions";
++ partitions-table-offset = <0xe50000>;
+
+- boot@0 {
+- label = "boot";
+- reg = <0x000000 0x040000>;
+- read-only;
+- };
+-
+- os-image@100000 {
+- label = "os-image";
+- reg = <0x040000 0x200000>;
++ partition-os-image {
+ compatible = "brcm,trx";
+ };
+
+- rootfs@240000 {
+- label = "rootfs";
+- reg = <0x240000 0xc00000>;
+- };
+-
+- nvram@ff0000 {
+- label = "nvram";
+- reg = <0xff0000 0x010000>;
++ partition-file-system {
++ linux,rootfs;
+ };
+ };
+ };
+--- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
++++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
+@@ -104,30 +104,15 @@
+ status = "okay";
+
+ partitions {
+- compatible = "fixed-partitions";
+- #address-cells = <1>;
+- #size-cells = <1>;
++ compatible = "tplink,safeloader-partitions";
++ partitions-table-offset = <0xe50000>;
+
+- boot@0 {
+- label = "boot";
+- reg = <0x000000 0x040000>;
+- read-only;
+- };
+-
+- os-image@100000 {
+- label = "os-image";
+- reg = <0x040000 0x200000>;
++ partition-os-image {
+ compatible = "brcm,trx";
+ };
+
+- rootfs@240000 {
+- label = "rootfs";
+- reg = <0x240000 0xc00000>;
+- };
+-
+- nvram@ff0000 {
+- label = "nvram";
+- reg = <0xff0000 0x010000>;
++ partition-file-system {
++ linux,rootfs;
+ };
+ };
+ };
--- /dev/null
+From b1ba87897ceda8e49a47aa92832dd7bff8583e21 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Mon, 7 Nov 2022 14:41:04 +0100
+Subject: [PATCH] ARM: dts: bcm47094: Add devicetree for D-Link DIR-890L
+
+This adds a device tree for the D-Link DIR-890L. This device
+is very similar to D-Link DIR-885L, the differences are detailed
+as a comment in the DTS file.
+
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Link: https://lore.kernel.org/r/20221107134104.1422169-2-linus.walleij@linaro.org
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts | 211 ++++++++++++++++++
+ 2 files changed, 212 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
+ bcm4709-tplink-archer-c9-v1.dtb \
+ bcm47094-asus-rt-ac88u.dtb \
+ bcm47094-dlink-dir-885l.dtb \
++ bcm47094-dlink-dir-890l.dtb \
+ bcm47094-linksys-panamera.dtb \
+ bcm47094-luxul-abr-4500.dtb \
+ bcm47094-luxul-xap-1610.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts
+@@ -0,0 +1,211 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/*
++ * Device tree for D-Link DIR-890L
++ * D-Link calls this board "WRGAC36"
++ * this router has the same looks and form factor as D-Link DIR-885L.
++ *
++ * Some differences from DIR-885L include a separate USB2 port, separate LEDs
++ * for USB2 and USB3, a separate VCC supply for the USB2 slot and no
++ * router/extender switch is mounted (there is an empty mount point on the
++ * PCB) so this device is a pure router. Also the LAN ports are in the right
++ * order.
++ *
++ * Based on the device tree for DIR-885L
++ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
++ * Copyright (C) 2022 Linus Walleij
++ */
++
++/dts-v1/;
++
++#include "bcm47094.dtsi"
++#include "bcm5301x-nand-cs0-bch1.dtsi"
++
++/ {
++ compatible = "dlink,dir-890l", "brcm,bcm47094", "brcm,bcm4708";
++ model = "D-Link DIR-890L";
++
++ chosen {
++ bootargs = "console=ttyS0,115200 earlycon";
++ };
++
++ memory@0 {
++ device_type = "memory";
++ reg = <0x00000000 0x08000000>,
++ <0x88000000 0x08000000>;
++ };
++
++ leds {
++ /*
++ * LED information is derived from the boot log which
++ * conveniently lists all the LEDs.
++ */
++ compatible = "gpio-leds";
++
++ power-white {
++ label = "bcm53xx:white:power";
++ gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
++ linux,default-trigger = "default-on";
++ };
++
++ wan-white {
++ label = "bcm53xx:white:wan";
++ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
++ };
++
++ power-amber {
++ label = "bcm53xx:amber:power";
++ gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
++ };
++
++ wan-amber {
++ label = "bcm53xx:amber:wan";
++ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
++ };
++
++ usb3-white {
++ label = "bcm53xx:white:usb3";
++ gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
++ trigger-sources = <&xhci_port1>;
++ linux,default-trigger = "usbport";
++ };
++
++ usb2-white {
++ label = "bcm53xx:white:usb2";
++ gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
++ trigger-sources = <&ohci_port1>, <&ehci_port1>;
++ linux,default-trigger = "usbport";
++ };
++
++ 2ghz {
++ label = "bcm53xx:white:2ghz";
++ gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
++ };
++
++ 5ghz {
++ label = "bcm53xx:white:5ghz";
++ gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ button-wps {
++ label = "WPS";
++ linux,code = <KEY_WPS_BUTTON>;
++ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
++ };
++
++ /* Called "factory reset" in the vendor dmesg */
++ button-restart {
++ label = "Reset";
++ linux,code = <KEY_RESTART>;
++ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ /*
++ * The flash memory is memory mapped at 0x1e000000-0x1fffffff
++ * 64KB blocks; total size 2MB, same that can be
++ * found attached to the spi_nor SPI controller.
++ */
++ nvram@1e1f0000 {
++ compatible = "brcm,nvram";
++ reg = <0x1e1f0000 0x00010000>;
++
++ et0macaddr: et0macaddr {
++ };
++ };
++};
++
++&gmac2 {
++ /*
++ * The NVRAM curiously does not contain a MAC address
++ * for et2 so since that is the only ethernet interface
++ * actually in use on the platform, we use this et0 MAC
++ * address for et2.
++ */
++ nvmem-cells = <&et0macaddr>;
++ nvmem-cell-names = "mac-address";
++};
++
++&spi_nor {
++ status = "okay";
++};
++
++&nandcs {
++ /* Spansion S34ML01G2, 128MB with 128KB erase blocks */
++ partitions {
++ compatible = "fixed-partitions";
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ /*
++ * This is called "nflash" in the vendor kernel with
++ * "upgrade" and "rootfs" (probably using OpenWrt
++ * splitpart). We call it "firmware" like standard tools
++ * assume. The CFE loader contains incorrect information
++ * about TRX partitions, ignore this, there are no TRX
++ * partitions: this device uses SEAMA.
++ */
++ firmware@0 {
++ label = "firmware";
++ reg = <0x00000000 0x08000000>;
++ };
++ };
++};
++
++&usb2 {
++ vcc-gpios = <&chipcommon 21 GPIO_ACTIVE_HIGH>;
++};
++
++&usb3 {
++ vcc-gpios = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
++};
++
++&usb3_phy {
++ status = "okay";
++};
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@8 {
++ reg = <8>;
++ label = "cpu";
++ ethernet = <&gmac2>;
++ phy-mode = "rgmii";
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++ };
++};
--- /dev/null
+From 9f66e1dd82e3186aee95282657512ca2aef1afe0 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Wed, 19 Oct 2022 21:34:49 +0200
+Subject: [PATCH] ARM: dts: bcm53016: Add devicetree for D-Link DWL-8610AP
+
+This adds a device tree for the BCM53016-based D-Link DWL-8610AP
+access point wireless router.
+
+The TRX-format partitions had to be named "firmware" due to
+an OpenWrt patch that only accepts parting such nodes if they
+are named "firmware".
+
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Link: https://lore.kernel.org/r/20221019193449.3036010-2-linus.walleij@linaro.org
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ .../boot/dts/bcm53016-dlink-dwl-8610ap.dts | 131 ++++++++++++++++++
+ 2 files changed, 132 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm53016-dlink-dwl-8610ap.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -140,6 +140,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
+ bcm47094-netgear-r8500.dtb \
+ bcm47094-phicomm-k3.dtb \
+ bcm53015-meraki-mr26.dtb \
++ bcm53016-dlink-dwl-8610ap.dtb \
+ bcm53016-meraki-mr32.dtb \
+ bcm94708.dtb \
+ bcm94709.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm53016-dlink-dwl-8610ap.dts
+@@ -0,0 +1,131 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++/dts-v1/;
++
++#include "bcm4709.dtsi"
++#include "bcm5301x-nand-cs0-bch8.dtsi"
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/input/input.h>
++
++/ {
++ model = "D-Link DWL-8610AP";
++ compatible = "dlink,dwl-8610ap", "brcm,bcm53016", "brcm,bcm4708";
++
++ memory@0 {
++ device_type = "memory";
++ /* 512 MB RAM in 2 x Macronix D9PSH chips */
++ reg = <0x00000000 0x08000000>,
++ <0x88000000 0x08000000>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ power {
++ function = LED_FUNCTION_POWER;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
++ default-state = "on";
++ };
++
++ diag {
++ /* Actually "diag" unclear what this means */
++ function = LED_FUNCTION_INDICATOR;
++ color = <LED_COLOR_ID_RED>;
++ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
++ default-state = "on";
++ linux,default-trigger = "heartbeat";
++ };
++
++ wlan-2g {
++ function = LED_FUNCTION_WLAN;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
++ };
++
++ wlan-5g {
++ function = LED_FUNCTION_WLAN;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ gpio_keys {
++ compatible = "gpio-keys";
++
++ button-reset {
++ debounce-interval = <100>;
++ wakeup-source;
++ linux,code = <KEY_RESTART>;
++ label = "reset";
++ /* This GPIO is actually stored in NVRAM, but it's not gonna change */
++ gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ /*
++ * Flash memory at 0x1e000000-0x1fffffff
++ * Macronix 32 64KB blocks; total size 2MB, same that can be
++ * found attached to the spi_nor SPI controller.
++ */
++ nvram@1e080000 {
++ compatible = "brcm,nvram";
++ reg = <0x1e080000 0x00020000>;
++
++ et0macaddr: et0macaddr {
++ };
++
++ et1macaddr: et1macaddr {
++ };
++ };
++};
++
++&gmac0 {
++ nvmem-cells = <&et0macaddr>;
++ nvmem-cell-names = "mac-address";
++};
++
++&gmac1 {
++ nvmem-cells = <&et1macaddr>;
++ nvmem-cell-names = "mac-address";
++};
++
++&spi_nor {
++ /* Serial SPI NOR Flash MX 25L1606E */
++ status = "okay";
++};
++
++&nandcs {
++ /*
++ * Spansion S34ML01G100TFI00 128 MB NAND Flash memory
++ *
++ * This ECC is a bit unorthodox but it is what the stock firmware
++ * is using, so to be able to mount the original partitions
++ * this is necessary.
++ */
++ nand-ecc-strength = <5>;
++ partitions {
++ compatible = "fixed-partitions";
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ /* This is named nflash1.trx in CFE */
++ trx@0 {
++ label = "firmware";
++ reg = <0x00000000 0x02800000>;
++ compatible = "brcm,trx";
++ };
++
++ /* This is named nflash1.trx2 in CFE */
++ trx2@2800000 {
++ label = "firmware2";
++ reg = <0x02800000 0x02800000>;
++ compatible = "brcm,trx";
++ };
++
++ /* This is named nflash1.rwfs in CFE */
++ free@5000000 {
++ label = "free";
++ reg = <0x05000000 0x03000000>;
++ };
++ };
++};
--- /dev/null
+From b9457a04eb89645049fdf427c13e6a18d5501895 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Tue, 11 Oct 2022 14:24:40 +0200
+Subject: [PATCH] bcma: support SPROM rev 11
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Rev 11 works fine for me to set the MAC address of gmac0 and
+gmac1 in the D-Link DWL-8610AP.
+
+Cc: Rafał Miłecki <zajec5@gmail.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/bcma/sprom.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/bcma/sprom.c
++++ b/drivers/bcma/sprom.c
+@@ -170,7 +170,7 @@ static int bcma_sprom_valid(struct bcma_
+ return err;
+
+ revision = sprom[words - 1] & SSB_SPROM_REVISION_REV;
+- if (revision != 8 && revision != 9 && revision != 10) {
++ if (revision < 8 || revision > 11) {
+ pr_err("Unsupported SPROM revision: %d\n", revision);
+ return -ENOENT;
+ }
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 13 Apr 2021 18:25:20 +0200
+Subject: [PATCH] mtd: parsers: trx: parse "firmware" MTD partitions only
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Parsing every partition with "compatible" set to "brcm,trx" results in
+parsing both: firmware partition and failsafe partition on devices that
+implement failsafe booting. This affects e.g. Linksys EA9500 which has:
+
+partition@200000 {
+ reg = <0x0200000 0x01d00000>;
+ compatible = "linksys,ns-firmware", "brcm,trx";
+};
+
+partition@1f00000 {
+ reg = <0x01f00000 0x01d00000>;
+ compatible = "linksys,ns-firmware", "brcm,trx";
+};
+
+Check for MTD partition name "firmware" before parsing. Recently added
+ofpart_linksys_ns.c creates "firmware" and "failsafe" depending on
+bootloader setup.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ drivers/mtd/parsers/parser_trx.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/mtd/parsers/parser_trx.c
++++ b/drivers/mtd/parsers/parser_trx.c
+@@ -92,6 +92,10 @@ static int parser_trx_parse(struct mtd_i
+ if (err != 0 && err != -EINVAL)
+ pr_err("failed to parse \"brcm,trx-magic\" DT attribute, using default: %d\n", err);
+
++ /* Don't parse any failsafe / backup partitions */
++ if (strcmp(mtd->name, "firmware"))
++ return -EINVAL;
++
+ parts = kcalloc(TRX_PARSER_MAX_PARTS, sizeof(struct mtd_partition),
+ GFP_KERNEL);
+ if (!parts)
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Sat, 1 Oct 2016 22:54:48 +0200
+Subject: [PATCH] usb: xhci: add support for performing fake doorbell
+
+Broadcom's Northstar XHCI controllers seem to need a special start
+procedure to work correctly. There isn't any official documentation of
+this, the problem is that controller doesn't detect any connected
+devices with default setup. Moreover connecting USB device to controller
+that doesn't run properly can cause SoC's watchdog issues.
+
+A workaround that was successfully tested on multiple devices is to
+perform a fake doorbell. This patch adds code for doing this and enables
+it on BCM4708 family.
+---
+ drivers/usb/host/xhci-plat.c | 6 +++++
+ drivers/usb/host/xhci.c | 63 +++++++++++++++++++++++++++++++++++++++++---
+ drivers/usb/host/xhci.h | 1 +
+ 3 files changed, 67 insertions(+), 3 deletions(-)
+
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -77,6 +77,8 @@ static int xhci_priv_resume_quirk(struct
+ static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci)
+ {
+ struct xhci_plat_priv *priv = xhci_to_priv(xhci);
++ struct platform_device*pdev = to_platform_device(dev);
++ struct device_node *node = pdev->dev.of_node;
+
+ /*
+ * As of now platform drivers don't provide MSI support so we ensure
+@@ -84,6 +86,9 @@ static void xhci_plat_quirks(struct devi
+ * dev struct in order to setup MSI
+ */
+ xhci->quirks |= XHCI_PLAT | priv->quirks;
++
++ if (node && of_machine_is_compatible("brcm,bcm4708"))
++ xhci->quirks |= XHCI_FAKE_DOORBELL;
+ }
+
+ /* called during probe() after chip reset completes */
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -161,6 +161,49 @@ int xhci_start(struct xhci_hcd *xhci)
+ return ret;
+ }
+
++/**
++ * xhci_fake_doorbell - Perform a fake doorbell on a specified slot
++ *
++ * Some controllers require a fake doorbell to start correctly. Without that
++ * they simply don't detect any devices.
++ */
++static int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id)
++{
++ u32 temp;
++
++ /* Alloc a virt device for that slot */
++ if (!xhci_alloc_virt_device(xhci, slot_id, NULL, GFP_NOIO)) {
++ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
++ return -ENOMEM;
++ }
++
++ /* Ring fake doorbell for slot_id ep 0 */
++ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0);
++ usleep_range(1000, 1500);
++
++ /* Read the status to check if HSE is set or not */
++ temp = readl(&xhci->op_regs->status);
++
++ /* Clear HSE if set */
++ if (temp & STS_FATAL) {
++ xhci_dbg(xhci, "HSE problem detected, status: 0x%08x\n", temp);
++ temp &= ~0x1fff;
++ temp |= STS_FATAL;
++ writel(temp, &xhci->op_regs->status);
++ usleep_range(1000, 1500);
++ readl(&xhci->op_regs->status);
++ }
++
++ /* Free virt device */
++ xhci_free_virt_device(xhci, slot_id);
++
++ /* We're done if controller is already running */
++ if (readl(&xhci->op_regs->command) & CMD_RUN)
++ return 0;
++
++ return xhci_start(xhci);
++}
++
+ /*
+ * Reset a halted HC.
+ *
+@@ -641,6 +684,14 @@ static int xhci_run_finished(struct xhci
+ return -ENODEV;
+ }
+
++ if (xhci->quirks & XHCI_FAKE_DOORBELL) {
++ int err = xhci_fake_doorbell(xhci, 1);
++ if (err) {
++ xhci_halt(xhci);
++ return err;
++ }
++ }
++
+ xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
+
+ if (xhci->quirks & XHCI_NEC_HOST)
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1899,6 +1899,7 @@ struct xhci_hcd {
+ #define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
+ #define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43)
+ #define XHCI_RESET_TO_DEFAULT BIT_ULL(44)
++#define XHCI_FAKE_DOORBELL BIT_ULL(45)
+
+ unsigned int num_active_eps;
+ unsigned int limit_active_eps;
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 24 Sep 2014 22:14:07 +0200
+Subject: [PATCH] ARM: BCM5301X: Disable MMU and Dcache during decompression
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Broadcom devices have broken CFE (bootloader) that leaves hardware in an
+invalid state. It causes problems with booting Linux. On Northstar
+devices kernel was randomly hanging in ~25% of tries during early init.
+Hangs used to happen at random places in the start_kernel. On BCM53573
+kernel doesn't even seem to start booting.
+
+To workaround this problem we need to do following very early:
+1) Clear 2 following bits in the SCTLR register:
+#define CR_M (1 << 0) /* MMU enable */
+#define CR_C (1 << 2) /* Dcache enable */
+2) Flush the whole D-cache
+3) Disable L2 cache
+
+Unfortunately this patch is not upstreamable as it does above things
+unconditionally. We can't check if we are running on Broadcom platform
+in any safe way and doing such hacks with ARCH_MULTI_V7 is unacceptable
+as it could break other devices support.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/compressed/Makefile
++++ b/arch/arm/boot/compressed/Makefile
+@@ -35,6 +35,11 @@ ifeq ($(CONFIG_ARCH_ACORN),y)
+ OBJS += ll_char_wr.o font.o
+ endif
+
++ifeq ($(CONFIG_ARCH_BCM_5301X),y)
++OBJS += head-bcm_5301x-mpcore.o
++OBJS += cache-v7-min.o
++endif
++
+ ifeq ($(CONFIG_ARCH_SA1100),y)
+ OBJS += head-sa1100.o
+ endif
+--- /dev/null
++++ b/arch/arm/boot/compressed/head-bcm_5301x-mpcore.S
+@@ -0,0 +1,37 @@
++/*
++ *
++ * Platform specific tweaks. This is merged into head.S by the linker.
++ *
++ */
++
++#include <linux/linkage.h>
++#include <asm/assembler.h>
++#include <asm/cp15.h>
++
++ .section ".start", "ax"
++
++/*
++ * This code section is spliced into the head code by the linker
++ */
++
++__plat_uncompress_start:
++
++ @ Preserve r8/r7 i.e. kernel entry values
++ mov r12, r8
++
++ @ Clear MMU enable and Dcache enable bits
++ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR
++ bic r0, #CR_C|CR_M
++ mcr p15, 0, r0, c1, c0, 0 @ Write SCTLR
++ nop
++
++ @ Call the cache invalidation routine
++ bl v7_flush_dcache_all
++ nop
++ mov r0,#0
++ ldr r3, =0x19022000 @ L2 cache controller, control reg
++ str r0, [r3, #0x100] @ Disable L2 cache
++ nop
++
++ @ Restore
++ mov r8, r12
+--- a/arch/arm/boot/compressed/cache-v7-min.S
++++ b/arch/arm/boot/compressed/cache-v7-min.S
+@@ -12,6 +12,7 @@
+
+ #include <linux/linkage.h>
+ #include <linux/init.h>
++#include <asm/assembler.h>
+
+ __INIT
+
+@@ -63,7 +64,7 @@ loop2:
+ ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11
+ THUMB( lsl r6, r9, r2 )
+ THUMB( orr r11, r11, r6 ) @ factor index number into r11
+- mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
++ mcr p15, 0, r11, c7, c6, 2 @ clean & invalidate by set/way
+ subs r9, r9, #1 @ decrement the index
+ bge loop2
+ subs r4, r4, #1 @ decrement the way
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Subject: [PATCH] ARM: dts: BCM5301X: Specify switch ports for remaining
+ devices
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
++++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
+@@ -93,3 +93,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
++++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
+@@ -83,3 +83,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "wan";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan1";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan2";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan3";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "lan4";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
++++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+@@ -149,3 +149,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
++++ b/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
+@@ -46,3 +46,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
++++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+@@ -42,3 +42,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
++++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
+@@ -86,3 +86,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
++++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
+@@ -77,3 +77,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "wan";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan1";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan2";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan3";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "lan4";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
++++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+@@ -66,6 +66,38 @@
+ status = "okay";
+ };
+
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "wan";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan1";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan2";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan3";
++ };
++
++ port@7 {
++ reg = <7>;
++ label = "cpu";
++ ethernet = <&gmac1>;
++ };
++ };
++};
++
+ &nandcs {
+ partitions {
+ compatible = "fixed-partitions";
+--- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
++++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+@@ -130,3 +130,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
++++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+@@ -47,3 +47,45 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@8 {
++ reg = <8>;
++ label = "cpu";
++ ethernet = <&gmac2>;
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
++++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+@@ -104,3 +104,40 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "wan";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan1";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan2";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan3";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "lan4";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
++++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
+@@ -94,3 +94,45 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "wan";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan1";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan2";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan3";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "lan4";
++ };
++
++ port@8 {
++ reg = <8>;
++ label = "cpu";
++ ethernet = <&gmac2>;
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
++ };
++};
+--- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
++++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
+@@ -38,6 +38,38 @@
+ status = "okay";
+ };
+
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "wan";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
++
+ &nandcs {
+ partitions {
+ compatible = "fixed-partitions";
+--- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
++++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
+@@ -91,6 +91,43 @@
+ };
+ };
+
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "wan";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan1";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan2";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan3";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "lan4";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
++
+ &spi_nor {
+ status = "okay";
+
+--- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
++++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
+@@ -100,6 +100,43 @@
+ vcc-gpio = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
+ };
+
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "wan";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan1";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan2";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan3";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "lan4";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
++
+ &spi_nor {
+ status = "okay";
+
+--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
++++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
+@@ -107,3 +107,41 @@
+ &usb3_phy {
+ status = "okay";
+ };
++
++&srab {
++ status = "okay";
++
++ ports {
++ port@0 {
++ reg = <0>;
++ label = "lan1";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan2";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan3";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan4";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@5 {
++ reg = <5>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ };
++ };
++};
++
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7900
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+---
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -125,6 +125,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
+ bcm4709-buffalo-wxr-1900dhp.dtb \
+ bcm4709-linksys-ea9200.dtb \
+ bcm4709-netgear-r7000.dtb \
++ bcm4709-netgear-r7900.dtb \
+ bcm4709-netgear-r8000.dtb \
+ bcm4709-tplink-archer-c9-v1.dtb \
+ bcm47094-asus-rt-ac88u.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm4709-netgear-r7900.dts
+@@ -0,0 +1,42 @@
++/*
++ * Broadcom BCM470X / BCM5301X ARM platform code.
++ * DTS for Netgear R7900
++ *
++ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++
++/dts-v1/;
++
++#include "bcm4709.dtsi"
++#include "bcm5301x-nand-cs0-bch8.dtsi"
++
++/ {
++ compatible = "netgear,r7900", "brcm,bcm4709", "brcm,bcm4708";
++ model = "Netgear R7900";
++
++ chosen {
++ bootargs = "console=ttyS0,115200";
++ };
++
++ memory {
++ reg = <0x00000000 0x08000000
++ 0x88000000 0x08000000>;
++ };
++
++ axi@18000000 {
++ usb3@23000 {
++ reg = <0x00023000 0x1000>;
++
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
++ };
++ };
++};
++
++&uart0 {
++ status = "okay";
++};
--- /dev/null
+From e492f69e4da879db7b3e9a2290e5b6620f1335b5 Mon Sep 17 00:00:00 2001
+From: Aleksey Nasibulin <alealexpro100@ya.ru>
+Date: Thu, 13 Oct 2022 08:16:51 +0000
+Subject: [PATCH] ARM: dts: BCM5301X: Extend RAM to full 256MB for Linksys
+ EA6500 V2
+
+Linksys ea6500-v2 have 256MB of ram. Currently we only use 128MB.
+Expand the definition to use all the available RAM.
+
+Fixes: 03e96644d7a8 ("ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2")
+Signed-off-by: Aleksey Nasibulin <alealexpro100@ya.ru>
+---
+ arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
++++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+@@ -19,7 +19,8 @@
+
+ memory@0 {
+ device_type = "memory";
+- reg = <0x00000000 0x08000000>;
++ reg = <0x00000000 0x08000000>,
++ <0x88000000 0x08000000>;
+ };
+
+ gpio-keys {
--- /dev/null
+From 7166207bd1d8c46d09d640d46afc685df9bb9083 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 22 Nov 2018 09:21:49 +0100
+Subject: [PATCH] ARM: dts: BCM5301X: Describe partition formats
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It's needed by OpenWrt for custom partitioning.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
++++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+@@ -35,6 +35,7 @@
+ partition@0 {
+ label = "firmware";
+ reg = <0x00000000 0x08000000>;
++ compatible = "seama";
+ };
+ };
+ };
--- /dev/null
+From 2a2af518266a29323cf30c3f9ba9ef2ceb1dd84b Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Date: Thu, 16 Oct 2014 20:52:16 +0200
+Subject: [PATCH] UBI: Detect EOF mark and erase all remaining blocks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+---
+ drivers/mtd/ubi/attach.c | 5 +++++
+ drivers/mtd/ubi/io.c | 4 ++++
+ drivers/mtd/ubi/ubi.h | 1 +
+ 3 files changed, 10 insertions(+)
+
+--- a/drivers/mtd/ubi/attach.c
++++ b/drivers/mtd/ubi/attach.c
+@@ -82,6 +82,9 @@ static int self_check_ai(struct ubi_devi
+ #define AV_ADD BIT(1)
+ #define AV_FIND_OR_ADD (AV_FIND | AV_ADD)
+
++/* Set on finding block with 0xdeadc0de, indicates erasing all blocks behind */
++bool erase_all_next;
++
+ /**
+ * find_or_add_av - internal function to find a volume, add a volume or do
+ * both (find and add if missing).
+@@ -1580,6 +1583,8 @@ int ubi_attach(struct ubi_device *ubi, i
+ if (!ai)
+ return -ENOMEM;
+
++ erase_all_next = false;
++
+ #ifdef CONFIG_MTD_UBI_FASTMAP
+ /* On small flash devices we disable fastmap in any case. */
+ if ((int)mtd_div_by_eb(ubi->mtd->size, ubi->mtd) <= UBI_FM_MAX_START) {
+--- a/drivers/mtd/ubi/io.c
++++ b/drivers/mtd/ubi/io.c
+@@ -717,6 +717,10 @@ int ubi_io_read_ec_hdr(struct ubi_device
+ }
+
+ magic = be32_to_cpu(ec_hdr->magic);
++ if (magic == 0xdeadc0de)
++ erase_all_next = true;
++ if (erase_all_next)
++ return read_err ? UBI_IO_FF_BITFLIPS : UBI_IO_FF;
+ if (magic != UBI_EC_HDR_MAGIC) {
+ if (mtd_is_eccerr(read_err))
+ return UBI_IO_BAD_HDR_EBADMSG;
+--- a/drivers/mtd/ubi/ubi.h
++++ b/drivers/mtd/ubi/ubi.h
+@@ -820,6 +820,7 @@ extern struct mutex ubi_devices_mutex;
+ extern struct blocking_notifier_head ubi_notifiers;
+
+ /* attach.c */
++extern bool erase_all_next;
+ struct ubi_ainf_peb *ubi_alloc_aeb(struct ubi_attach_info *ai, int pnum,
+ int ec);
+ void ubi_free_aeb(struct ubi_attach_info *ai, struct ubi_ainf_peb *aeb);
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Mon, 20 Jun 2022 10:01:18 +0200
+Subject: [PATCH] net: disable GRO by default
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+In many cases GRO improves network performance however it comes at a
+cost of chacksums calculations. In case of slow CPU and missing hardware
+csum calculation support GRO can actually decrease network speed.
+
+On BCM4708 *disabling* GRO results in following NAT masquarade speed
+changes:
+1. 364 Mb/s → 396 Mb/s (packet steering disabled)
+2. 341 Mb/s → 566 Mb/s (packet steering enabled)
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ include/linux/netdev_features.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/include/linux/netdev_features.h
++++ b/include/linux/netdev_features.h
+@@ -242,10 +242,10 @@ static inline int find_next_netdev_featu
+ #define NETIF_F_UPPER_DISABLES NETIF_F_LRO
+
+ /* changeable features with no special hardware requirements */
+-#define NETIF_F_SOFT_FEATURES (NETIF_F_GSO | NETIF_F_GRO)
++#define NETIF_F_SOFT_FEATURES (NETIF_F_GSO)
+
+ /* Changeable features with no special hardware requirements that defaults to off. */
+-#define NETIF_F_SOFT_FEATURES_OFF (NETIF_F_GRO_FRAGLIST | NETIF_F_GRO_UDP_FWD)
++#define NETIF_F_SOFT_FEATURES_OFF (NETIF_F_GRO_FRAGLIST | NETIF_F_GRO_UDP_FWD | NETIF_F_GRO)
+
+ #define NETIF_F_VLAN_FEATURES (NETIF_F_HW_VLAN_CTAG_FILTER | \
+ NETIF_F_HW_VLAN_CTAG_RX | \
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 10 Jun 2022 13:10:47 +0200
+Subject: [PATCH] bgmac: reduce max frame size to support just MTU 1500
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+bgmac allocates new replacement buffer before handling each received
+frame. Allocating & DMA-preparing 9724 B each time consumes a lot of CPU
+time. Ideally bgmac should just respect currently set MTU but it isn't
+the case right now. For now just revert back to the old limited frame
+size.
+
+This change bumps NAT masquarade speed by ~95%.
+
+Ref: 8c7da63978f1 ("bgmac: configure MTU and add support for frames beyond 8192 byte size")
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ drivers/net/ethernet/broadcom/bgmac.h | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bgmac.h
++++ b/drivers/net/ethernet/broadcom/bgmac.h
+@@ -328,8 +328,7 @@
+ #define BGMAC_RX_FRAME_OFFSET 30 /* There are 2 unused bytes between header and real data */
+ #define BGMAC_RX_BUF_OFFSET (NET_SKB_PAD + NET_IP_ALIGN - \
+ BGMAC_RX_FRAME_OFFSET)
+-/* Jumbo frame size with FCS */
+-#define BGMAC_RX_MAX_FRAME_SIZE 9724
++#define BGMAC_RX_MAX_FRAME_SIZE 1536
+ #define BGMAC_RX_BUF_SIZE (BGMAC_RX_FRAME_OFFSET + BGMAC_RX_MAX_FRAME_SIZE)
+ #define BGMAC_RX_ALLOC_SIZE (SKB_DATA_ALIGN(BGMAC_RX_BUF_SIZE + BGMAC_RX_BUF_OFFSET) + \
+ SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
--- /dev/null
+From 6f1c62440eb6846cb8045d7a5480ec7bbe47c96f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Mon, 15 Aug 2016 10:30:41 +0200
+Subject: [PATCH] BCM53573 minor hacks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/dts/bcm53573.dtsi
++++ b/arch/arm/boot/dts/bcm53573.dtsi
+@@ -54,6 +54,7 @@
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
++ clocks = <&ilp>;
+ };
+
+ clocks {
+--- a/drivers/bcma/main.c
++++ b/drivers/bcma/main.c
+@@ -330,14 +330,6 @@ static int bcma_register_devices(struct
+ }
+ #endif
+
+-#ifdef CONFIG_BCMA_SFLASH
+- if (bus->drv_cc.sflash.present) {
+- err = platform_device_register(&bcma_sflash_dev);
+- if (err)
+- bcma_err(bus, "Error registering serial flash\n");
+- }
+-#endif
+-
+ #ifdef CONFIG_BCMA_NFLASH
+ if (bus->drv_cc.nflash.present) {
+ err = platform_device_register(&bcma_nflash_dev);
+@@ -415,6 +407,14 @@ int bcma_bus_register(struct bcma_bus *b
+ bcma_register_core(bus, core);
+ }
+
++#ifdef CONFIG_BCMA_SFLASH
++ if (bus->drv_cc.sflash.present) {
++ err = platform_device_register(&bcma_sflash_dev);
++ if (err)
++ bcma_err(bus, "Error registering serial flash\n");
++ }
++#endif
++
+ /* Try to get SPROM */
+ err = bcma_sprom_get(bus);
+ if (err == -ENOENT) {
+--- a/drivers/clocksource/arm_arch_timer.c
++++ b/drivers/clocksource/arm_arch_timer.c
+@@ -14,6 +14,7 @@
+ #include <linux/smp.h>
+ #include <linux/cpu.h>
+ #include <linux/cpu_pm.h>
++#include <linux/clk.h>
+ #include <linux/clockchips.h>
+ #include <linux/clocksource.h>
+ #include <linux/clocksource_ids.h>
+@@ -1021,6 +1022,16 @@ static void __init arch_timer_of_configu
+ if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
+ arch_timer_rate = rate;
+
++ /* Get clk rate through clk driver if present */
++ if (!arch_timer_rate) {
++ struct clk *clk = of_clk_get(np, 0);
++
++ if (!IS_ERR(clk)) {
++ if (!clk_prepare_enable(clk))
++ arch_timer_rate = clk_get_rate(clk);
++ }
++ }
++
+ /* Check the timer frequency. */
+ if (validate_timer_rate())
+ pr_warn("frequency not available\n");
projects / openwrt / staging / hauke.git / commitdiff