target/linux/ramips/dts/mt7620a_wevo_air-duo.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         compatible = "wevo,air-duo", "ralink,mt7620a-soc";
  11         model = "WeVO AIR DUO";
  12
  13         aliases {
  14                 led-boot = &led_status;
  15                 led-failsafe = &led_status;
  16                 led-running = &led_status;
  17                 led-upgrade = &led_status;
  18                 label-mac-device = &ethernet;
  19         };
  20
  21         leds {
  22                 compatible = "gpio-leds";
  23
  24                 led_status: led-0 {
  25                         label = "blue:status";
  26                         color = <LED_COLOR_ID_BLUE>;
  27                         function = LED_FUNCTION_STATUS;
  28                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  29                 };
  30
  31                 led-1 {
  32                         color = <LED_COLOR_ID_BLUE>;
  33                         function = LED_FUNCTION_WPS;
  34                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  35                 };
  36         };
  37
  38         keys {
  39                 compatible = "gpio-keys";
  40
  41                 wps {
  42                         label = "wps";
  43                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  44                         linux,code = <KEY_WPS_BUTTON>;
  45                 };
  46
  47                 reset {
  48                         label = "reset";
  49                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  50                         linux,code = <KEY_RESTART>;
  51                 };
  52         };
  53 };
  54
  55 &gpio1 {
  56         status = "okay";
  57 };
  58
  59 &spi0 {
  60         status = "okay";
  61
  62         flash@0 {
  63                 compatible = "jedec,spi-nor";
  64                 reg = <0>;
  65                 spi-max-frequency = <50000000>;
  66
  67                 partitions {
  68                         compatible = "fixed-partitions";
  69                         #address-cells = <1>;
  70                         #size-cells = <1>;
  71
  72                         partition@0 {
  73                                 label = "u-boot";
  74                                 reg = <0x0 0x30000>;
  75                                 read-only;
  76                         };
  77
  78                         partition@30000 {
  79                                 label = "config";
  80                                 reg = <0x30000 0x10000>;
  81                                 read-only;
  82                         };
  83
  84                         factory: partition@40000 {
  85                                 compatible = "nvmem-cells";
  86                                 label = "factory";
  87                                 reg = <0x40000 0x10000>;
  88                                 #address-cells = <1>;
  89                                 #size-cells = <1>;
  90                                 read-only;
  91
  92                                 eeprom_factory_0: eeprom@0 {
  93                                         reg = <0x0 0x200>;
  94                                 };
  95
  96                                 eeprom_factory_8000: eeprom@8000 {
  97                                         reg = <0x8000 0x200>;
  98                                 };
  99
 100                                 macaddr_factory_4: macaddr@4 {
 101                                         reg = <0x4 0x6>;
 102                                 };
 103                         };
 104
 105                         partition@50000 {
 106                                 compatible = "denx,uimage";
 107                                 label = "firmware";
 108                                 reg = <0x50000 0xeb0000>;
 109                         };
 110
 111                         partition@f00000 {
 112                                 label = "db";
 113                                 reg = <0xf00000 0x100000>;
 114                                 read-only;
 115                         };
 116                 };
 117         };
 118 };
 119
 120 &state_default {
 121         gpio {
 122                 groups = "i2c", "uartf", "spi refclk";
 123                 function = "gpio";
 124         };
 125 };
 126
 127 &ethernet {
 128         pinctrl-names = "default";
 129         pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 130         nvmem-cells = <&macaddr_factory_4>;
 131         nvmem-cell-names = "mac-address";
 132
 133         port@5 {
 134                 status = "okay";
 135                 mediatek,fixed-link = <1000 1 1 1>;
 136                 phy-mode = "rgmii";
 137         };
 138
 139         mdio-bus {
 140                 status = "okay";
 141
 142                 ethernet-phy@0 {
 143                         reg = <0>;
 144                         phy-mode = "rgmii";
 145                 };
 146
 147                 ethernet-phy@1 {
 148                         reg = <1>;
 149                         phy-mode = "rgmii";
 150                 };
 151
 152                 ethernet-phy@2 {
 153                         reg = <2>;
 154                         phy-mode = "rgmii";
 155                 };
 156
 157                 ethernet-phy@3 {
 158                         reg = <3>;
 159                         phy-mode = "rgmii";
 160                 };
 161
 162                 ethernet-phy@4 {
 163                         reg = <4>;
 164                         phy-mode = "rgmii";
 165                 };
 166
 167                 ethernet-phy@1f {
 168                         reg = <0x1f>;
 169                         phy-mode = "rgmii";
 170                 };
 171         };
 172 };
 173
 174 &gsw {
 175         mediatek,ephy-base = /bits/ 8 <12>;
 176 };
 177
 178 &ehci {
 179         status = "okay";
 180 };
 181
 182 &ohci {
 183         status = "okay";
 184 };
 185
 186 &pcie {
 187         status = "okay";
 188 };
 189
 190 &pcie0 {
 191         wifi@0,0 {
 192                 compatible = "mediatek,mt76";
 193                 reg = <0x0000 0 0 0 0>;
 194                 nvmem-cells = <&eeprom_factory_8000>;
 195                 nvmem-cell-names = "eeprom";
 196                 ieee80211-freq-limit = <5000000 6000000>;
 197
 198                 led {
 199                         led-sources = <2>;
 200                         led-active-low;
 201                 };
 202         };
 203 };
 204
 205 &wmac {
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&wled_pins>;
 208         nvmem-cells = <&eeprom_factory_0>;
 209         nvmem-cell-names = "eeprom";
 210 };