e1f308dd528fcb7dfb5f31a85aa8aa4b96cf57bd
[openwrt/staging/hauke.git] / target / linux / octeon / files / arch / mips / boot / dts / cavium-octeon / cn6130_cisco_vedge1000.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 /include/ "octeon_3xxx.dtsi"
4
5 / {
6 compatible = "cisco,vedge1000", "cavium,cn6130";
7 model = "Cisco/Viptela vEdge 1000";
8 #address-cells = <2>;
9 #size-cells = <2>;
10 interrupt-parent = <&ciu>;
11
12 soc@0 {
13 smi0: mdio@1180000001800 {
14 mgmtphy: ethernet-phy@0 {
15 reg = <0x00>;
16 };
17 };
18
19 mgmt0: ethernet@1070000100000 {
20 compatible = "cavium,octeon-5750-mix";
21 reg = <0x10700 0x100000 0x00 0x100>,
22 <0x11800 0xe0000000 0x00 0x300>,
23 <0x11800 0xe0000400 0x00 0x400>,
24 <0x11800 0xe0002000 0x00 0x08>;
25 cell-index = <0x00>;
26 interrupts = <0x00 0x3e 0x01 0x2e>;
27 nvmem-cells = <&macaddr_eeprom>;
28 nvmem-cell-names = "mac-address";
29 phy-handle = <&mgmtphy>;
30 };
31
32 pip: pip@11800a0000000 {
33 interface@0 {
34 ethernet@0 {
35 nvmem-cells = <&macaddr_eeprom>;
36 nvmem-cell-names = "mac-address";
37 mac-address-increment = <(3)>;
38 label = "lan2";
39 /delete-property/ local-mac-address;
40 };
41
42 ethernet@1 {
43 nvmem-cells = <&macaddr_eeprom>;
44 nvmem-cell-names = "mac-address";
45 mac-address-increment = <(4)>;
46 label = "lan3";
47 /delete-property/ local-mac-address;
48 };
49
50 ethernet@2 {
51 nvmem-cells = <&macaddr_eeprom>;
52 nvmem-cell-names = "mac-address";
53 mac-address-increment = <(1)>;
54 label = "lan0";
55 /delete-property/ local-mac-address;
56 };
57
58 ethernet@3 {
59 compatible = "cavium,octeon-3860-pip-port";
60 reg = <0x3>;
61 nvmem-cells = <&macaddr_eeprom>;
62 nvmem-cell-names = "mac-address";
63 mac-address-increment = <(2)>;
64 label = "lan1";
65 };
66 };
67
68 interface@1 {
69 ethernet@0 {
70 compatible = "cavium,octeon-3860-pip-port";
71 reg = <0x0>;
72 nvmem-cells = <&macaddr_eeprom>;
73 nvmem-cell-names = "mac-address";
74 mac-address-increment = <(7)>;
75 label = "lan6";
76 };
77
78 ethernet@1 {
79 compatible = "cavium,octeon-3860-pip-port";
80 reg = <0x1>;
81 nvmem-cells = <&macaddr_eeprom>;
82 nvmem-cell-names = "mac-address";
83 mac-address-increment = <(8)>;
84 label = "lan7";
85 };
86
87 ethernet@2 {
88 compatible = "cavium,octeon-3860-pip-port";
89 reg = <0x2>;
90 nvmem-cells = <&macaddr_eeprom>;
91 nvmem-cell-names = "mac-address";
92 mac-address-increment = <(5)>;
93 label = "lan4";
94 };
95
96 ethernet@3 {
97 compatible = "cavium,octeon-3860-pip-port";
98 reg = <0x3>;
99 nvmem-cells = <&macaddr_eeprom>;
100 nvmem-cell-names = "mac-address";
101 mac-address-increment = <(6)>;
102 label = "lan5";
103 };
104 };
105 };
106
107 twsi0: i2c@1180000001000 {
108 clock-frequency = <400000>;
109
110 jc42@18 {
111 compatible = "jedec,jc-42.4-temp";
112 reg = <0x18>;
113 };
114 };
115
116 twsi2: i2c@1180000001200 {
117 #address-cells = <1>;
118 #size-cells = <0>;
119 compatible = "cavium,octeon-3860-twsi";
120 reg = <0x11800 0x1200 0x00 0x200>;
121 interrupts = <0x00 0x3b>;
122 clock-frequency = <400000>;
123
124 tmp@4c {
125 compatible = "maxim,max6699";
126 reg = <0x4c>;
127 };
128
129 rtc@6f {
130 compatible = "microchip,mcp7941x";
131 reg = <0x6f>;
132 };
133
134 tlv-eeprom@54 {
135 compatible = "atmel,24c512";
136 reg = <0x54>;
137 pagesize = <0x80>;
138 #address-cells = <1>;
139 #size-cells = <1>;
140
141 macaddr_eeprom: mac-address@8 {
142 reg = <0x8 6>;
143 };
144 };
145 };
146
147 uart0: serial@1180000000800 {
148 clock-frequency = <600000000>;
149 current-speed = <115200>;
150 };
151
152 uart1: serial@1180000000c00 {
153 compatible = "cavium,octeon-3860-uart", "ns16550";
154 reg = <0x11800 0xc00 0x00 0x400>;
155 reg-shift = <0x03>;
156 interrupts = <0x00 0x23>;
157 clock-frequency = <600000000>;
158 current-speed = <115200>;
159 };
160
161 mmc0: mmc@1180000002000 {
162 compatible = "cavium,octeon-6130-mmc";
163 reg = <0x11800 0x2000 0x00 0x100 0x11800 0x168 0x00 0x20>;
164 #address-cells = <1>;
165 #size-cells = <0>;
166 interrupts = <0x01 0x13 0x00 0x3f>;
167
168 mmc-slot@0 {
169 compatible = "cavium,octeon-6130-mmc-slot";
170 reg = <0x00>;
171 voltage-ranges = <0xce4 0xce4>;
172 max-frequency = <0x3197500>;
173 wp-gpios = <&gpio 0x02 0x00>;
174 cd-gpios = <&gpio 0x03 0x01>;
175 cavium,bus-max-width = <0x04>;
176 };
177 };
178
179 bootbus: bootbus@1180000000000 {
180 compatible = "cavium,octeon-3860-bootbus";
181 reg = <0x11800 0x00 0x00 0x200>;
182 #address-cells = <2>;
183 #size-cells = <1>;
184 ranges = <0 0 0x00 0x1ec00000 0x1400000>,
185 <1 0 0x10000 0x20000000 0x00>,
186 <2 0 0x10000 0x30000000 0x00>,
187 <3 0 0x10000 0x40000000 0x00>,
188 <4 0 0x10000 0x50000000 0x00>,
189 <5 0 0x10000 0x60000000 0x00>,
190 <6 0 0x00 0x1e000000 0x10000>,
191 <7 0 0x10000 0x80000000 0x00>;
192
193 cavium,cs-config@0 {
194 compatible = "cavium,octeon-3860-bootbus-config";
195 cavium,cs-index = <0x00>;
196 cavium,t-adr = <0x0a>;
197 cavium,t-ce = <0x32>;
198 cavium,t-oe = <0x32>;
199 cavium,t-we = <0x23>;
200 cavium,t-rd-hld = <0x19>;
201 cavium,t-wr-hld = <0x23>;
202 cavium,t-pause = <0x00>;
203 cavium,t-wait = <0x12c>;
204 cavium,t-page = <0x19>;
205 cavium,t-rd-dly = <0x00>;
206 cavium,t-ale = <0x03>;
207 cavium,pages = <0x00>;
208 cavium,bus-width = <0x10>;
209 };
210
211 /delete-node/ cavium,cs-config@1;
212 /delete-node/ cavium,cs-config@2;
213 /delete-node/ cavium,cs-config@3;
214 /delete-node/ cavium,cs-config@4;
215 /delete-node/ cavium,cs-config@5;
216
217 cavium,cs-config@6 {
218 compatible = "cavium,octeon-3860-bootbus-config";
219 cavium,cs-index = <0x06>;
220 cavium,t-adr = <0x0a>;
221 cavium,t-ce = <0x0a>;
222 cavium,t-oe = <0xa0>;
223 cavium,t-we = <0x64>;
224 cavium,t-rd-hld = <0x00>;
225 cavium,t-wr-hld = <0x00>;
226 cavium,t-pause = <0x32>;
227 cavium,t-wait = <0x12c>;
228 cavium,t-page = <0x12c>;
229 cavium,t-rd-dly = <0x0a>;
230 cavium,t-ale = <0x3f>;
231 cavium,pages = <0x00>;
232 cavium,bus-width = <0x08>;
233 /delete-property/ cavium,wait-mode;
234 };
235
236 flash0: nor@0,0 {
237 compatible = "cfi-flash";
238 reg = <0x00 0x00 0x1000000>;
239 bank-width = <2>;
240 device-width = <1>;
241
242 #address-cells = <1>;
243 #size-cells = <1>;
244
245 partition@0 {
246 label = "bootloader";
247 reg = <0x00 0x200000>;
248 read-only;
249 };
250
251 partition@fe0000 {
252 label = "environment";
253 reg = <0xfe0000 0x20000>;
254 };
255 };
256
257 cpld: cpld@6,0 {
258 compatible = "cisco,n821-cpld", "syscon", "simple-mfd";
259 #address-cells = <1>;
260 #size-cells = <1>;
261 reg-io-width = <1>; // Syscon uses 4-byte accesses by default
262
263 reg = <0x06 0x00 0x28>; // This is the regmap to be defined for syscon devices..
264 ranges = <0 0x06 0x0 0x50>; // .. and this is the addresses to map general subdevices on
265 };
266 };
267
268 uctl@118006f000000 {
269 compatible = "cavium,octeon-6335-uctl";
270 reg = <0x11800 0x6f000000 0x00 0x100>;
271 ranges;
272 #address-cells = <2>;
273 #size-cells = <2>;
274 refclk-frequency = <0xb71b00>;
275 refclk-type = "crystal";
276
277 ehci@16f0000000000 {
278 compatible = "cavium,octeon-6335-ehci", "usb-ehci";
279 reg = <0x16f00 0x00 0x00 0x100>;
280 interrupts = <0x00 0x38>;
281 big-endian-regs;
282 };
283
284 ohci@16f0000000400 {
285 compatible = "cavium,octeon-6335-ohci", "usb-ohci";
286 reg = <0x16f00 0x400 0x00 0x100>;
287 interrupts = <0x00 0x38>;
288 big-endian-regs;
289 };
290 };
291 };
292 };
293