6af9e843357a0ebaed76ee0794576e3d105719a5
[openwrt/staging/hauke.git] / target / linux / mediatek / patches-5.15 / 730-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch
1 From 60ed9eb9605656c19ca402b7bd3f47552e901601 Mon Sep 17 00:00:00 2001
2 From: Daniel Golle <daniel@makrotopia.org>
3 Date: Mon, 13 Feb 2023 02:33:14 +0000
4 Subject: [PATCH] net: phy: add driver for MediaTek SoC built-in GE PHYs
5
6 Some of MediaTek's Filogic SoCs come with built-in gigabit Ethernet
7 PHYs which require calibration data from the SoC's efuse.
8 Despite the similar design the driver doesn't share any code with the
9 existing mediatek-ge.c, so add support for these PHYs by introducing a
10 new driver for only MediaTek's ARM64 SoCs.
11
12 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
13 ---
14 MAINTAINERS | 9 +
15 drivers/net/phy/Kconfig | 12 +
16 drivers/net/phy/Makefile | 1 +
17 drivers/net/phy/mediatek-ge-soc.c | 1263 +++++++++++++++++++++++++++++
18 drivers/net/phy/mediatek-ge.c | 3 +-
19 5 files changed, 1287 insertions(+), 1 deletion(-)
20 create mode 100644 drivers/net/phy/mediatek-ge-soc.c
21
22 --- a/MAINTAINERS
23 +++ b/MAINTAINERS
24 @@ -11797,6 +11797,15 @@ S: Maintained
25 F: drivers/net/pcs/pcs-mtk-lynxi.c
26 F: include/linux/pcs/pcs-mtk-lynxi.h
27
28 +MEDIATEK ETHERNET PHY DRIVERS
29 +M: Daniel Golle <daniel@makrotopia.org>
30 +M: Qingfang Deng <dqfext@gmail.com>
31 +M: SkyLake Huang <SkyLake.Huang@mediatek.com>
32 +L: netdev@vger.kernel.org
33 +S: Maintained
34 +F: drivers/net/phy/mediatek-ge-soc.c
35 +F: drivers/net/phy/mediatek-ge.c
36 +
37 MEDIATEK I2C CONTROLLER DRIVER
38 M: Qii Wang <qii.wang@mediatek.com>
39 L: linux-i2c@vger.kernel.org
40 --- a/drivers/net/phy/Kconfig
41 +++ b/drivers/net/phy/Kconfig
42 @@ -293,6 +293,18 @@ config MEDIATEK_GE_PHY
43 help
44 Supports the MediaTek Gigabit Ethernet PHYs.
45
46 +config MEDIATEK_GE_SOC_PHY
47 + tristate "MediaTek SoC Ethernet PHYs"
48 + depends on (ARM64 && ARCH_MEDIATEK) || COMPILE_TEST
49 + select NVMEM_MTK_EFUSE
50 + help
51 + Supports MediaTek SoC built-in Gigabit Ethernet PHYs.
52 +
53 + Include support for built-in Ethernet PHYs which are present in
54 + the MT7981 and MT7988 SoCs. These PHYs need calibration data
55 + present in the SoCs efuse and will dynamically calibrate VCM
56 + (common-mode voltage) during startup.
57 +
58 config MICREL_PHY
59 tristate "Micrel PHYs"
60 help
61 --- a/drivers/net/phy/Makefile
62 +++ b/drivers/net/phy/Makefile
63 @@ -81,6 +81,7 @@ obj-$(CONFIG_MARVELL_PHY) += marvell.o
64 obj-$(CONFIG_MARVELL_88X2222_PHY) += marvell-88x2222.o
65 obj-$(CONFIG_MAXLINEAR_GPHY) += mxl-gpy.o
66 obj-$(CONFIG_MEDIATEK_GE_PHY) += mediatek-ge.o
67 +obj-$(CONFIG_MEDIATEK_GE_SOC_PHY) += mediatek-ge-soc.o
68 obj-$(CONFIG_MESON_GXL_PHY) += meson-gxl.o
69 obj-$(CONFIG_MICREL_KS8995MA) += spi_ks8995.o
70 obj-$(CONFIG_MICREL_PHY) += micrel.o
71 --- a/drivers/net/phy/mediatek-ge.c
72 +++ b/drivers/net/phy/mediatek-ge.c
73 @@ -136,7 +136,8 @@ static struct phy_driver mtk_gephy_drive
74 module_phy_driver(mtk_gephy_driver);
75
76 static struct mdio_device_id __maybe_unused mtk_gephy_tbl[] = {
77 - { PHY_ID_MATCH_VENDOR(0x03a29400) },
78 + { PHY_ID_MATCH_EXACT(0x03a29441) },
79 + { PHY_ID_MATCH_EXACT(0x03a29412) },
80 { }
81 };
82