target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 #include "mt7986a.dtsi"
   7
   8 / {
   9         aliases {
  10                 serial0 = &uart0;
  11                 label-mac-device = &gmac0;
  12                 led-boot = &led_status_green;
  13                 led-failsafe = &led_status_red;
  14                 led-running = &led_status_green;
  15                 led-upgrade = &led_status_red;
  16         };
  17
  18         chosen {
  19                 stdout-path = "serial0:115200n8";
  20         };
  21
  22         memory {
  23                 reg = <0 0x40000000 0 0x20000000>;
  24         };
  25
  26         reg_3p3v: regulator-3p3v {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "fixed-3.3V";
  29                 regulator-min-microvolt = <3300000>;
  30                 regulator-max-microvolt = <3300000>;
  31                 regulator-boot-on;
  32                 regulator-always-on;
  33         };
  34
  35         reg_5v: regulator-5v {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "fixed-5V";
  38                 regulator-min-microvolt = <5000000>;
  39                 regulator-max-microvolt = <5000000>;
  40                 regulator-boot-on;
  41                 regulator-always-on;
  42         };
  43
  44         keys {
  45                 compatible = "gpio-keys";
  46
  47                 reset {
  48                         label = "reset";
  49                         linux,code = <KEY_RESTART>;
  50                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  51                 };
  52
  53                 wps {
  54                         label = "wps";
  55                         linux,code = <KEY_WPS_BUTTON>;
  56                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  57                 };
  58
  59                 turbo {
  60                         label = "turbo";
  61                         linux,code = <BTN_1>;
  62                         gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  63                 };
  64         };
  65
  66         leds {
  67                 compatible = "gpio-leds";
  68
  69                 led_status_red: status_red {
  70                         label = "red:status";
  71                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
  72                 };
  73
  74                 led_status_green: status_green {
  75                         label = "green:status";
  76                         gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
  77                 };
  78
  79                 turbo {
  80                         label = "green:turbo";
  81                         gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  82                 };
  83         };
  84 };
  85
  86 &crypto {
  87         status = "okay";
  88 };
  89
  90 &eth {
  91         status = "okay";
  92
  93         gmac0: mac@0 {
  94                 compatible = "mediatek,eth-mac";
  95                 reg = <0>;
  96                 phy-mode = "2500base-x";
  97
  98                 nvmem-cells = <&macaddr_config_1c>;
  99                 nvmem-cell-names = "mac-address";
 100
 101                 fixed-link {
 102                         speed = <2500>;
 103                         full-duplex;
 104                         pause;
 105                 };
 106         };
 107
 108         gmac1: mac@1 {
 109                 compatible = "mediatek,eth-mac";
 110                 reg = <1>;
 111                 phy-handle = <&phy7>;
 112                 phy-mode = "2500base-x";
 113
 114                 nvmem-cells = <&macaddr_config_1c>;
 115                 nvmem-cell-names = "mac-address";
 116                 mac-address-increment = <1>;
 117         };
 118
 119         mdio: mdio-bus {
 120                 #address-cells = <1>;
 121                 #size-cells = <0>;
 122         };
 123 };
 124
 125 &mdio {
 126         phy5: ethernet-phy@5 {
 127                 compatible = "ethernet-phy-ieee802.3-c45";
 128                 reg = <5>;
 129                 reset-assert-us = <100000>;
 130                 reset-deassert-us = <100000>;
 131                 reset-gpios = <&pio 13 GPIO_ACTIVE_LOW>;
 132                 realtek,aldps-enable;
 133         };
 134
 135         phy7: ethernet-phy@7 {
 136                 compatible = "ethernet-phy-ieee802.3-c45";
 137                 reg = <7>;
 138                 reset-assert-us = <100000>;
 139                 reset-deassert-us = <100000>;
 140                 reset-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
 141                 realtek,aldps-enable;
 142         };
 143
 144         switch: switch@1f {
 145                 compatible = "mediatek,mt7531";
 146                 reg = <31>;
 147                 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 148                 interrupt-controller;
 149                 #interrupt-cells = <1>;
 150                 interrupt-parent = <&pio>;
 151                 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
 152         };
 153 };
 154
 155 &spi0 {
 156         pinctrl-names = "default";
 157         pinctrl-0 = <&spi_flash_pins>;
 158         status = "okay";
 159
 160         flash@0 {
 161                 compatible = "spi-nand";
 162                 #address-cells = <1>;
 163                 #size-cells = <1>;
 164                 reg = <0>;
 165
 166                 spi-max-frequency = <20000000>;
 167                 spi-tx-bus-width = <4>;
 168                 spi-rx-bus-width = <4>;
 169
 170                 partitions {
 171                         compatible = "fixed-partitions";
 172                         #address-cells = <1>;
 173                         #size-cells = <1>;
 174
 175                         partition@0 {
 176                                 label = "bl2";
 177                                 reg = <0x000000 0x0100000>;
 178                                 read-only;
 179                         };
 180
 181                         config: partition@100000 {
 182                                 label = "config";
 183                                 reg = <0x100000 0x0060000>;
 184                                 read-only;
 185
 186                                 nvmem-layout {
 187                                         compatible = "fixed-layout";
 188                                         #address-cells = <1>;
 189                                         #size-cells = <1>;
 190
 191                                         macaddr_config_1c: macaddr@1c {
 192                                                 reg = <0x1c 0x6>;
 193                                         };
 194                                 };
 195                         };
 196
 197                         factory: partition@160000 {
 198                                 label = "factory";
 199                                 reg = <0x160000 0x0060000>;
 200                                 read-only;
 201                         };
 202
 203                         partition@1c0000 {
 204                                 label = "reserved";
 205                                 reg = <0x1c0000 0x01c0000>;
 206                                 read-only;
 207                         };
 208
 209                         partition@380000 {
 210                                 label = "fip";
 211                                 reg = <0x380000 0x0200000>;
 212                                 read-only;
 213                         };
 214
 215                         partition@580000 {
 216                                 label = "ubi";
 217                                 reg = <0x580000 0x7800000>;
 218                         };
 219                 };
 220         };
 221 };
 222
 223 &pio {
 224         spi_flash_pins: spi-flash-pins-33-to-38 {
 225                 mux {
 226                         function = "spi";
 227                         groups = "spi0", "spi0_wp_hold";
 228                 };
 229                 conf-pu {
 230                         pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
 231                         drive-strength = <8>;
 232                         mediatek,pull-up-adv = <0>; /* bias-disable */
 233                 };
 234                 conf-pd {
 235                         pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
 236                         drive-strength = <8>;
 237                         mediatek,pull-down-adv = <0>; /* bias-disable */
 238                 };
 239         };
 240 };
 241
 242 &ssusb {
 243         vusb33-supply = <&reg_3p3v>;
 244         vbus-supply = <&reg_5v>;
 245         status = "okay";
 246 };
 247
 248 &trng {
 249         status = "okay";
 250 };
 251
 252 &uart0 {
 253         status = "okay";
 254 };
 255
 256 &usb_phy {
 257         status = "okay";
 258 };
 259
 260 &watchdog {
 261         status = "okay";
 262 };
 263
 264 &wifi {
 265         mediatek,mtd-eeprom = <&factory 0x0>;
 266         nvmem-cells = <&macaddr_config_1c>;
 267         nvmem-cell-names = "mac-address";
 268         mac-address-increment = <2>;
 269         status = "okay";
 270 };