target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "mt7981.dtsi"
   8
   9 / {
  10         model = "JCG Q30 PRO";
  11         compatible = "jcg,q30-pro", "mediatek,mt7981";
  12
  13         aliases {
  14                 serial0 = &uart0;
  15                 label-mac-device = &gmac0;
  16                 led-boot = &led_status_red;
  17                 led-failsafe = &led_status_red;
  18                 led-running = &led_status_blue;
  19                 led-upgrade = &led_status_blue;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24         };
  25
  26         memory {
  27                 reg = <0 0x40000000 0 0x10000000>;
  28         };
  29
  30         gpio-keys {
  31                 compatible = "gpio-keys";
  32
  33                 reset {
  34                         label = "reset";
  35                         linux,code = <KEY_RESTART>;
  36                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  37                 };
  38         };
  39
  40         leds {
  41                 compatible = "gpio-leds";
  42
  43                 led_status_red: red {
  44                         label = "red:status";
  45                         gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
  46                 };
  47
  48                 led_status_blue: blue {
  49                         label = "blue:status";
  50                         gpios = <&pio 13 GPIO_ACTIVE_LOW>;
  51                 };
  52         };
  53 };
  54
  55 &eth {
  56         status = "okay";
  57
  58         gmac0: mac@0 {
  59                 compatible = "mediatek,eth-mac";
  60                 reg = <0>;
  61                 phy-mode = "2500base-x";
  62
  63                 nvmem-cells = <&macaddr_lan>;
  64                 nvmem-cell-names = "mac-address";
  65
  66                 fixed-link {
  67                         speed = <2500>;
  68                         full-duplex;
  69                         pause;
  70                 };
  71         };
  72 };
  73
  74 &mdio_bus {
  75         switch: switch@0 {
  76                 compatible = "mediatek,mt7531";
  77                 reg = <31>;
  78                 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
  79                 interrupt-controller;
  80                 #interrupt-cells = <1>;
  81                 interrupt-parent = <&pio>;
  82                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
  83         };
  84 };
  85
  86 &spi0 {
  87         pinctrl-names = "default";
  88         pinctrl-0 = <&spi0_flash_pins>;
  89         status = "okay";
  90
  91         spi_nand@0 {
  92                 compatible = "spi-nand";
  93                 #address-cells = <1>;
  94                 #size-cells = <1>;
  95                 reg = <0>;
  96
  97                 spi-max-frequency = <52000000>;
  98                 spi-tx-bus-width = <4>;
  99                 spi-rx-bus-width = <4>;
 100
 101                 partitions {
 102                         compatible = "fixed-partitions";
 103                         #address-cells = <1>;
 104                         #size-cells = <1>;
 105
 106                         partition@0 {
 107                                 label = "bl2";
 108                                 reg = <0x0000000 0x0100000>;
 109                                 read-only;
 110                         };
 111
 112                         partition@100000 {
 113                                 label = "u-boot-env";
 114                                 reg = <0x0100000 0x0080000>;
 115                         };
 116
 117                         factory: partition@180000 {
 118                                 label = "Factory";
 119                                 reg = <0x0180000 0x0200000>;
 120                                 read-only;
 121                         };
 122
 123                         partition@380000 {
 124                                 label = "fip";
 125                                 reg = <0x0380000 0x0200000>;
 126                                 read-only;
 127                         };
 128
 129                         partition@580000 {
 130                                 label = "ubi";
 131                                 reg = <0x0580000 0x7000000>;
 132                         };
 133                 };
 134         };
 135 };
 136
 137 &switch {
 138         ports {
 139                 #address-cells = <1>;
 140                 #size-cells = <0>;
 141
 142                 port@0 {
 143                         reg = <0>;
 144                         label = "wan";
 145                         nvmem-cells = <&macaddr_wan>;
 146                         nvmem-cell-names = "mac-address";
 147                 };
 148
 149                 port@1 {
 150                         reg = <1>;
 151                         label = "lan1";
 152                 };
 153
 154                 port@2 {
 155                         reg = <2>;
 156                         label = "lan2";
 157                 };
 158
 159                 port@3 {
 160                         reg = <3>;
 161                         label = "lan3";
 162                 };
 163
 164                 port@6 {
 165                         reg = <6>;
 166                         ethernet = <&gmac0>;
 167                         phy-mode = "2500base-x";
 168
 169                         fixed-link {
 170                                 speed = <2500>;
 171                                 full-duplex;
 172                                 pause;
 173                         };
 174                 };
 175         };
 176 };
 177
 178 &pio {
 179         spi0_flash_pins: spi0-pins {
 180                 mux {
 181                         function = "spi";
 182                         groups = "spi0", "spi0_wp_hold";
 183                 };
 184
 185                 conf-pu {
 186                         pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
 187                         drive-strength = <8>;
 188                         mediatek,pull-up-adv = <0>; /* bias-disable */
 189                 };
 190
 191                 conf-pd {
 192                         pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
 193                         drive-strength = <8>;
 194                         mediatek,pull-up-adv = <0>; /* bias-disable */
 195                 };
 196         };
 197 };
 198
 199 &uart0 {
 200         status = "okay";
 201 };
 202
 203 &watchdog {
 204         status = "okay";
 205 };
 206
 207 &wifi {
 208         status = "okay";
 209
 210         mediatek,mtd-eeprom = <&factory 0x0>;
 211 };
 212
 213 &factory {
 214         compatible = "nvmem-cells";
 215         #address-cells = <1>;
 216         #size-cells = <1>;
 217
 218         macaddr_wan: macaddr@a0024 {
 219                 reg = <0xa0024 0x6>;
 220         };
 221
 222         macaddr_lan: macaddr@a002a {
 223                 reg = <0xa002a 0x6>;
 224         };
 225 };