mediatek: use mac-base
[openwrt/staging/hauke.git] / target / linux / mediatek / dts / mt7981b-glinet-gl-mt3000.dts
1 /dts-v1/;
2
3 #include "mt7981.dtsi"
4
5 / {
6 model = "GL.iNet GL-MT3000";
7 compatible = "glinet,gl-mt3000", "mediatek,mt7981";
8
9 aliases {
10 label-mac-device = &gmac0;
11 led-boot = &led_lightblue;
12 led-failsafe = &led_lightblue;
13 led-running = &led_white;
14 led-upgrade = &led_lightblue;
15 serial0 = &uart0;
16 };
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
21
22 gpio-keys {
23 compatible = "gpio-keys";
24
25 reset {
26 label = "reset";
27 linux,code = <KEY_RESTART>;
28 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
29 };
30
31 mode {
32 label = "mode";
33 linux,input-type = <EV_SW>;
34 linux,code = <BTN_0>;
35 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
36 debounce-interval = <60>;
37 };
38 };
39
40 leds {
41 compatible = "gpio-leds";
42
43 led_lightblue: led@0 {
44 label = "blue:run";
45 gpios = <&pio 31 GPIO_ACTIVE_LOW>;
46 };
47
48 led_white: led@1 {
49 label = "white:system";
50 gpios = <&pio 30 GPIO_ACTIVE_LOW>;
51 };
52 };
53
54 fan_5v: regulator-fan-5v {
55 compatible = "regulator-fixed";
56 regulator-name = "fan";
57 regulator-min-microvolt = <5000000>;
58 regulator-max-microvolt = <5000000>;
59 gpio = <&pio 28 GPIO_ACTIVE_HIGH>;
60 enable-active-high;
61 regulator-boot-on;
62 };
63
64 usb_vbus: regulator-usb-vbus {
65 compatible = "regulator-fixed";
66 regulator-name = "usb_vbus";
67 regulator-min-microvolt = <5000000>;
68 regulator-max-microvolt = <5000000>;
69 gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
70 enable-active-high;
71 regulator-boot-on;
72 };
73 };
74
75 &uart0 {
76 status = "okay";
77 };
78
79 &watchdog {
80 status = "okay";
81 };
82
83 &eth {
84 pinctrl-names = "default";
85 pinctrl-0 = <&mdio_pins>;
86
87 status = "okay";
88
89 gmac0: mac@0 {
90 compatible = "mediatek,eth-mac";
91 reg = <0>;
92 phy-mode = "2500base-x";
93 phy-handle = <&phy0>;
94 nvmem-cells = <&macaddr 0>;
95 nvmem-cell-names = "mac-address";
96 };
97
98 gmac1: mac@1 {
99 compatible = "mediatek,eth-mac";
100 reg = <1>;
101 phy-mode = "gmii";
102 phy-handle = <&int_gbe_phy>;
103 nvmem-cells = <&macaddr 1>;
104 nvmem-cell-names = "mac-address";
105 };
106 };
107
108 &mdio_bus {
109 reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
110 reset-delay-us = <600>;
111 reset-post-delay-us = <20000>;
112
113 phy0: ethernet-phy@5 {
114 reg = <5>;
115 compatible = "ethernet-phy-ieee802.3-c45";
116 phy-mode = "2500base-x";
117 };
118 };
119
120 &pwm {
121 pinctrl-names = "default";
122 pinctrl-0 = <&pwm_pins>;
123
124 status = "okay";
125 };
126
127 &fan {
128 pwms = <&pwm 0 40000 0>;
129 fan-supply = <&fan_5v>;
130 interrupt-parent = <&pio>;
131 interrupts = <29 IRQ_TYPE_EDGE_RISING>;
132 status = "okay";
133 };
134
135 &spi0 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&spi0_flash_pins>;
138 status = "okay";
139
140 spi_nand: flash@0 {
141 #address-cells = <1>;
142 #size-cells = <1>;
143 compatible = "spi-nand";
144 reg = <0>;
145 spi-max-frequency = <52000000>;
146
147 spi-cal-enable;
148 spi-cal-mode = "read-data";
149 spi-cal-datalen = <7>;
150 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
151 spi-cal-addrlen = <5>;
152 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
153
154 spi-tx-bus-width = <4>;
155 spi-rx-bus-width = <4>;
156 mediatek,nmbm;
157 mediatek,bmt-max-ratio = <1>;
158 mediatek,bmt-max-reserved-blocks = <64>;
159
160 partitions {
161 compatible = "fixed-partitions";
162 #address-cells = <1>;
163 #size-cells = <1>;
164
165 partition@0 {
166 label = "BL2";
167 reg = <0x00000 0x0100000>;
168 read-only;
169 };
170
171 partition@100000 {
172 label = "u-boot-env";
173 reg = <0x0100000 0x0080000>;
174 };
175
176 factory: partition@180000 {
177 label = "Factory";
178 reg = <0x180000 0x0200000>;
179 read-only;
180
181 nvmem-layout {
182 compatible = "fixed-layout";
183 #address-cells = <1>;
184 #size-cells = <1>;
185
186 macaddr: macaddr@a {
187 compatible = "mac-base";
188 reg = <0xa 0x6>;
189 #nvmem-cell-cells = <1>;
190 };
191 };
192 };
193
194 partition@380000 {
195 label = "FIP";
196 reg = <0x380000 0x0200000>;
197 read-only;
198 };
199
200 partition@580000 {
201 label = "log";
202 reg = <0x580000 0x0040000>;
203 };
204
205 partition@5c0000 {
206 label = "ubi";
207 reg = <0x5c0000 0xf640000>;
208 compatible = "linux,ubi";
209 };
210 };
211 };
212 };
213
214 &pio {
215 spi0_flash_pins: spi0-pins {
216 mux {
217 function = "spi";
218 groups = "spi0", "spi0_wp_hold";
219 };
220 };
221
222 pwm_pins: pwm0-pins {
223 mux {
224 function = "pwm";
225 groups = "pwm0_1";
226 };
227 };
228 };
229
230 &usb_phy {
231 status = "okay";
232 };
233
234 &xhci {
235 vbus-supply = <&usb_vbus>;
236
237 status = "okay";
238 };
239
240 &wifi {
241 mediatek,mtd-eeprom = <&factory 0x0>;
242
243 status = "okay";
244 };