target/linux/layerscape/patches-5.4/812-pcie-0010-PCI-mobiveil-Make-mobiveil_host_init-can-be-used-to-.patch

   1 From d4bb5e0d43909758046c527d883405f556de85fa Mon Sep 17 00:00:00 2001
   2 From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
   3 Date: Tue, 25 Jun 2019 09:09:14 +0000
   4 Subject: [PATCH] PCI: mobiveil: Make mobiveil_host_init() can be used to
   5  re-init host
   6
   7 Make the mobiveil_host_init() function can be used to re-init
   8 host controller's PAB and GPEX CSR register block, as NXP
   9 integrated Mobiveil IP has to reset and then re-init the PAB
  10 and GPEX CSR registers upon hot-reset.
  11
  12 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
  13 Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
  14 ---
  15  .../pci/controller/mobiveil/pcie-mobiveil-host.c   | 43 +++++++++++-----------
  16  drivers/pci/controller/mobiveil/pcie-mobiveil.h    |  3 +-
  17  2 files changed, 24 insertions(+), 22 deletions(-)
  18
  19 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
  20 +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
  21 @@ -215,16 +215,21 @@ static void mobiveil_pcie_enable_msi(str
  22         writel_relaxed(1, pcie->apb_csr_base + MSI_ENABLE_OFFSET);
  23  }
  24
  25 -static int mobiveil_host_init(struct mobiveil_pcie *pcie)
  26 +int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit)
  27  {
  28         u32 value, pab_ctrl, type;
  29         struct resource_entry *win;
  30
  31 -       /* setup bus numbers */
  32 -       value = csr_readl(pcie, PCI_PRIMARY_BUS);
  33 -       value &= 0xff000000;
  34 -       value |= 0x00ff0100;
  35 -       csr_writel(pcie, value, PCI_PRIMARY_BUS);
  36 +       pcie->ib_wins_configured = 0;
  37 +       pcie->ob_wins_configured = 0;
  38 +
  39 +       if (!reinit) {
  40 +               /* setup bus numbers */
  41 +               value = csr_readl(pcie, PCI_PRIMARY_BUS);
  42 +               value &= 0xff000000;
  43 +               value |= 0x00ff0100;
  44 +               csr_writel(pcie, value, PCI_PRIMARY_BUS);
  45 +       }
  46
  47         /*
  48          * program Bus Master Enable Bit in Command Register in PAB Config
  49 @@ -270,7 +275,7 @@ static int mobiveil_host_init(struct mob
  50         program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
  51
  52         /* Get the I/O and memory ranges from DT */
  53 -       resource_list_for_each_entry(win, &pcie->resources) {
  54 +       resource_list_for_each_entry(win, pcie->resources) {
  55                 if (resource_type(win->res) == IORESOURCE_MEM) {
  56                         type = MEM_WINDOW_TYPE;
  57                 } else if (resource_type(win->res) == IORESOURCE_IO) {
  58 @@ -541,8 +546,6 @@ int mobiveil_pcie_host_probe(struct mobi
  59         resource_size_t iobase;
  60         int ret;
  61
  62 -       INIT_LIST_HEAD(&pcie->resources);
  63 -
  64         ret = mobiveil_pcie_parse_dt(pcie);
  65         if (ret) {
  66                 dev_err(dev, "Parsing DT failed, ret: %x\n", ret);
  67 @@ -551,34 +554,35 @@ int mobiveil_pcie_host_probe(struct mobi
  68
  69         /* parse the host bridge base addresses from the device tree file */
  70         ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
  71 -                                                   &pcie->resources, &iobase);
  72 +                                                   &bridge->windows, &iobase);
  73         if (ret) {
  74                 dev_err(dev, "Getting bridge resources failed\n");
  75                 return ret;
  76         }
  77
  78 +       pcie->resources = &bridge->windows;
  79 +
  80         /*
  81          * configure all inbound and outbound windows and prepare the RC for
  82          * config access
  83          */
  84 -       ret = mobiveil_host_init(pcie);
  85 +       ret = mobiveil_host_init(pcie, false);
  86         if (ret) {
  87                 dev_err(dev, "Failed to initialize host\n");
  88 -               goto error;
  89 +               return ret;
  90         }
  91
  92         ret = mobiveil_pcie_interrupt_init(pcie);
  93         if (ret) {
  94                 dev_err(dev, "Interrupt init failed\n");
  95 -               goto error;
  96 +               return ret;
  97         }
  98
  99 -       ret = devm_request_pci_bus_resources(dev, &pcie->resources);
 100 +       ret = devm_request_pci_bus_resources(dev, pcie->resources);
 101         if (ret)
 102 -               goto error;
 103 +               return ret;
 104
 105         /* Initialize bridge */
 106 -       list_splice_init(&pcie->resources, &bridge->windows);
 107         bridge->dev.parent = dev;
 108         bridge->sysdata = pcie;
 109         bridge->busnr = pcie->rp.root_bus_nr;
 110 @@ -589,13 +593,13 @@ int mobiveil_pcie_host_probe(struct mobi
 111         ret = mobiveil_bringup_link(pcie);
 112         if (ret) {
 113                 dev_info(dev, "link bring-up failed\n");
 114 -               goto error;
 115 +               return ret;
 116         }
 117
 118         /* setup the kernel resources for the newly added PCIe root bus */
 119         ret = pci_scan_root_bus_bridge(bridge);
 120         if (ret)
 121 -               goto error;
 122 +               return ret;
 123
 124         bus = bridge->bus;
 125
 126 @@ -605,7 +609,4 @@ int mobiveil_pcie_host_probe(struct mobi
 127         pci_bus_add_devices(bus);
 128
 129         return 0;
 130 -error:
 131 -       pci_free_resource_list(&pcie->resources);
 132 -       return ret;
 133  }
 134 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
 135 +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
 136 @@ -153,7 +153,7 @@ struct mobiveil_pab_ops {
 137
 138  struct mobiveil_pcie {
 139         struct platform_device *pdev;
 140 -       struct list_head resources;
 141 +       struct list_head *resources;
 142         void __iomem *csr_axi_slave_base;       /* PAB registers base */
 143         phys_addr_t pcie_reg_base;      /* Physical PCIe Controller Base */
 144         void __iomem *apb_csr_base;     /* MSI register base */
 145 @@ -167,6 +167,7 @@ struct mobiveil_pcie {
 146  };
 147
 148  int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie);
 149 +int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit);
 150  bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie);
 151  int mobiveil_bringup_link(struct mobiveil_pcie *pcie);
 152  void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr,