target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts

   1 #include "qcom-ipq8064-v2.0.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         model = "TP-Link Archer VR2600v";
   7         compatible = "tplink,vr2600v", "qcom,ipq8064";
   8
   9         memory@0 {
  10                 reg = <0x42000000 0x1e000000>;
  11                 device_type = "memory";
  12         };
  13
  14         aliases {
  15                 mdio-gpio0 = &mdio0;
  16
  17                 led-boot = &power;
  18                 led-failsafe = &general;
  19                 led-running = &power;
  20                 led-upgrade = &general;
  21         };
  22
  23         keys {
  24                 compatible = "gpio-keys";
  25                 pinctrl-0 = <&button_pins>;
  26                 pinctrl-names = "default";
  27
  28                 wifi {
  29                         label = "wifi";
  30                         gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_RFKILL>;
  32                         debounce-interval = <60>;
  33                         wakeup-source;
  34                 };
  35
  36                 reset {
  37                         label = "reset";
  38                         gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
  39                         linux,code = <KEY_RESTART>;
  40                         debounce-interval = <60>;
  41                         wakeup-source;
  42                 };
  43
  44                 wps {
  45                         label = "wps";
  46                         gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  47                         linux,code = <KEY_WPS_BUTTON>;
  48                         debounce-interval = <60>;
  49                         wakeup-source;
  50                 };
  51
  52                 dect {
  53                         label = "dect";
  54                         gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
  55                         linux,code = <KEY_PHONE>;
  56                         debounce-interval = <60>;
  57                         wakeup-source;
  58                 };
  59
  60                 ledswitch {
  61                         label = "ledswitch";
  62                         gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
  63                         linux,code = <KEY_LIGHTS_TOGGLE>;
  64                         debounce-interval = <60>;
  65                         wakeup-source;
  66                 };
  67         };
  68
  69         leds {
  70                 compatible = "gpio-leds";
  71                 pinctrl-0 = <&led_pins>;
  72                 pinctrl-names = "default";
  73
  74                 dsl {
  75                         label = "white:dsl";
  76                         gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  77                 };
  78
  79                 usb {
  80                         label = "white:usb";
  81                         gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  82                 };
  83
  84                 lan {
  85                         label = "white:lan";
  86                         gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  87                 };
  88
  89                 wlan2g {
  90                         label = "white:wlan2g";
  91                         gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
  92                 };
  93
  94                 wlan5g {
  95                         label = "white:wlan5g";
  96                         gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
  97                 };
  98
  99                 power: power {
 100                         label = "white:power";
 101                         gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
 102                         default-state = "keep";
 103                 };
 104
 105                 phone {
 106                         label = "white:phone";
 107                         gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
 108                 };
 109
 110                 wan {
 111                         label = "white:wan";
 112                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
 113                 };
 114
 115                 general: general {
 116                         label = "white:general";
 117                         gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
 118                 };
 119         };
 120 };
 121
 122 &qcom_pinmux {
 123         led_pins: led_pins {
 124                 mux {
 125                         pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17",
 126                                 "gpio26", "gpio53", "gpio56", "gpio66";
 127                         function = "gpio";
 128                         drive-strength = <2>;
 129                         bias-pull-up;
 130                 };
 131         };
 132
 133         button_pins: button_pins {
 134                 mux {
 135                         pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68";
 136                         function = "gpio";
 137                         drive-strength = <2>;
 138                         bias-pull-up;
 139                 };
 140         };
 141
 142         spi_pins: spi_pins {
 143                 mux {
 144                         pins = "gpio18", "gpio19", "gpio21";
 145                         function = "gsbi5";
 146                         bias-pull-down;
 147                 };
 148
 149                 data {
 150                         pins = "gpio18", "gpio19";
 151                         drive-strength = <10>;
 152                 };
 153
 154                 cs {
 155                         pins = "gpio20";
 156                         drive-strength = <10>;
 157                         bias-pull-up;
 158                 };
 159
 160                 clk {
 161                         pins = "gpio21";
 162                         drive-strength = <12>;
 163                 };
 164         };
 165 };
 166
 167 &gsbi5 {
 168         qcom,mode = <GSBI_PROT_SPI>;
 169         status = "okay";
 170
 171         spi4: spi@1a280000 {
 172                 status = "okay";
 173
 174                 pinctrl-0 = <&spi_pins>;
 175                 pinctrl-names = "default";
 176
 177                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 178
 179                 flash@0 {
 180                         compatible = "jedec,spi-nor";
 181                         #address-cells = <1>;
 182                         #size-cells = <1>;
 183                         spi-max-frequency = <50000000>;
 184                         reg = <0>;
 185
 186                         partitions {
 187                                 compatible = "fixed-partitions";
 188                                 #address-cells = <1>;
 189                                 #size-cells = <1>;
 190
 191                                 partition@0 {
 192                                         label = "SBL1";
 193                                         reg = <0x0 0x20000>;
 194                                         read-only;
 195                                 };
 196
 197                                 partition@20000 {
 198                                         label = "MIBIB";
 199                                         reg = <0x20000 0x20000>;
 200                                         read-only;
 201                                 };
 202
 203                                 partition@40000 {
 204                                         label = "SBL2";
 205                                         reg = <0x40000 0x40000>;
 206                                         read-only;
 207                                 };
 208
 209                                 partition@80000 {
 210                                         label = "SBL3";
 211                                         reg = <0x80000 0x80000>;
 212                                         read-only;
 213                                 };
 214
 215                                 partition@100000 {
 216                                         label = "DDRCONFIG";
 217                                         reg = <0x100000 0x10000>;
 218                                         read-only;
 219                                 };
 220
 221                                 partition@110000 {
 222                                         label = "SSD";
 223                                         reg = <0x110000 0x10000>;
 224                                         read-only;
 225                                 };
 226
 227                                 partition@120000 {
 228                                         label = "TZ";
 229                                         reg = <0x120000 0x80000>;
 230                                         read-only;
 231                                 };
 232
 233                                 partition@1a0000 {
 234                                         label = "RPM";
 235                                         reg = <0x1a0000 0x80000>;
 236                                         read-only;
 237                                 };
 238
 239                                 partition@220000 {
 240                                         label = "APPSBL";
 241                                         reg = <0x220000 0x80000>;
 242                                         read-only;
 243                                 };
 244
 245                                 partition@2a0000 {
 246                                         label = "APPSBLENV";
 247                                         reg = <0x2a0000 0x40000>;
 248                                         read-only;
 249                                 };
 250
 251                                 partition@2e0000 {
 252                                         label = "OLDART";
 253                                         reg = <0x2e0000 0x40000>;
 254                                         read-only;
 255                                 };
 256
 257                                 partition@320000 {
 258                                         label = "firmware";
 259                                         reg = <0x320000 0xc60000>;
 260                                         compatible = "denx,uimage";
 261                                 };
 262
 263                                 /* hole 0xf80000 - 0xfaf100 */
 264
 265                                 partition@faf100 {
 266                                         label = "default-mac";
 267                                         reg = <0xfaf100 0x00200>;
 268                                         read-only;
 269
 270                                         compatible = "nvmem-cells";
 271                                         #address-cells = <1>;
 272                                         #size-cells = <1>;
 273
 274                                         macaddr_defaultmac_0: macaddr@0 {
 275                                                 reg = <0x0 0x6>;
 276                                         };
 277                                 };
 278
 279                                 partition@fc0000 {
 280                                         label = "ART";
 281                                         reg = <0xfc0000 0x40000>;
 282                                         read-only;
 283
 284                                         compatible = "nvmem-cells";
 285                                         #address-cells = <1>;
 286                                         #size-cells = <1>;
 287
 288                                         precal_ART_1000: precal@1000 {
 289                                                 reg = <0x1000 0x2f20>;
 290                                         };
 291
 292                                         precal_ART_5000: precal@5000 {
 293                                                 reg = <0x5000 0x2f20>;
 294                                         };
 295                                 };
 296                         };
 297                 };
 298         };
 299 };
 300
 301 &usb3_0 {
 302         status = "okay";
 303 };
 304
 305 &usb3_1 {
 306         status = "okay";
 307 };
 308
 309 &pcie0 {
 310         status = "okay";
 311
 312         bridge@0,0 {
 313                 reg = <0x00000000 0 0 0 0>;
 314                 #address-cells = <3>;
 315                 #size-cells = <2>;
 316                 ranges;
 317
 318                 wifi@1,0 {
 319                         compatible = "pci168c,0040";
 320                         reg = <0x00010000 0 0 0 0>;
 321
 322                         nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_1000>;
 323                         nvmem-cell-names = "mac-address", "pre-calibration";
 324                         mac-address-increment = <(-1)>;
 325                 };
 326         };
 327 };
 328
 329 &pcie1 {
 330         status = "okay";
 331         max-link-speed = <1>;
 332
 333         bridge@0,0 {
 334                 reg = <0x00000000 0 0 0 0>;
 335                 #address-cells = <3>;
 336                 #size-cells = <2>;
 337                 ranges;
 338
 339                 wifi@1,0 {
 340                         compatible = "pci168c,0040";
 341                         reg = <0x00010000 0 0 0 0>;
 342
 343                         nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_5000>;
 344                         nvmem-cell-names = "mac-address", "pre-calibration";
 345                 };
 346         };
 347 };
 348
 349 &mdio0 {
 350         status = "okay";
 351
 352         pinctrl-0 = <&mdio0_pins>;
 353         pinctrl-names = "default";
 354
 355         phy0: ethernet-phy@0 {
 356                 reg = <0>;
 357                 qca,ar8327-initvals = <
 358                         0x00004 0x7600000   /* PAD0_MODE */
 359                         0x00008 0x1000000   /* PAD5_MODE */
 360                         0x0000c 0x80        /* PAD6_MODE */
 361                         0x000e4 0x6a545     /* MAC_POWER_SEL */
 362                         0x000e0 0xc74164de  /* SGMII_CTRL */
 363                         0x0007c 0x4e        /* PORT0_STATUS */
 364                         0x00094 0x4e        /* PORT6_STATUS */
 365                         >;
 366         };
 367
 368         phy4: ethernet-phy@4 {
 369                 reg = <4>;
 370         };
 371 };
 372
 373 &gmac1 {
 374         status = "okay";
 375         phy-mode = "rgmii";
 376         qcom,id = <1>;
 377
 378         pinctrl-0 = <&rgmii2_pins>;
 379         pinctrl-names = "default";
 380
 381         nvmem-cells = <&macaddr_defaultmac_0>;
 382         nvmem-cell-names = "mac-address";
 383         mac-address-increment = <1>;
 384
 385         fixed-link {
 386                 speed = <1000>;
 387                 full-duplex;
 388         };
 389 };
 390
 391 &gmac2 {
 392         status = "okay";
 393         phy-mode = "sgmii";
 394         qcom,id = <2>;
 395
 396         nvmem-cells = <&macaddr_defaultmac_0>;
 397         nvmem-cell-names = "mac-address";
 398
 399         fixed-link {
 400                 speed = <1000>;
 401                 full-duplex;
 402         };
 403 };
 404
 405 &adm_dma {
 406         status = "okay";
 407 };