target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "GL.iNet GL-S1300";
  10         compatible = "glinet,gl-s1300";
  11
  12         aliases {
  13                 led-boot = &led_power;
  14                 led-failsafe = &led_power;
  15                 led-running = &led_power;
  16                 led-upgrade = &led_power;
  17         };
  18
  19         memory {
  20                 device_type = "memory";
  21                 reg = <0x80000000 0x10000000>;
  22         };
  23
  24         soc {
  25                 rng@22000 {
  26                         status = "okay";
  27                 };
  28
  29                 mdio@90000 {
  30                         status = "okay";
  31                 };
  32
  33                 tcsr@1949000 {
  34                         compatible = "qcom,tcsr";
  35                         reg = <0x1949000 0x100>;
  36                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  37                 };
  38
  39                 tcsr@194b000 {
  40                         /* select hostmode */
  41                         compatible = "qcom,tcsr";
  42                         reg = <0x194b000 0x100>;
  43                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  44                         status = "okay";
  45                 };
  46
  47                 ess_tcsr@1953000 {
  48                         compatible = "qcom,tcsr";
  49                         reg = <0x1953000 0x1000>;
  50                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  51                 };
  52
  53                 tcsr@1957000 {
  54                         compatible = "qcom,tcsr";
  55                         reg = <0x1957000 0x100>;
  56                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  57                 };
  58
  59                 usb2@60f8800 {
  60                         status = "okay";
  61                 };
  62
  63                 usb3@8af8800 {
  64                         status = "okay";
  65                 };
  66
  67                 crypto@8e3a000 {
  68                         status = "okay";
  69                 };
  70
  71                 watchdog@b017000 {
  72                         status = "okay";
  73                 };
  74         };
  75
  76         keys {
  77                 compatible = "gpio-keys";
  78
  79                 wps {
  80                         label = "wps";
  81                         gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
  82                         linux,code = <KEY_WPS_BUTTON>;
  83                 };
  84
  85                 reset {
  86                         label = "reset";
  87                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  88                         linux,code = <KEY_RESTART>;
  89                 };
  90         };
  91
  92         leds {
  93                 compatible = "gpio-leds";
  94
  95                 led_power: power {
  96                         label = "green:power";
  97                         gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
  98                         default-state = "on";
  99                 };
 100
 101                 mesh {
 102                         label = "green:mesh";
 103                         gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
 104                 };
 105
 106                 wlan {
 107                         label = "green:wlan";
 108                         gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
 109                         linux,default-trigger = "phy0tpt";
 110                 };
 111         };
 112 };
 113
 114 &vqmmc {
 115         status = "okay";
 116 };
 117
 118 &sdhci {
 119         status = "okay";
 120         pinctrl-0 = <&sd_pins>;
 121         pinctrl-names = "default";
 122         cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
 123         vqmmc-supply = <&vqmmc>;
 124 };
 125
 126 &blsp_dma {
 127         status = "okay";
 128 };
 129
 130 &cryptobam {
 131         status = "okay";
 132 };
 133
 134 &blsp1_spi1 {
 135         pinctrl-0 = <&spi_0_pins>;
 136         pinctrl-names = "default";
 137         status = "okay";
 138         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 139
 140         flash@0 {
 141                 compatible = "jedec,spi-nor";
 142                 reg = <0>;
 143                 spi-max-frequency = <24000000>;
 144
 145                 partitions {
 146                         compatible = "fixed-partitions";
 147                         #address-cells = <1>;
 148                         #size-cells = <1>;
 149
 150                         SBL1@0 {
 151                                 label = "SBL1";
 152                                 reg = <0x0 0x40000>;
 153                                 read-only;
 154                         };
 155
 156                         MIBIB@40000 {
 157                                 label = "MIBIB";
 158                                 reg = <0x40000 0x20000>;
 159                                 read-only;
 160                         };
 161
 162                         QSEE@60000 {
 163                                 label = "QSEE";
 164                                 reg = <0x60000 0x60000>;
 165                                 read-only;
 166                         };
 167
 168                         CDT@c0000 {
 169                                 label = "CDT";
 170                                 reg = <0xc0000 0x10000>;
 171                                 read-only;
 172                         };
 173
 174                         DDRPARAMS@d0000 {
 175                                 label = "DDRPARAMS";
 176                                 reg = <0xd0000 0x10000>;
 177                                 read-only;
 178                         };
 179
 180                         APPSBLENV@e0000 {
 181                                 label = "APPSBLENV";
 182                                 reg = <0xe0000 0x10000>;
 183                                 read-only;
 184                         };
 185
 186                         APPSBL@f0000 {
 187                                 label = "APPSBL";
 188                                 reg = <0xf0000 0x80000>;
 189                                 read-only;
 190                         };
 191
 192                         ART@170000 {
 193                                 label = "ART";
 194                                 reg = <0x170000 0x10000>;
 195                                 read-only;
 196                                 compatible = "nvmem-cells";
 197                                 #address-cells = <1>;
 198                                 #size-cells = <1>;
 199
 200                                 precal_art_1000: precal@1000 {
 201                                         reg = <0x1000 0x2f20>;
 202                                 };
 203
 204                                 precal_art_5000: precal@5000 {
 205                                         reg = <0x5000 0x2f20>;
 206                                 };
 207                         };
 208
 209                         firmware@180000 {
 210                                 compatible = "denx,fit";
 211                                 label = "firmware";
 212                                 reg = <0x180000 0xe80000>;
 213                         };
 214                 };
 215         };
 216 };
 217
 218 &blsp1_spi2 {
 219         pinctrl-0 = <&spi_1_pins>;
 220         pinctrl-names = "default";
 221         status = "okay";
 222
 223         spidev1: spi@0 {
 224                 compatible = "silabs,si3210";
 225                 reg = <0>;
 226                 spi-max-frequency = <24000000>;
 227         };
 228 };
 229
 230 &blsp1_uart1 {
 231         pinctrl-0 = <&serial_pins>;
 232         pinctrl-names = "default";
 233         status = "okay";
 234 };
 235
 236 &blsp1_uart2 {
 237         pinctrl-0 = <&serial_1_pins>;
 238         pinctrl-names = "default";
 239         status = "okay";
 240 };
 241
 242 &tlmm {
 243         serial_pins: serial_pinmux {
 244                 mux {
 245                         pins = "gpio16", "gpio17";
 246                         function = "blsp_uart0";
 247                         bias-disable;
 248                 };
 249         };
 250
 251         serial_1_pins: serial1_pinmux {
 252                 mux {
 253                         pins = "gpio8", "gpio9",
 254                                 "gpio10", "gpio11";
 255                         function = "blsp_uart1";
 256                         bias-disable;
 257                 };
 258         };
 259
 260         spi_0_pins: spi_0_pinmux {
 261                 pinmux {
 262                         function = "blsp_spi0";
 263                         pins = "gpio13", "gpio14", "gpio15";
 264                 };
 265                 pinmux_cs {
 266                         function = "gpio";
 267                         pins = "gpio12";
 268                 };
 269                 pinconf {
 270                         pins = "gpio13", "gpio14", "gpio15";
 271                         drive-strength = <12>;
 272                         bias-disable;
 273                 };
 274                 pinconf_cs {
 275                         pins = "gpio12";
 276                         drive-strength = <2>;
 277                         bias-disable;
 278                         output-high;
 279                 };
 280         };
 281
 282         spi_1_pins: spi_1_pinmux {
 283                 mux {
 284                         pins = "gpio44", "gpio46", "gpio47";
 285                         function = "blsp_spi1";
 286                         bias-disable;
 287                 };
 288                 host_int {
 289                         pins = "gpio42";
 290                         function = "gpio";
 291                         input;
 292                 };
 293                 cs {
 294                         pins = "gpio45";
 295                         function = "gpio";
 296                         bias-pull-up;
 297                 };
 298                 wake {
 299                         pins = "gpio40";
 300                         function = "gpio";
 301                         output-high;
 302                 };
 303                 reset {
 304                         pins = "gpio49";
 305                         function = "gpio";
 306                         output-high;
 307                 };
 308         };
 309
 310         sd_pins: sd_pins {
 311                 pinmux {
 312                         function = "sdio";
 313                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 314                                 "gpio28", "gpio29", "gpio30", "gpio31";
 315                         drive-strength = <10>;
 316                 };
 317
 318                 pinmux_sd_clk {
 319                         function = "sdio";
 320                         pins = "gpio27";
 321                         drive-strength = <16>;
 322                 };
 323
 324                 pinmux_sd7 {
 325                         function = "sdio";
 326                         pins = "gpio32";
 327                         drive-strength = <10>;
 328                         bias-disable;
 329                 };
 330         };
 331 };
 332
 333 &usb2_hs_phy {
 334         status = "okay";
 335 };
 336
 337 &usb3_hs_phy {
 338         status = "okay";
 339 };
 340
 341 &usb3_ss_phy {
 342         status = "okay";
 343 };
 344
 345 &wifi0 {
 346         status = "okay";
 347         nvmem-cell-names = "pre-calibration";
 348         nvmem-cells = <&precal_art_1000>;
 349         qcom,ath10k-calibration-variant = "GL-S1300";
 350 };
 351
 352 &wifi1 {
 353         status = "okay";
 354         nvmem-cell-names = "pre-calibration";
 355         nvmem-cells = <&precal_art_5000>;
 356         qcom,ath10k-calibration-variant = "GL-S1300";
 357 };