ipq40xx: convert to nvmem-layout
[openwrt/staging/hauke.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-wpj419.dts
1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 * Copyright (c) 2019, Nguyen Dinh Phi <phi_nguyen@compex.com.sg>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 *
16 */
17
18 #include "qcom-ipq4019.dtsi"
19 #include <dt-bindings/gpio/gpio.h>
20 #include <dt-bindings/input/input.h>
21 #include <dt-bindings/soc/qcom,tcsr.h>
22
23 / {
24 model = "Compex WPJ419";
25 compatible = "compex,wpj419", "qcom,ipq4019";
26
27 memory {
28 device_type = "memory";
29 reg = <0x80000000 0x10000000>;
30 };
31
32 reserved-memory {
33 ranges;
34 rsvd1@87000000 {
35 /* Reserved for other subsystem */
36 reg = <0x87000000 0x500000>;
37 no-map;
38 };
39 wifi_dump@87500000 {
40 reg = <0x87500000 0x600000>;
41 no-map;
42 };
43
44 rsvd2@87B00000 {
45 /* Reserved for other subsystem */
46 reg = <0x87B00000 0x500000>;
47 no-map;
48 };
49 };
50
51 chosen {
52 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
53 };
54
55 soc {
56 pinctrl@1000000 {
57 mdio_pins: mdio_pinmux {
58 mux_1 {
59 pins = "gpio6";
60 function = "mdio";
61 bias-pull-up;
62 };
63
64 mux_2 {
65 pins = "gpio7";
66 function = "mdc";
67 bias-pull-up;
68 };
69 };
70
71 serial_0_pins: serial_pinmux {
72 mux {
73 pins = "gpio16", "gpio17";
74 function = "blsp_uart0";
75 bias-disable;
76 };
77 };
78
79 serial_1_pins: serial1_pinmux {
80 mux {
81 pins = "gpio8", "gpio9", "gpio10", "gpio11";
82 function = "blsp_uart1";
83 bias-disable;
84 };
85 };
86
87 spi_0_pins: spi_0_pinmux {
88 pinmux {
89 function = "blsp_spi0";
90 pins = "gpio13", "gpio14", "gpio15";
91 bias-disable;
92 };
93
94 pinmux_cs {
95 function = "gpio";
96 pins = "gpio12";
97 bias-disable;
98 output-high;
99 };
100 };
101
102 i2c_0_pins: i2c_0_pinmux {
103 mux {
104 pins = "gpio20", "gpio21";
105 function = "blsp_i2c0";
106 bias-disable;
107 };
108 };
109
110 nand_pins: nand_pins {
111 pullups {
112 pins = "gpio52", "gpio53", "gpio58", "gpio59";
113 function = "qpic";
114 bias-pull-up;
115 };
116
117 pulldowns {
118 pins = "gpio54", "gpio55", "gpio56",
119 "gpio57", "gpio60", "gpio61",
120 "gpio62", "gpio63", "gpio64",
121 "gpio65", "gpio66", "gpio67",
122 "gpio68", "gpio69";
123 function = "qpic";
124 bias-pull-down;
125 };
126 };
127
128 led_0_pins: led0_pinmux {
129 mux_1 {
130 pins = "gpio36";
131 function = "led0";
132 bias-pull-down;
133 };
134 mux_2 {
135 pins = "gpio40";
136 function = "led4";
137 bias-pull-down;
138 };
139 };
140 };
141
142 blsp_dma: dma@7884000 {
143 status = "okay";
144 };
145
146 spi_0: spi@78b5000 {
147 pinctrl-0 = <&spi_0_pins>;
148 pinctrl-names = "default";
149 status = "okay";
150 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 41 GPIO_ACTIVE_HIGH>;
151 num-cs = <2>;
152
153 flash0@0 {
154 reg = <0>;
155 compatible = "jedec,spi-nor";
156 spi-max-frequency = <24000000>;
157 broken-flash-reset;
158
159 partitions {
160 compatible = "fixed-partitions";
161 #address-cells = <1>;
162 #size-cells = <1>;
163
164 partition@0 {
165 label = "0:SBL1";
166 reg = <0x000000 0x040000>;
167 read-only;
168 };
169
170 partition@40000 {
171 label = "0:MIBIB";
172 reg = <0x040000 0x020000>;
173 read-only;
174 };
175
176 partition@60000 {
177 label = "0:QSEE";
178 reg = <0x060000 0x060000>;
179 read-only;
180 };
181
182 partition@c0000 {
183 label = "0:CDT";
184 reg = <0x0c0000 0x010000>;
185 read-only;
186 };
187
188 partition@d0000 {
189 label = "0:DDRPARAMS";
190 reg = <0x0d0000 0x010000>;
191 read-only;
192 };
193
194 partition@e0000 {
195 label = "u-boot-env";
196 reg = <0x0e0000 0x010000>;
197 };
198
199 partition@f0000 {
200 label = "u-boot";
201 reg = <0x0f0000 0x080000>;
202 read-only;
203 };
204
205 partition@170000 {
206 label = "0:ART";
207 reg = <0x170000 0x010000>;
208 read-only;
209
210 nvmem-layout {
211 compatible = "fixed-layout";
212 #address-cells = <1>;
213 #size-cells = <1>;
214
215 precal_art_1000: precal@1000 {
216 reg = <0x1000 0x2f20>;
217 };
218
219 precal_art_5000: precal@5000 {
220 reg = <0x5000 0x2f20>;
221 };
222 };
223 };
224 };
225 };
226
227 nand@1 {
228 reg = <1>;
229 status = "okay";
230 compatible = "spi-nand";
231 spi-max-frequency = <24000000>;
232
233 partitions {
234 compatible = "fixed-partitions";
235 #address-cells = <1>;
236 #size-cells = <1>;
237
238 /* The device has 128MB, but we can only address
239 * 64MB because of the bootloader's default settings.
240 * This is due to the old mt29f driver,
241 * which detected the deivce with only 64MB
242 */
243 partition@0 {
244 label = "ubi";
245 reg = <0x0000000 0x4000000>;
246 };
247 };
248 };
249 };
250
251 mdio@90000 {
252 status = "okay";
253 pinctrl-0 = <&mdio_pins>;
254 pinctrl-names = "default";
255 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
256 reset-delay-us = <5000>;
257 };
258
259 tcsr@194b000 {
260 /* select hostmode */
261 compatible = "qcom,tcsr";
262 reg = <0x194b000 0x100>;
263 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
264 status = "okay";
265 };
266
267 tcsr@1949000 {
268 compatible = "qcom,tcsr";
269 reg = <0x1949000 0x100>;
270 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
271 };
272
273 ess_tcsr@1953000 {
274 compatible = "qcom,tcsr";
275 reg = <0x1953000 0x1000>;
276 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
277 };
278
279 tcsr@1957000 {
280 compatible = "qcom,tcsr";
281 reg = <0x1957000 0x100>;
282 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
283 };
284
285 i2c_0: i2c@78b7000 {
286 pinctrl-0 = <&i2c_0_pins>;
287 pinctrl-names = "default";
288 status = "okay";
289 };
290
291 serial@78af000 {
292 pinctrl-0 = <&serial_0_pins>;
293 pinctrl-names = "default";
294 status = "okay";
295 };
296
297 serial@78b0000 {
298 pinctrl-0 = <&serial_1_pins>;
299 pinctrl-names = "default";
300 status = "okay";
301 };
302
303 usb3_ss_phy: ssphy@9a000 {
304 status = "okay";
305 };
306
307 usb3_hs_phy: hsphy@a6000 {
308 status = "okay";
309 };
310
311 usb3: usb3@8af8800 {
312 status = "okay";
313 };
314
315 usb2_hs_phy: hsphy@a8000 {
316 status = "okay";
317 };
318
319 usb2: usb2@60f8800 {
320 status = "okay";
321 };
322
323 cryptobam: dma@8e04000 {
324 status = "okay";
325 };
326
327 crypto@8e3a000 {
328 status = "okay";
329 };
330
331 watchdog@b017000 {
332 status = "okay";
333 };
334
335 qpic_bam: dma@7984000 {
336 status = "okay";
337 };
338
339 pcie0: pci@40000000 {
340 status = "okay";
341 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
342 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
343 };
344 };
345
346 keys {
347 compatible = "gpio-keys";
348
349 reset {
350 label = "reset";
351 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
352 linux,code = <KEY_RESTART>;
353 };
354 };
355 };
356
357 &nand {
358 pinctrl-0 = <&nand_pins>;
359 pinctrl-names = "default";
360 status = "okay";
361 };
362
363 &wifi0 {
364 status = "okay";
365 nvmem-cell-names = "pre-calibration";
366 nvmem-cells = <&precal_art_1000>;
367 };
368
369 &wifi1 {
370 status = "okay";
371 nvmem-cell-names = "pre-calibration";
372 nvmem-cells = <&precal_art_5000>;
373 };