ipq40xx: remove mac-address-increment
[openwrt/staging/hauke.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-mf289f.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
4
5 #include "qcom-ipq4019.dtsi"
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10
11 / {
12 model = "ZTE MF289F";
13 compatible = "zte,mf289f";
14
15 aliases {
16 led-boot = &led_status;
17 led-failsafe = &led_status;
18 led-running = &led_status;
19 led-upgrade = &led_status;
20 };
21
22 chosen {
23 /*
24 * bootargs forced by u-boot bootipq command:
25 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
26 */
27 bootargs-append = " root=/dev/ubiblock0_1";
28 };
29
30 /*
31 * This node is used to restart modem module to avoid anomalous
32 * behaviours on initial communication.
33 */
34 gpio-restart {
35 compatible = "gpio-restart";
36 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
37 };
38
39 leds {
40 compatible = "gpio-leds";
41
42 led_status: led-0 {
43 label = "blue:power";
44 function = LED_FUNCTION_POWER;
45 color = <LED_COLOR_ID_BLUE>;
46 gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
47 };
48
49 led-1 {
50 function = LED_FUNCTION_WLAN;
51 color = <LED_COLOR_ID_BLUE>;
52 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
53 linux,default-trigger = "phy0tpt";
54 };
55 };
56
57 keys {
58 compatible = "gpio-keys";
59
60 key-reset {
61 label = "reset";
62 linux,code = <KEY_RESTART>;
63 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
64 };
65
66 key-wps {
67 label = "wps";
68 linux,code = <KEY_WPS_BUTTON>;
69 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
70 };
71 };
72
73 soc {
74 tcsr@1949000 {
75 compatible = "qcom,tcsr";
76 reg = <0x1949000 0x100>;
77 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
78 };
79
80 tcsr@194b000 {
81 /* select hostmode */
82 compatible = "qcom,tcsr";
83 reg = <0x194b000 0x100>;
84 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
85 status = "okay";
86 };
87
88 ess_tcsr@1953000 {
89 compatible = "qcom,tcsr";
90 reg = <0x1953000 0x1000>;
91 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
92 };
93
94 tcsr@1957000 {
95 compatible = "qcom,tcsr";
96 reg = <0x1957000 0x100>;
97 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
98 };
99 };
100 };
101
102 &prng {
103 status = "okay";
104 };
105
106 &mdio {
107 status = "okay";
108 pinctrl-0 = <&mdio_pins>;
109 pinctrl-names = "default";
110 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
111 reset-delay-us = <2000>;
112 };
113
114 &watchdog {
115 status = "okay";
116 };
117
118 &blsp_dma {
119 status = "okay";
120 };
121
122 &usb2 {
123 status = "okay";
124 };
125
126 &usb3 {
127 status = "okay";
128 };
129
130 &blsp1_spi1 {
131 pinctrl-0 = <&spi_0_pins>;
132 pinctrl-names = "default";
133 status = "okay";
134 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
135 <&tlmm 54 GPIO_ACTIVE_HIGH>;
136
137 flash@0 {
138 compatible = "jedec,spi-nor";
139 #address-cells = <1>;
140 #size-cells = <1>;
141 reg = <0>;
142 spi-max-frequency = <24000000>;
143
144 partitions {
145 compatible = "fixed-partitions";
146 #address-cells = <1>;
147 #size-cells = <1>;
148
149 partition@0 {
150 label = "0:SBL1";
151 reg = <0x0 0x40000>;
152 read-only;
153 };
154
155 partition@40000 {
156 label = "0:MIBIB";
157 reg = <0x40000 0x20000>;
158 read-only;
159 };
160
161 partition@60000 {
162 label = "0:QSEE";
163 reg = <0x60000 0x60000>;
164 read-only;
165 };
166
167 partition@c0000 {
168 label = "0:CDT";
169 reg = <0xc0000 0x10000>;
170 read-only;
171 };
172
173 partition@d0000 {
174 label = "0:DDRPARAMS";
175 reg = <0xd0000 0x10000>;
176 read-only;
177 };
178
179 partition@e0000 {
180 label = "0:APPSBLENV";
181 reg = <0xe0000 0x10000>;
182 read-only;
183 };
184
185 partition@f0000 {
186 label = "0:APPSBL";
187 reg = <0xf0000 0xc0000>;
188 read-only;
189 };
190
191 partition@1b0000 {
192 label = "0:reserved1";
193 reg = <0x1b0000 0x50000>;
194 read-only;
195 };
196 };
197 };
198
199 spi-nand@1 { /* flash@1 ? */
200 compatible = "spi-nand";
201 reg = <1>;
202 spi-max-frequency = <24000000>;
203
204 partitions {
205 compatible = "fixed-partitions";
206 #address-cells = <1>;
207 #size-cells = <1>;
208
209 partition@0 {
210 label = "fota-flag";
211 reg = <0x0 0xa0000>;
212 read-only;
213 };
214
215 partition@a0000 {
216 label = "ART";
217 reg = <0xa0000 0x80000>;
218 read-only;
219
220 nvmem-layout {
221 compatible = "fixed-layout";
222 #address-cells = <1>;
223 #size-cells = <1>;
224
225 precal_art_1000: precal@1000 {
226 reg = <0x1000 0x2f20>;
227 };
228
229 precal_art_5000: precal@5000 {
230 reg = <0x5000 0x2f20>;
231 };
232 };
233 };
234
235 partition@120000 {
236 label = "mac";
237 reg = <0x120000 0x80000>;
238 read-only;
239
240 nvmem-layout {
241 compatible = "fixed-layout";
242 #address-cells = <1>;
243 #size-cells = <1>;
244
245 macaddr_mac_0: macaddr@0 {
246 compatible = "mac-base";
247 reg = <0x0 0x6>;
248 #nvmem-cell-cells = <1>;
249 };
250 };
251 };
252
253 partition@1a0000 {
254 label = "reserved2";
255 reg = <0x1a0000 0xc0000>;
256 read-only;
257 };
258
259 partition@260000 {
260 label = "cfg-param";
261 reg = <0x260000 0x400000>;
262 read-only;
263 };
264
265 partition@660000 {
266 label = "log";
267 reg = <0x660000 0x400000>;
268 };
269
270 partition@a60000 {
271 label = "oops";
272 reg = <0xa60000 0xa0000>;
273 };
274
275 partition@b00000 {
276 label = "reserved3";
277 reg = <0xb00000 0x500000>;
278 read-only;
279 };
280
281 partition@1000000 {
282 label = "web";
283 reg = <0x1000000 0x800000>;
284 };
285
286 partition@1800000 {
287 label = "rootfs";
288 reg = <0x1800000 0x1d00000>;
289 };
290
291 partition@3500000 {
292 label = "data";
293 reg = <0x3500000 0x1900000>;
294 };
295
296 partition@4e00000 {
297 label = "fota";
298 reg = <0x4e00000 0x3200000>;
299 };
300 };
301 };
302 };
303
304 &blsp1_uart1 {
305 pinctrl-0 = <&serial_pins>;
306 pinctrl-names = "default";
307 status = "okay";
308 };
309
310 &crypto {
311 status = "okay";
312 };
313
314 &cryptobam {
315 status = "okay";
316 };
317
318 &gmac {
319 status = "okay";
320 nvmem-cell-names = "mac-address";
321 nvmem-cells = <&macaddr_mac_0 0>;
322 };
323
324 &switch {
325 status = "okay";
326 };
327
328 &swport2 {
329 status = "okay";
330
331 label = "wan";
332
333 nvmem-cell-names = "mac-address";
334 nvmem-cells = <&macaddr_mac_0 1>;
335 };
336
337 &swport5 {
338 status = "okay";
339
340 label = "lan";
341 };
342
343 &qpic_bam {
344 status = "okay";
345 };
346
347 &tlmm {
348 i2c_0_pins: i2c_0_pinmux {
349 mux {
350 pins = "gpio20", "gpio21";
351 function = "blsp_i2c0";
352 bias-disable;
353 };
354 };
355
356 mdio_pins: mdio_pinmux {
357 mux_1 {
358 pins = "gpio6";
359 function = "mdio";
360 bias-pull-up;
361 };
362
363 mux_2 {
364 pins = "gpio7";
365 function = "mdc";
366 bias-pull-up;
367 };
368 };
369
370 serial_pins: serial_pinmux {
371 mux {
372 pins = "gpio16", "gpio17";
373 function = "blsp_uart0";
374 bias-disable;
375 };
376 };
377
378 spi_0_pins: spi_0_pinmux {
379 pinmux {
380 function = "blsp_spi0";
381 pins = "gpio13", "gpio14", "gpio15";
382 drive-strength = <12>;
383 bias-disable;
384 };
385
386 pinmux_cs {
387 function = "gpio";
388 pins = "gpio12", "gpio54";
389 drive-strength = <2>;
390 bias-disable;
391 output-high;
392 };
393 };
394 };
395
396 &usb2_hs_phy {
397 status = "okay";
398 };
399
400 &usb3_ss_phy {
401 status = "okay";
402 };
403
404 &usb3_hs_phy {
405 status = "okay";
406 };
407
408 &wifi0 {
409 status = "okay";
410 nvmem-cell-names = "pre-calibration", "mac-address";
411 nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0 2>;
412 qcom,ath10k-calibration-variant = "zte,mf289f";
413 };
414
415 /* This node is used only on AT2 version for 5Ghz on IPQ4019 with board-id=21 */
416 &wifi1 {
417 status = "okay";
418 nvmem-cell-names = "pre-calibration", "mac-address";
419 nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0 3>;
420 qcom,ath10k-calibration-variant = "zte,mf289f";
421 };
422
423 /* This node is used only on AT1 version for 5Ghz on QCA9984 */
424 &pcie0 {
425 status = "okay";
426 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
427 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
428 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
429
430 bridge@0,0 {
431 reg = <0x00000000 0 0 0 0>;
432 #address-cells = <3>;
433 #size-cells = <2>;
434 ranges;
435
436 wifi2: wifi@1,0 {
437 nvmem-cell-names = "mac-address";
438 nvmem-cells = <&macaddr_mac_0 4>;
439 compatible = "qcom,ath10k";
440 reg = <0x00010000 0 0 0 0>;
441 qcom,ath10k-calibration-variant = "zte,mf289f";
442 };
443 };
444 };