target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "GL.iNet GL-B2200";
  10         compatible = "glinet,gl-b2200", "qcom,ipq4019";
  11
  12         memory {
  13                 device_type = "memory";
  14                 reg = <0x80000000 0x10000000>;
  15         };
  16
  17         chosen {
  18                 bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused";
  19         };
  20
  21         aliases {
  22                 ethernet1 = &swport4;
  23         };
  24
  25         soc {
  26                 rng@22000 {
  27                         status = "okay";
  28                 };
  29
  30                 mdio@90000 {
  31                         status = "okay";
  32                 };
  33
  34                 tcsr@1949000 {
  35                         compatible = "qcom,tcsr";
  36                         reg = <0x1949000 0x100>;
  37                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  38                 };
  39
  40                 tcsr@194b000 {
  41                         /* select hostmode */
  42                         compatible = "qcom,tcsr";
  43                         reg = <0x194b000 0x100>;
  44                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  45                         status = "okay";
  46                 };
  47
  48                 ess_tcsr@1953000 {
  49                         compatible = "qcom,tcsr";
  50                         reg = <0x1953000 0x1000>;
  51                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  52                 };
  53
  54                 tcsr@1957000 {
  55                         compatible = "qcom,tcsr";
  56                         reg = <0x1957000 0x100>;
  57                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  58                 };
  59
  60                 crypto@8e3a000 {
  61                         status = "okay";
  62                 };
  63         };
  64
  65         keys {
  66                 compatible = "gpio-keys";
  67
  68                 wps {
  69                         label = "wps";
  70                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  71                         linux,code = <KEY_WPS_BUTTON>;
  72                         linux,input-type = <1>;
  73                 };
  74
  75                 reset {
  76                         label = "reset";
  77                         gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
  78                         linux,code = <KEY_RESTART>;
  79                         linux,input-type = <1>;
  80                 };
  81         };
  82
  83         leds {
  84                 compatible = "gpio-leds";
  85
  86                 power_blue {
  87                         label = "blue:power";
  88                         gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
  89                         default-state = "on";
  90                 };
  91                 internet_blue {
  92                         label = "blue:internet";
  93                         gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
  94                 };
  95                 power_white {
  96                         label = "white:power";
  97                         gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
  98                 };
  99                 internet_white {
 100                         label = "white:internet";
 101                         gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
 102                 };
 103         };
 104 };
 105
 106 &vqmmc {
 107         status = "okay";
 108 };
 109
 110 &sdhci {
 111         status = "okay";
 112         pinctrl-0 = <&sd_pins>;
 113         pinctrl-names = "default";
 114         cd-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
 115         vqmmc-supply = <&vqmmc>;
 116 };
 117
 118 &blsp_dma {
 119         status = "okay";
 120 };
 121
 122 &cryptobam {
 123         status = "okay";
 124 };
 125
 126 &blsp1_spi1 {
 127         pinctrl-0 = <&spi_0_pins>;
 128         pinctrl-names = "default";
 129         status = "okay";
 130         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 131
 132         flash@0 {
 133                 compatible = "jedec,spi-nor";
 134                 reg = <0>;
 135                 spi-max-frequency = <24000000>;
 136
 137                 partitions {
 138                         compatible = "fixed-partitions";
 139                         #address-cells = <1>;
 140                         #size-cells = <1>;
 141
 142                         partition@0 {
 143                                 label = "SBL1";
 144                                 reg = <0x0 0x40000>;
 145                                 read-only;
 146                         };
 147
 148                         partition@40000 {
 149                                 label = "MIBIB";
 150                                 reg = <0x40000 0x20000>;
 151                                 read-only;
 152                         };
 153
 154                         partition@60000 {
 155                                 label = "QSEE";
 156                                 reg = <0x60000 0x60000>;
 157                                 read-only;
 158                         };
 159
 160                         partition@c0000 {
 161                                 label = "CDT";
 162                                 reg = <0xc0000 0x10000>;
 163                                 read-only;
 164                         };
 165
 166                         partition@d0000 {
 167                                 label = "DDRPARAMS";
 168                                 reg = <0xd0000 0x10000>;
 169                                 read-only;
 170                         };
 171
 172                         partition@e0000 {
 173                                 label = "APPSBLENV";
 174                                 reg = <0xe0000 0x10000>;
 175                                 read-only;
 176                         };
 177
 178                         partition@f0000 {
 179                                 label = "APPSBL";
 180                                 reg = <0xf0000 0x80000>;
 181                                 read-only;
 182                         };
 183
 184                         partition@170000 {
 185                                 label = "ART";
 186                                 reg = <0x170000 0x10000>;
 187                                 read-only;
 188
 189                                 nvmem-layout {
 190                                         compatible = "fixed-layout";
 191                                         #address-cells = <1>;
 192                                         #size-cells = <1>;
 193
 194                                         precal_art_1000: precal@1000 {
 195                                                 reg = <0x1000 0x2f20>;
 196                                         };
 197
 198                                         precal_art_5000: precal@5000 {
 199                                                 reg = <0x5000 0x2f20>;
 200                                         };
 201
 202                                         precal_art_9000: precal@9000 {
 203                                                 reg = <0x9000 0x2f20>;
 204                                         };
 205                                 };
 206                         };
 207                 };
 208         };
 209 };
 210
 211 &blsp1_spi2 {
 212         pinctrl-0 = <&spi_1_pins>;
 213         pinctrl-names = "default";
 214         status = "okay";
 215
 216         spidev1: spi@0 {
 217                 compatible = "silabs,si3210";
 218                 reg = <0>;
 219                 spi-max-frequency = <24000000>;
 220         };
 221 };
 222
 223 &blsp1_uart1 {
 224         pinctrl-0 = <&serial_pins>;
 225         pinctrl-names = "default";
 226         status = "okay";
 227 };
 228
 229 &blsp1_uart2 {
 230         pinctrl-0 = <&serial_1_pins>;
 231         pinctrl-names = "default";
 232         status = "okay";
 233 };
 234
 235 &tlmm {
 236         serial_pins: serial_pinmux {
 237                 mux {
 238                         pins = "gpio16", "gpio17";
 239                         function = "blsp_uart0";
 240                         bias-disable;
 241                 };
 242         };
 243
 244         serial_1_pins: serial1_pinmux {
 245                 mux {
 246                         pins = "gpio8", "gpio9",
 247                                 "gpio10", "gpio11";
 248                         function = "blsp_uart1";
 249                         bias-disable;
 250                 };
 251         };
 252
 253         spi_0_pins: spi_0_pinmux {
 254                 pinmux {
 255                         function = "blsp_spi0";
 256                         pins = "gpio13", "gpio14", "gpio15";
 257                 };
 258                 pinmux_cs {
 259                         function = "gpio";
 260                         pins = "gpio12";
 261                 };
 262                 pinconf {
 263                         pins = "gpio13", "gpio14", "gpio15";
 264                         drive-strength = <12>;
 265                         bias-disable;
 266                 };
 267                 pinconf_cs {
 268                         pins = "gpio12";
 269                         drive-strength = <2>;
 270                         bias-disable;
 271                         output-high;
 272                 };
 273         };
 274
 275         spi_1_pins: spi_1_pinmux {
 276                 mux {
 277                         pins = "gpio44", "gpio46", "gpio47";
 278                         function = "blsp_spi1";
 279                         bias-disable;
 280                 };
 281                 cs {
 282                         pins = "gpio45";
 283                         function = "gpio";
 284                         bias-pull-up;
 285                 };
 286                 reset {
 287                         pins = "gpio43";
 288                         function = "gpio";
 289                         output-high;
 290                 };
 291                 mux_2 {
 292                         pins = "gpio35";
 293                         function = "gpio";
 294                         output-high;
 295                 };
 296                 host_int {
 297                         pins = "gpio2";
 298                         function = "gpio";
 299                         input;
 300                 };
 301                 wake {
 302                         pins = "gpio48";
 303                         function = "gpio";
 304                         output-high;
 305                 };
 306         };
 307
 308         sd_pins: sd_pins {
 309                 pinmux {
 310                         function = "sdio";
 311                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 312                                 "gpio29", "gpio30", "gpio31", "gpio32";
 313                         drive-strength = <10>;
 314                 };
 315
 316                 pinmux_sd_clk {
 317                         function = "sdio";
 318                         pins = "gpio27";
 319                         drive-strength = <16>;
 320                 };
 321
 322                 pinmux_sd7 {
 323                         function = "sdio";
 324                         pins = "gpio28";
 325                         drive-strength = <10>;
 326                         bias-disable;
 327                 };
 328         };
 329
 330 };
 331
 332 &pcie0 {
 333         status = "okay";
 334         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 335         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 336
 337         bridge@0,0 {
 338                 reg = <0x00000000 0 0 0 0>;
 339                 #address-cells = <3>;
 340                 #size-cells = <2>;
 341                 ranges;
 342
 343                 wifi2: wifi@1,0 {
 344                         status = "okay";
 345                         /* Bootlog shows this is a 168c:0056 - QCA 9888v2 */
 346                         compatible = "qcom,ath10k";
 347                         reg = <0x00010000 0 0 0 0>;
 348                         nvmem-cell-names = "pre-calibration";
 349                         nvmem-cells = <&precal_art_9000>;
 350                         qcom,ath10k-calibration-variant = "GL-B2200";
 351                         ieee80211-freq-limit = <5450000 5900000>;
 352                 };
 353         };
 354 };
 355
 356 &gmac {
 357         status = "okay";
 358 };
 359
 360 &switch {
 361         status = "okay";
 362 };
 363
 364 &swport4 {
 365         status = "okay";
 366
 367         label = "wan";
 368 };
 369
 370 &swport5 {
 371         status = "okay";
 372
 373         label = "lan";
 374 };
 375
 376 &wifi0 {
 377         status = "okay";
 378         nvmem-cell-names = "pre-calibration";
 379         nvmem-cells = <&precal_art_1000>;
 380         qcom,ath10k-calibration-variant = "GL-B2200";
 381 };
 382
 383 &wifi1 {
 384         status = "okay";
 385         nvmem-cell-names = "pre-calibration";
 386         nvmem-cells = <&precal_art_5000>;
 387         qcom,ath10k-calibration-variant = "GL-B2200";
 388         ieee80211-freq-limit = <5100000 5400000>;
 389 };