target/linux/generic/backport-5.15/704-04-v5.17-net-mtk_eth_soc-use-phylink_generic_validate.patch

   1 From a4238f6ce151afa331375d74a5033b76da637644 Mon Sep 17 00:00:00 2001
   2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
   3 Date: Tue, 16 Nov 2021 10:06:58 +0000
   4 Subject: [PATCH] net: mtk_eth_soc: use phylink_generic_validate()
   5
   6 mtk_eth_soc has no special behaviour in its validation implementation,
   7 so can be switched to phylink_generic_validate().
   8
   9 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
  10 Signed-off-by: David S. Miller <davem@davemloft.net>
  11 ---
  12  drivers/net/ethernet/mediatek/mtk_eth_soc.c | 53 ++-------------------
  13  1 file changed, 4 insertions(+), 49 deletions(-)
  14
  15 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  16 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  17 @@ -564,56 +564,8 @@ static void mtk_mac_link_up(struct phyli
  18         mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
  19  }
  20
  21 -static void mtk_validate(struct phylink_config *config,
  22 -                        unsigned long *supported,
  23 -                        struct phylink_link_state *state)
  24 -{
  25 -       __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
  26 -
  27 -       phylink_set_port_modes(mask);
  28 -       phylink_set(mask, Autoneg);
  29 -
  30 -       switch (state->interface) {
  31 -       case PHY_INTERFACE_MODE_TRGMII:
  32 -               phylink_set(mask, 1000baseT_Full);
  33 -               break;
  34 -       case PHY_INTERFACE_MODE_1000BASEX:
  35 -               phylink_set(mask, 1000baseX_Full);
  36 -               break;
  37 -       case PHY_INTERFACE_MODE_2500BASEX:
  38 -               phylink_set(mask, 2500baseX_Full);
  39 -               break;
  40 -       case PHY_INTERFACE_MODE_GMII:
  41 -       case PHY_INTERFACE_MODE_RGMII:
  42 -       case PHY_INTERFACE_MODE_RGMII_ID:
  43 -       case PHY_INTERFACE_MODE_RGMII_RXID:
  44 -       case PHY_INTERFACE_MODE_RGMII_TXID:
  45 -               phylink_set(mask, 1000baseT_Half);
  46 -               fallthrough;
  47 -       case PHY_INTERFACE_MODE_SGMII:
  48 -               phylink_set(mask, 1000baseT_Full);
  49 -               phylink_set(mask, 1000baseX_Full);
  50 -               fallthrough;
  51 -       case PHY_INTERFACE_MODE_MII:
  52 -       case PHY_INTERFACE_MODE_RMII:
  53 -       case PHY_INTERFACE_MODE_REVMII:
  54 -       default:
  55 -               phylink_set(mask, 10baseT_Half);
  56 -               phylink_set(mask, 10baseT_Full);
  57 -               phylink_set(mask, 100baseT_Half);
  58 -               phylink_set(mask, 100baseT_Full);
  59 -               break;
  60 -       }
  61 -
  62 -       phylink_set(mask, Pause);
  63 -       phylink_set(mask, Asym_Pause);
  64 -
  65 -       linkmode_and(supported, supported, mask);
  66 -       linkmode_and(state->advertising, state->advertising, mask);
  67 -}
  68 -
  69  static const struct phylink_mac_ops mtk_phylink_ops = {
  70 -       .validate = mtk_validate,
  71 +       .validate = phylink_generic_validate,
  72         .mac_pcs_get_state = mtk_mac_pcs_get_state,
  73         .mac_an_restart = mtk_mac_an_restart,
  74         .mac_config = mtk_mac_config,
  75 @@ -3310,6 +3262,9 @@ static int mtk_add_mac(struct mtk_eth *e
  76
  77         mac->phylink_config.dev = &eth->netdev[id]->dev;
  78         mac->phylink_config.type = PHYLINK_NETDEV;
  79 +       mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
  80 +               MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;
  81 +
  82         __set_bit(PHY_INTERFACE_MODE_MII,
  83                   mac->phylink_config.supported_interfaces);
  84         __set_bit(PHY_INTERFACE_MODE_GMII,