ath79: add support for D-Link COVR-P2500 A1
[openwrt/staging/hauke.git] / target / linux / ath79 / dts / qca9563_dlink_covr-p2500-a1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/mtd/partitions/uimage.h>
8
9 / {
10 compatible = "dlink,covr-p2500-a1", "qca,qca9563";
11 model = "D-Link COVR-P2500 A1";
12
13 aliases {
14 led-boot = &led_power_green;
15 led-failsafe = &led_power_red;
16 led-running = &led_power_green;
17 led-upgrade = &led_power_red;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 wps {
24 label = "wps";
25 linux,code = <KEY_WPS_BUTTON>;
26 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
27 };
28
29 reset {
30 label = "reset";
31 linux,code = <KEY_RESTART>;
32 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
33 };
34 };
35
36 leds {
37 compatible = "gpio-leds";
38 pinctrl-names = "default";
39 pinctrl-0 = <&jtag_disable_pins>;
40
41 lan {
42 label = "green:lan";
43 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
44 };
45
46 led_power_green: power_green {
47 label = "green:power";
48 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
49 default-state = "on";
50 };
51
52 wlan5g {
53 label = "green:wlan5g";
54 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
55 linux,default-trigger = "phy0radio";
56 };
57
58 led_power_red: power_red {
59 label = "red:power";
60 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
61 };
62
63 wlan2g {
64 label = "green:wlan2g";
65 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
66 linux,default-trigger = "phy1radio";
67 };
68 };
69
70 virtual_flash {
71 compatible = "mtd-concat";
72
73 devices = <&fwconcat0 &fwconcat1>;
74
75 partitions {
76 compatible = "fixed-partitions";
77 #address-cells = <1>;
78 #size-cells = <1>;
79
80 partition@0 {
81 compatible = "openwrt,uimage", "denx,uimage";
82 openwrt,ih-magic = <0x68737173>;
83 label = "firmware";
84 reg = <0x0 0x0>;
85 };
86 };
87 };
88 };
89
90 &spi {
91 status = "okay";
92
93 flash@0 {
94 compatible = "jedec,spi-nor";
95 reg = <0>;
96 spi-max-frequency = <50000000>;
97
98 partitions {
99 compatible = "fixed-partitions";
100 #address-cells = <1>;
101 #size-cells = <1>;
102
103 partition@0 {
104 label = "u-boot";
105 reg = <0x0 0x40000>;
106 read-only;
107 };
108
109 partition@40000 {
110 label = "u-boot-env";
111 reg = <0x40000 0x10000>;
112 read-only;
113 };
114
115 fwconcat0: partition@50000 {
116 label = "fwconcat0";
117 reg = <0x50000 0xe30000>;
118 };
119
120 partition@e80000 {
121 label = "loader";
122 reg = <0xe80000 0x10000>;
123 read-only;
124 };
125
126 fwconcat1: partition@e90000 {
127 label = "fwconcat1";
128 reg = <0xe90000 0x160000>;
129 };
130
131 art: partition@ff0000 {
132 label = "art";
133 reg = <0xff0000 0x10000>;
134 read-only;
135
136 compatible = "nvmem-cells";
137
138 nvmem-layout {
139 compatible = "fixed-layout";
140 #address-cells = <1>;
141 #size-cells = <1>;
142
143 calibration_ath9k: calibration@1000 {
144 reg = <0x1000 0x440>;
145 };
146
147 precalibration_ath10k: pre-calibration@5000 {
148 reg = <0x5000 0x2f20>;
149 };
150 };
151 };
152 };
153 };
154 };
155
156 &pcie {
157 status = "okay";
158
159 wifi@0,0 {
160 compatible = "qcom,ath10k";
161 reg = <0 0 0 0 0>;
162
163 nvmem-cells = <&precalibration_ath10k>;
164 nvmem-cell-names = "pre-calibration";
165 };
166 };
167
168 &gpio {
169 phy-reset {
170 gpio-hog;
171 gpios = <11 GPIO_ACTIVE_LOW>;
172 output-low;
173 line-name = "phy-reset";
174 };
175 };
176
177 &mdio0 {
178 status = "okay";
179
180 phy0: ethernet-phy@0 {
181 reg = <0>;
182 phy-mode = "sgmii";
183 qca,mib-poll-interval = <500>;
184
185 qca,ar8327-initvals = <
186 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
187 0x10 0x81000080 /* POWER_ON_STRAP */
188 0x50 0xcc35cc35 /* LED_CTRL0 */
189 0x54 0xcb37cb37 /* LED_CTRL1 */
190 0x58 0x00000000 /* LED_CTRL2 */
191 0x5c 0x00f3cf00 /* LED_CTRL3 */
192 0x7c 0x0000007e /* PORT0_STATUS */
193 >;
194 };
195 };
196
197 &eth0 {
198 status = "okay";
199
200 pll-data = <0x03000101 0x00000101 0x00001919>;
201
202 phy-mode = "sgmii";
203 phy-handle = <&phy0>;
204 };
205
206 &wmac {
207 status = "okay";
208
209 nvmem-cells = <&calibration_ath9k>;
210 nvmem-cell-names = "calibration";
211 };