target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar9344.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         aliases {
  10                 led-boot = &led_system;
  11                 led-failsafe = &led_system;
  12                 led-running = &led_system;
  13                 led-upgrade = &led_system;
  14         };
  15
  16         leds: leds {
  17                 compatible = "gpio-leds";
  18
  19                 wlan2g {
  20                         label = "green:wlan2g";
  21                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  22                         linux,default-trigger = "phy0tpt";
  23                 };
  24
  25                 led_system: system {
  26                         label = "green:system";
  27                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  28                         default-state = "on";
  29                 };
  30
  31                 qss {
  32                         label = "green:qss";
  33                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  34                 };
  35         };
  36
  37         ath9k-leds {
  38                 compatible = "gpio-leds";
  39
  40                 wlan5g {
  41                         label = "green:wlan5g";
  42                         gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
  43                         linux,default-trigger = "phy1tpt";
  44                 };
  45         };
  46
  47         keys {
  48                 compatible = "gpio-keys";
  49
  50                 reset {
  51                         linux,code = <KEY_RESTART>;
  52                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  53                         debounce-interval = <60>;
  54                 };
  55
  56                 wifi {
  57                         linux,code = <KEY_RFKILL>;
  58                         linux,input-type = <EV_SW>;
  59                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  60                         debounce-interval = <60>;
  61                 };
  62         };
  63 };
  64
  65 &ref {
  66         clock-frequency = <40000000>;
  67 };
  68
  69 &spi {
  70         status = "okay";
  71
  72         flash@0 {
  73                 compatible = "jedec,spi-nor";
  74                 reg = <0>;
  75                 spi-max-frequency = <33000000>;
  76
  77                 partitions {
  78                         compatible = "fixed-partitions";
  79                         #address-cells = <1>;
  80                         #size-cells = <1>;
  81
  82                         uboot: partition@0 {
  83                                 label = "u-boot";
  84                                 reg = <0x000000 0x020000>;
  85                                 read-only;
  86                         };
  87
  88                         partition@20000 {
  89                                 compatible = "tplink,firmware";
  90                                 label = "firmware";
  91                                 reg = <0x020000 0x7d0000>;
  92                         };
  93
  94                         art: partition@7f0000 {
  95                                 label = "art";
  96                                 reg = <0x7f0000 0x010000>;
  97                                 read-only;
  98                         };
  99                 };
 100         };
 101 };
 102
 103 &pcie {
 104         status = "okay";
 105
 106         ath9k: wifi@0,0 {
 107                 compatible = "pci168c,0033";
 108                 reg = <0x0000 0 0 0 0>;
 109                 #gpio-cells = <2>;
 110                 gpio-controller;
 111                 nvmem-cells = <&macaddr_uboot_1fc00>, <&cal_art_5000>;
 112                 nvmem-cell-names = "mac-address", "calibration";
 113         };
 114 };
 115
 116 &wmac {
 117         status = "okay";
 118         nvmem-cells = <&macaddr_uboot_1fc00>, <&cal_art_1000>;
 119         nvmem-cell-names = "mac-address", "calibration";
 120 };
 121
 122 &uboot {
 123         compatible = "nvmem-cells";
 124         #address-cells = <1>;
 125         #size-cells = <1>;
 126
 127         macaddr_uboot_1fc00: macaddr@1fc00 {
 128                 reg = <0x1fc00 0x6>;
 129         };
 130 };
 131
 132 &art {
 133         compatible = "nvmem-cells";
 134         #address-cells = <1>;
 135         #size-cells = <1>;
 136
 137         cal_art_1000: cal@1000 {
 138                 reg = <0x1000 0x440>;
 139         };
 140
 141         cal_art_5000: cal@5000 {
 142                 reg = <0x5000 0x440>;
 143         };
 144 };