package/boot/uboot-sunxi/patches/407-sunxi-spi-set-up-GPIO-pins-using-pinctrl.patch

   1 From 0c87fe5938e5c7c089b84962a7c7ee3505910ffc Mon Sep 17 00:00:00 2001
   2 From: "S.J.R. van Schaik" <stephan@whiteboxsystems.nl>
   3 Date: Thu, 23 Feb 2017 12:11:42 +0000
   4 Subject: sunxi: spi: set up GPIO pins using pinctrl
   5
   6 ---
   7  drivers/spi/sunxi_spi.c | 31 +++++++++++++++++++------------
   8  1 file changed, 19 insertions(+), 12 deletions(-)
   9
  10 --- a/drivers/spi/sunxi_spi.c
  11 +++ b/drivers/spi/sunxi_spi.c
  12 @@ -36,18 +36,28 @@ struct sunxi_spi_priv {
  13
  14  DECLARE_GLOBAL_DATA_PTR;
  15
  16 -static void sunxi_spi_setup_pinmux(unsigned int pin_func)
  17 +static int sunxi_spi_parse_pins(struct udevice *bus)
  18  {
  19 -       unsigned int pin;
  20 +       unsigned int pin_func = SUNXI_GPC_SPI0;
  21 +       int ret;
  22 +
  23 +       if (IS_ENABLED(CONFIG_MACH_SUN50I))
  24 +               pin_func = SUN50I_GPC_SPI0;
  25 +
  26 +       ret = sunxi_gpio_setup_dt_pins(gd->fdt_blob, dev_of_offset(bus), NULL,
  27 +               pin_func);
  28
  29 -       for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(2); pin++)
  30 -               sunxi_gpio_set_cfgpin(pin, pin_func);
  31 +       if (ret < 0) {
  32 +               printf("WARNING: sunxi-spi: cannot find pinctrl-0 node\n");
  33 +               return ret;
  34 +       }
  35
  36 -       if (IS_ENABLED(CONFIG_MACH_SUN4I) || IS_ENABLED(CONFIG_MACH_SUN7I)) {
  37 -               sunxi_gpio_set_cfgpin(SUNXI_GPC(23), pin_func);
  38 -       } else {
  39 -               sunxi_gpio_set_cfgpin(SUNXI_GPC(3), pin_func);
  40 +       if (!ret) {
  41 +               printf("WARNING: sunxi-spi: cannot find pins property\n");
  42 +               return -2;
  43         }
  44 +
  45 +       return ret;
  46  }
  47
  48  static void sunxi_spi_enable_clock(struct udevice *bus)
  49 @@ -170,10 +180,7 @@ static int sunxi_spi_claim_bus(struct ud
  50
  51         debug("%s: claiming bus\n", __func__);
  52
  53 -       if (IS_ENABLED(CONFIG_MACH_SUN50I))
  54 -               pin_func = SUN50I_GPC_SPI0;
  55 -
  56 -       sunxi_spi_setup_pinmux(pin_func);
  57 +       sunxi_spi_parse_pins(bus);
  58         sunxi_spi_enable_clock(bus);
  59         setbits_le32(&priv->regs->glb_ctl, SUNXI_SPI_CTL_MASTER |
  60                 SUNXI_SPI_CTL_ENABLE | SUNXI_SPI_CTL_TP | SUNXI_SPI_CTL_SRST);