target/linux/imx6/files-4.4/arch/arm/boot/dts/imx6qdl-gw553x.dtsi

   1 /*
   2  * Copyright 2016 Gateworks Corporation
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 #include <dt-bindings/gpio/gpio.h>
  49
  50 / {
  51         /* these are used by bootloader for disabling nodes */
  52         aliases {
  53                 led0 = &led0;
  54                 led1 = &led1;
  55                 nand = &gpmi;
  56                 usb0 = &usbh1;
  57                 usb1 = &usbotg;
  58         };
  59
  60         chosen {
  61                 bootargs = "console=ttymxc1,115200";
  62         };
  63
  64         leds {
  65                 compatible = "gpio-leds";
  66                 pinctrl-names = "default";
  67                 pinctrl-0 = <&pinctrl_gpio_leds>;
  68
  69                 led0: user1 {
  70                         label = "user1";
  71                         gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
  72                         default-state = "on";
  73                         linux,default-trigger = "heartbeat";
  74                 };
  75
  76                 led1: user2 {
  77                         label = "user2";
  78                         gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
  79                         default-state = "off";
  80                 };
  81         };
  82
  83         gpio_keys {
  84                 compatible = "gpio-keys";
  85                 #address-cells = <1>;
  86                 #size-cells = <0>;
  87
  88                 user_pb {
  89                         label = "user_pb";
  90
  91                         gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
  92                         linux,code = <256>;
  93                 };
  94         };
  95
  96         memory {
  97                 reg = <0x10000000 0x20000000>;
  98         };
  99
 100         pps {
 101                 compatible = "pps-gpio";
 102                 pinctrl-names = "default";
 103                 pinctrl-0 = <&pinctrl_pps>;
 104                 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
 105                 status = "okay";
 106         };
 107
 108         regulators {
 109                 compatible = "simple-bus";
 110                 #address-cells = <1>;
 111                 #size-cells = <0>;
 112
 113                 reg_3p3v: regulator@0 {
 114                         compatible = "regulator-fixed";
 115                         reg = <0>;
 116                         regulator-name = "3P0V";
 117                         regulator-min-microvolt = <3300000>;
 118                         regulator-max-microvolt = <3300000>;
 119                         regulator-always-on;
 120                 };
 121
 122                 reg_5p0v: regulator@1 {
 123                         compatible = "regulator-fixed";
 124                         reg = <1>;
 125                         regulator-name = "5P0V";
 126                         regulator-min-microvolt = <5000000>;
 127                         regulator-max-microvolt = <5000000>;
 128                         regulator-always-on;
 129                 };
 130
 131                 reg_usb_otg_vbus: regulator@2 {
 132                         compatible = "regulator-fixed";
 133                         reg = <2>;
 134                         regulator-name = "usb_otg_vbus";
 135                         regulator-min-microvolt = <5000000>;
 136                         regulator-max-microvolt = <5000000>;
 137                         gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 138                         enable-active-high;
 139                 };
 140         };
 141 };
 142
 143 &gpmi {
 144         pinctrl-names = "default";
 145         pinctrl-0 = <&pinctrl_gpmi_nand>;
 146         status = "okay";
 147 };
 148
 149 &hdmi {
 150         pinctrl-names = "default";
 151         pinctrl-0 = <&pinctrl_hdmi>;
 152         ddc-i2c-bus = <&i2c3>;
 153         status = "okay";
 154 };
 155
 156 &i2c1 {
 157         clock-frequency = <100000>;
 158         pinctrl-names = "default";
 159         pinctrl-0 = <&pinctrl_i2c1>;
 160         status = "okay";
 161
 162         eeprom1: eeprom@50 {
 163                 compatible = "atmel,24c02";
 164                 reg = <0x50>;
 165                 pagesize = <16>;
 166         };
 167
 168         eeprom2: eeprom@51 {
 169                 compatible = "atmel,24c02";
 170                 reg = <0x51>;
 171                 pagesize = <16>;
 172         };
 173
 174         eeprom3: eeprom@52 {
 175                 compatible = "atmel,24c02";
 176                 reg = <0x52>;
 177                 pagesize = <16>;
 178         };
 179
 180         eeprom4: eeprom@53 {
 181                 compatible = "atmel,24c02";
 182                 reg = <0x53>;
 183                 pagesize = <16>;
 184         };
 185
 186         gsc: gsc@20 {
 187                 compatible = "gw,gsc";
 188                 reg = <0x20>;
 189                 pinctrl-names = "default";
 190                 pinctrl-0 = <&pinctrl_gsc>;
 191                 interrupt-parent = <&gpio1>;
 192                 interrupts = <4 GPIO_ACTIVE_LOW>;
 193                 interrupt-controller;
 194                 #interrupt-cells = <1>;
 195
 196                 /* GSC watchdog */
 197                 watchdog {
 198                         compatible = "gw,gsc_wdt";
 199                         status = "okay";
 200                 };
 201
 202                 /* Linux input events from GSC interrupt events */
 203                 input {
 204                         compatible = "gw,gsc_input";
 205                         interrupt-parent = <&gsc>;
 206                         interrupts = <0 1 2 5 7>;
 207                         interrupt-names = "button", "key-erased", "eeprom-wp", "tamper", "button-held";
 208                         status = "okay";
 209                 };
 210         };
 211
 212         gsc_gpio: pca9555@23 {
 213                 compatible = "nxp,pca9555";
 214                 reg = <0x23>;
 215                 gpio-controller;
 216                 #gpio-cells = <2>;
 217                 interrupt-parent = <&gsc>;
 218                 interrupts = <4>;
 219         };
 220
 221         gsc_hwmon: hwmon@29 {
 222                 compatible = "gw,gsc_hwmon";
 223                 reg = <0x29>;
 224         };
 225
 226         gsc_rtc: ds1672@68 {
 227                 compatible = "dallas,ds1672";
 228                 reg = <0x68>;
 229         };
 230 };
 231
 232 &i2c2 {
 233         clock-frequency = <100000>;
 234         pinctrl-names = "default";
 235         pinctrl-0 = <&pinctrl_i2c2>;
 236         status = "okay";
 237
 238         /* LSM9DS1 magnetic sensor */
 239         lsm9ds1-m@0x1c {
 240                 compatible = "st,lsm9ds1-mag";
 241                 reg = <0x1C>;
 242                 pinctrl-names = "default";
 243                 pinctrl-0 = <&pinctrl_imu_mag>;
 244                 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* IRQ */
 245                 rot-matrix = /bits/ 16 <(1) (0) (0)
 246                         (0) (1) (0)
 247                         (0) (0) (1)>;
 248                 poll-interval = <100>;
 249                 min-interval = <13>;
 250                 fs-range = <0>;
 251         };
 252
 253         /* LSM9DS1 accelerometer/gyroscope sensor */
 254         lsm9ds1-ag@0x6a {
 255                 compatible = "st,lsm9ds1-acc-gyr";
 256                 reg = <0x6A>;
 257                 pinctrl-names = "default";
 258                 pinctrl-0 = <&pinctrl_imu_acc>;
 259                 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>, /* INT1 */
 260                         <&gpio4 5  GPIO_ACTIVE_LOW>; /* INT2 */
 261                 rot-matrix = /bits/ 16 <(1) (0) (0)
 262                         (0) (1) (0)
 263                         (0) (0) (1)>;
 264                 g-poll-interval = <100>;
 265                 g-min-interval = <2>;
 266                 g-fs-range = <0>;
 267                 x-poll-interval = <100>;
 268                 x-min-interval = <1>;
 269                 x-fs-range = <0>;
 270                 aa-filter-bw = <0>;
 271         };
 272 };
 273
 274 &i2c3 {
 275         clock-frequency = <100000>;
 276         pinctrl-names = "default";
 277         pinctrl-0 = <&pinctrl_i2c3>;
 278         status = "okay";
 279 };
 280
 281 &pcie {
 282         pinctrl-names = "default";
 283         pinctrl-0 = <&pinctrl_pcie>;
 284         reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
 285         status = "okay";
 286 };
 287
 288 &pwm2 {
 289         pinctrl-names = "default";
 290         pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
 291         status = "disabled";
 292 };
 293
 294 &pwm3 {
 295         pinctrl-names = "default";
 296         pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
 297         status = "disabled";
 298 };
 299
 300 &pwm4 {
 301         pinctrl-names = "default";
 302         pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
 303         status = "disabled";
 304 };
 305
 306 &uart2 {
 307         pinctrl-names = "default";
 308         pinctrl-0 = <&pinctrl_uart2>;
 309         status = "okay";
 310 };
 311
 312 &uart3 {
 313         pinctrl-names = "default";
 314         pinctrl-0 = <&pinctrl_uart3>;
 315         status = "okay";
 316 };
 317
 318 &uart4 {
 319         pinctrl-names = "default";
 320         pinctrl-0 = <&pinctrl_uart4>;
 321         status = "okay";
 322 };
 323
 324 &uart5 {
 325         pinctrl-names = "default";
 326         pinctrl-0 = <&pinctrl_uart5>;
 327         status = "okay";
 328 };
 329
 330 &usbh1 {
 331         status = "okay";
 332 };
 333
 334 &usbotg {
 335         vbus-supply = <&reg_usb_otg_vbus>;
 336         pinctrl-names = "default";
 337         pinctrl-0 = <&pinctrl_usbotg>;
 338         disable-over-current;
 339         status = "okay";
 340 };
 341
 342 &usdhc3 {
 343         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 344         pinctrl-0 = <&pinctrl_usdhc3>;
 345         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 346         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 347         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 348         vmmc-supply = <&reg_3p3v>;
 349         no-1-8-v; /* firmware will remove if board revision supports */
 350         status = "okay";
 351 };
 352
 353 &wdog1 {
 354         pinctrl-names = "default";
 355         pinctrl-0 = <&pinctrl_wdog>;
 356         fsl,ext-reset-output;
 357 };
 358
 359 &iomuxc {
 360         imx6qdl-gw553x {
 361                 pinctrl_gpmi_nand: gpminandgrp {
 362                         fsl,pins = <
 363                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 364                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 365                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 366                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 367                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 368                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 369                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 370                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 371                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 372                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 373                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 374                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 375                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 376                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 377                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 378                         >;
 379                 };
 380
 381                 pinctrl_gsc: gscgrp {
 382                         fsl,pins = <
 383                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x0001b0b0
 384                          >;
 385                 };
 386
 387                 pinctrl_hdmi: hdmigrp {
 388                         fsl,pins = <
 389                                 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE    0x1f8b0
 390                         >;
 391                 };
 392
 393                 pinctrl_i2c1: i2c1grp {
 394                         fsl,pins = <
 395                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 396                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 397                         >;
 398                 };
 399
 400                 pinctrl_i2c2: i2c2grp {
 401                         fsl,pins = <
 402                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 403                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 404                         >;
 405                 };
 406
 407                 pinctrl_i2c3: i2c3grp {
 408                         fsl,pins = <
 409                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 410                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 411                         >;
 412                 };
 413
 414                 pinctrl_imu_mag: gpioimxmaggrp {
 415                         fsl,pins = <
 416                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02   0x1b0b0 /* IRQ */
 417                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07   0x1b0b0 /* data ready */
 418                         >;
 419                 };
 420
 421                 pinctrl_imu_acc: gpioimxaccgrp {
 422                         fsl,pins = <
 423                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b0b0 /* INT1 */
 424                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05  0x1b0b0 /* INT2 */
 425                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x4001b0b0 /* Data enable */
 426                         >;
 427                 };
 428
 429                 pinctrl_gpio_leds: gpioledsgrp {
 430                         fsl,pins = <
 431                                 MX6QDL_PAD_KEY_COL2__GPIO4_IO10         0x1b0b0
 432                                 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11         0x1b0b0
 433                         >;
 434                 };
 435
 436                 pinctrl_pcie: pciegrp {
 437                         fsl,pins = <
 438                                 MX6QDL_PAD_GPIO_0__GPIO1_IO00           0x1b0b0
 439                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x4001b0b0 /* PCIESKT_WDIS# */
 440                         >;
 441                 };
 442
 443                 pinctrl_pps: ppsgrp {
 444                         fsl,pins = <
 445                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
 446                         >;
 447                 };
 448
 449                 pinctrl_pwm2: pwm2grp {
 450                         fsl,pins = <
 451                                 MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
 452                         >;
 453                 };
 454
 455                 pinctrl_pwm3: pwm3grp {
 456                         fsl,pins = <
 457                                 MX6QDL_PAD_SD4_DAT1__PWM3_OUT           0x1b0b1
 458                         >;
 459                 };
 460
 461                 pinctrl_pwm4: pwm4grp {
 462                         fsl,pins = <
 463                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 464                         >;
 465                 };
 466
 467                 pinctrl_uart2: uart2grp {
 468                         fsl,pins = <
 469                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 470                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 471                         >;
 472                 };
 473
 474                 pinctrl_uart3: uart3grp {
 475                         fsl,pins = <
 476                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 477                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 478                         >;
 479                 };
 480
 481                 pinctrl_uart4: uart4grp {
 482                         fsl,pins = <
 483                                 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
 484                                 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
 485                         >;
 486                 };
 487
 488                 pinctrl_uart5: uart5grp {
 489                         fsl,pins = <
 490                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 491                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 492                         >;
 493                 };
 494
 495                 pinctrl_usbotg: usbotggrp {
 496                         fsl,pins = <
 497                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 498                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x1b0b0 /* OTG_PWR_EN */
 499                         >;
 500                 };
 501
 502                 pinctrl_usdhc3: usdhc3grp {
 503                         fsl,pins = <
 504                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 505                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 506                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 507                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 508                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 509                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 510                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x17059 /* CD */
 511                                 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x17059
 512                         >;
 513                 };
 514
 515                 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 516                         fsl,pins = <
 517                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
 518                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
 519                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170b9
 520                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170b9
 521                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170b9
 522                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170b9
 523                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x170b9 /* CD */
 524                                 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x170b9
 525                         >;
 526                 };
 527
 528                 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 529                         fsl,pins = <
 530                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
 531                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
 532                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170f9
 533                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170f9
 534                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170f9
 535                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170f9
 536                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x170f9 /* CD */
 537                                 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x170f9
 538                         >;
 539                 };
 540
 541                 pinctrl_wdog: wdoggrp {
 542                         fsl,pins = <
 543                                 MX6QDL_PAD_DISP0_DAT8__WDOG1_B          0x1b0b0
 544                         >;
 545                 };
 546         };
 547 };