clean up PCI bus topology

This makes the PCI bus topology more standard for devices behind a bridge

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 35078

diff --git a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
index 8fccbbf4522fe8b81b37629722374cf9068c9d99..4f5d50054f1c8e4f6b79b51bf1ca8512899d5780 100644 (file)
--- a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
+++ b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
@@ -59,9 +59,9 @@ __set_direction(struct cns3xxx_gpio_chip *cchip, unsigned pin, int input)
 
        reg = __raw_readl(cchip->base + GPIO_DIR);
        if (input)
-               reg |= 1 << pin;
+               reg &= ~(1 << pin);
        else
-               reg &= !(1 << pin);
+               reg |= (1 << pin);
        __raw_writel(reg, cchip->base + GPIO_DIR);
 }