goto done;
}
- dev->phy_ptr = priv;
-
done:
return ret;
}
SUBTARGETS:=xrx200 xway xway_legacy falcon ase
KERNEL_PATCHVER:=5.4
+KERNEL_TESTING_PATCHVER:=5.10
define Target/Description
Build firmware images for Lantiq SoC
--- /dev/null
+CONFIG_ADM6996_PHY=y
+CONFIG_CPU_MIPS32_R1=y
+# CONFIG_CPU_MIPS32_R2 is not set
+CONFIG_CPU_MIPSR1=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_FIRMWARE_MEMMAP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_HW_RANDOM=y
+# CONFIG_ISDN is not set
+CONFIG_LANTIQ_ETOP=y
+CONFIG_NLS=y
+CONFIG_SGL_ALLOC=y
+CONFIG_SOC_AMAZON_SE=y
+CONFIG_SOC_TYPE_XWAY=y
+CONFIG_TARGET_ISA_REV=1
+CONFIG_USB=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_SUPPORT=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
-CONFIG_GENERIC_IRQ_IPI=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HW_RANDOM=y
CONFIG_HZ=250
CONFIG_HZ_250=y
CONFIG_HZ_PERIODIC=y
# CONFIG_LANTIQ_XRX200_LEGACY is not set
CONFIG_LEDS_GPIO=y
CONFIG_LIBFDT=y
+CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_CORE=y
CONFIG_MFD_SYSCON=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
+CONFIG_MIPS_CBPF_JIT=y
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CMDLINE_FROM_DTB=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
+# CONFIG_PCIE_LANTIQ is not set
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_RESET_LANTIQ=y
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_LANTIQ=y
+CONFIG_SERIAL_LANTIQ_CONSOLE=y
# CONFIG_SOC_AMAZON_SE is not set
# CONFIG_SOC_FALCON is not set
-CONFIG_SOC_TYPE_XWAY=y
-CONFIG_SOC_XWAY=y
+# CONFIG_SOC_XWAY is not set
CONFIG_SPI=y
CONFIG_SPI_LANTIQ_SSC=y
CONFIG_SPI_MASTER=y
--- /dev/null
+CONFIG_CPU_HAS_DIEI=y
+CONFIG_MTD_NAND_CORE=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_SPLIT_FIRMWARE_NAME="linux"
+CONFIG_PINCTRL_FALCON=y
+CONFIG_SOC_FALCON=y
+CONFIG_SPI_FALCON=y
endif
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
-@@ -51,6 +51,8 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o
+@@ -43,6 +43,8 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o
obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o
obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o
obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
+ ifx_pcie_rc_class_early_fixup);
--- a/arch/mips/pci/fixup-lantiq.c
+++ b/arch/mips/pci/fixup-lantiq.c
-@@ -6,12 +6,18 @@
+@@ -6,12 +6,19 @@
#include <linux/of_irq.h>
#include <linux/of_pci.h>
++#include <linux/pci.h>
+#include "ifxmips_pci_common.h"
int (*ltq_pci_plat_arch_init)(struct pci_dev *dev) = NULL;
if (ltq_pci_plat_arch_init)
return ltq_pci_plat_arch_init(dev);
-@@ -23,5 +29,10 @@ int pcibios_plat_dev_init(struct pci_dev
+@@ -23,5 +30,10 @@ int pcibios_plat_dev_init(struct pci_dev
int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
+
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
-@@ -52,6 +52,7 @@ config PCIEAER_INJECT
+@@ -51,6 +51,7 @@ config PCIEAER_INJECT
config PCIE_ECRC
bool "PCI Express ECRC settings control"
depends on PCIEAER
(transaction layer end-to-end CRC checking).
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
-@@ -1390,6 +1390,8 @@ void pci_walk_bus(struct pci_bus *top, i
+@@ -1416,6 +1416,8 @@ void pci_walk_bus(struct pci_bus *top, i
void *userdata);
int pci_cfg_space_size(struct pci_dev *dev);
unsigned char pci_bus_max_busnr(struct pci_bus *bus);
{
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
-@@ -62,6 +62,10 @@ void (*_dma_cache_wback_inv)(unsigned lo
+@@ -61,6 +61,10 @@ void (*_dma_cache_wback_inv)(unsigned lo
void (*_dma_cache_wback)(unsigned long start, unsigned long size);
void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+static __be32 req_mask = 0;
+
struct xway_nand_data {
+ struct nand_controller controller;
struct nand_chip chip;
- unsigned long csflags;
-@@ -91,10 +109,22 @@ static void xway_select_chip(struct nand
+@@ -92,10 +110,22 @@ static void xway_select_chip(struct nand
case -1:
ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON);
ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON);
ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON);
ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON);
break;
-@@ -107,6 +137,11 @@ static void xway_cmd_ctrl(struct nand_ch
+@@ -108,6 +138,11 @@ static void xway_cmd_ctrl(struct nand_ch
{
struct mtd_info *mtd = nand_to_mtd(chip);
if (cmd == NAND_CMD_NONE)
return;
-@@ -117,6 +152,24 @@ static void xway_cmd_ctrl(struct nand_ch
+@@ -118,6 +153,24 @@ static void xway_cmd_ctrl(struct nand_ch
while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
;
}
static int xway_dev_ready(struct nand_chip *chip)
-@@ -156,6 +209,7 @@ static int xway_nand_probe(struct platfo
+@@ -171,6 +224,7 @@ static int xway_nand_probe(struct platfo
int err;
u32 cs;
u32 cs_flag = 0;
/* Allocate memory for the device structure (and zero it) */
data = devm_kzalloc(&pdev->dev, sizeof(struct xway_nand_data),
-@@ -191,6 +245,15 @@ static int xway_nand_probe(struct platfo
+@@ -207,6 +261,15 @@ static int xway_nand_probe(struct platfo
if (!err && cs == 1)
cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1;
Signed-off-by: Mathias Kresin <dev@kresin.me>
---
- arch/mips/lantiq/xway/sysctrl.c | 14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
+ arch/mips/lantiq/xway/sysctrl.c | 18 +++++++++---------
+ 1 file changed, 9 insertions(+), 9 deletions(-)
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
+@@ -469,9 +469,9 @@ void __init ltq_soc_init(void)
+
+ if (of_machine_is_compatible("lantiq,grx390") ||
+ of_machine_is_compatible("lantiq,ar10")) {
+- clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY0);
+- clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY1);
+- clkdev_add_pmu("1e108000.switch", "gphy2", 0, 0, PMU_GPHY2);
++ clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY0);
++ clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY1);
++ clkdev_add_pmu("1f2030ac.gphy", NULL, 1, 0, PMU_GPHY2);
+ clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB0_P);
+ clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB1_P);
+ /* rc 0 */
@@ -503,7 +503,7 @@ void __init ltq_soc_init(void)
+ } else if (of_machine_is_compatible("lantiq,grx390")) {
+ clkdev_add_static(ltq_grx390_cpu_hz(), ltq_grx390_fpi_hz(),
+ ltq_grx390_fpi_hz(), ltq_grx390_pp32_hz());
+- clkdev_add_pmu("1e108000.switch", "gphy3", 0, 0, PMU_GPHY3);
++ clkdev_add_pmu("1f203264.gphy", NULL, 1, 0, PMU_GPHY3);
+ clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
+ clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
+ /* rc 2 */
+@@ -511,7 +511,7 @@ void __init ltq_soc_init(void)
clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
} else if (of_machine_is_compatible("lantiq,ar10")) {
-@@ -511,11 +511,11 @@ void __init ltq_soc_init(void)
+@@ -519,7 +519,7 @@ void __init ltq_soc_init(void)
ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
PMU_PPE_DP | PMU_PPE_TC);
clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
-- clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
-- clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
-+ clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY);
-+ clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY);
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
- clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE);
- clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
-@@ -534,12 +534,12 @@ void __init ltq_soc_init(void)
+@@ -540,12 +540,12 @@ void __init ltq_soc_init(void)
clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
-@@ -108,7 +108,13 @@ config LANTIQ_ETOP
+@@ -107,7 +107,13 @@ config LANTIQ_ETOP
tristate "Lantiq SoC ETOP driver"
depends on SOC_TYPE_XWAY
- ---help---
+ help
- Support for the MII0 inside the Lantiq SoC
+ Support for the MII0 inside the Lantiq ADSL SoC
+
+config LANTIQ_XRX200_LEGACY
+ tristate "Lantiq SoC XRX200 driver"
+ depends on SOC_TYPE_XWAY
-+ ---help---
++ help
+ Support for the MII0 inside the Lantiq VDSL SoC
config LANTIQ_XRX200
tristate "Lantiq / Intel xRX200 PMAC network driver"
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
-@@ -51,6 +51,7 @@ obj-$(CONFIG_JME) += jme.o
+@@ -50,6 +50,7 @@ obj-$(CONFIG_JME) += jme.o
obj-$(CONFIG_KORINA) += korina.o
obj-$(CONFIG_LANTIQ_ETOP) += lantiq_etop.o
obj-$(CONFIG_LANTIQ_XRX200) += lantiq_xrx200.o
+};
--- /dev/null
+++ b/drivers/net/ethernet/lantiq_xrx200_legacy.c
-@@ -0,0 +1,1927 @@
+@@ -0,0 +1,1930 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ return &priv->stats;
+}
+
-+static void xrx200_tx_timeout(struct net_device *dev)
++static void xrx200_tx_timeout(struct net_device *dev, unsigned int txqueue)
+{
+ struct xrx200_priv *priv = netdev_priv(dev);
+
+ return 0;
+}
+
-+static void xrx200_phy_link_change(struct phy_device *phydev, bool up, bool do_carrier)
++static void xrx200_phy_link_change(struct phy_device *phydev, bool up)
+{
+ struct net_device *netdev = phydev->attached_dev;
+
-+ if (do_carrier) {
-+ if (up)
-+ netif_carrier_on(netdev);
-+ else if (!xrx200_phy_has_link(netdev))
-+ netif_carrier_off(netdev);
-+ }
++ if (up)
++ netif_carrier_on(netdev);
++ else if (!xrx200_phy_has_link(netdev))
++ netif_carrier_off(netdev);
+
+ phydev->adjust_link(netdev);
+}
+{
+ const __be32 *addr, *id = of_get_property(port, "reg", NULL);
+ struct xrx200_port *p = &priv->port[priv->num_port];
++ int ret;
+
+ if (!id)
+ return;
+
+ p->num = *id;
+ p->phy_addr = *addr;
-+ p->phy_if = of_get_phy_mode(port);
++
++ ret = of_get_phy_mode(port, &p->phy_if);
++ if (ret)
++ pr_err("Can't find phy-mode for port\n");
++
+ if (p->phy_addr > 0x10)
+ p->flags = XRX200_PORT_TYPE_MAC;
+ else
+ int rx_irq;
+
+ unsigned char mac[6];
-+ int mii_mode;
++ phy_interface_t mii_mode;
+
+ spinlock_t lock;
+
{
struct ltq_etop_priv *priv = netdev_priv(dev);
- int i;
-+ int mii_mode = priv->mii_mode;
++ phy_interface_t mii_mode = priv->mii_mode;
- ltq_pmu_enable(PMU_PPE);
+ clk_enable(priv->clk_ppe);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
-@@ -563,6 +760,9 @@ ltq_etop_init(struct net_device *dev)
+@@ -556,6 +753,9 @@ ltq_etop_init(struct net_device *dev)
if (err)
goto err_hw;
ltq_etop_change_mtu(dev, 1500);
memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
if (!is_valid_ether_addr(mac.sa_data)) {
-@@ -580,9 +780,10 @@ ltq_etop_init(struct net_device *dev)
+@@ -573,9 +773,10 @@ ltq_etop_init(struct net_device *dev)
dev->addr_assign_type = NET_ADDR_RANDOM;
ltq_etop_set_multicast_list(dev);
return 0;
err_netdev:
-@@ -602,6 +803,9 @@ ltq_etop_tx_timeout(struct net_device *d
+@@ -595,6 +796,9 @@ ltq_etop_tx_timeout(struct net_device *d
err = ltq_etop_hw_init(dev);
if (err)
goto err_hw;
netif_trans_update(dev);
netif_wake_queue(dev);
return;
-@@ -625,14 +829,19 @@ static const struct net_device_ops ltq_e
+@@ -618,14 +822,19 @@ static const struct net_device_ops ltq_e
.ndo_tx_timeout = ltq_etop_tx_timeout,
};
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
-@@ -658,31 +867,62 @@ ltq_etop_probe(struct platform_device *p
+@@ -651,31 +860,64 @@ ltq_etop_probe(struct platform_device *p
goto err_out;
}
+ err = -ENOENT;
+ goto err_out;
+ }
-+ ltq_gbit_membase = devm_ioremap_nocache(&pdev->dev,
++ ltq_gbit_membase = devm_ioremap(&pdev->dev,
+ gbit_res->start, resource_size(gbit_res));
+ if (!ltq_gbit_membase) {
+ dev_err(&pdev->dev, "failed to remap gigabit switch %d\n",
priv->netdev = dev;
+ priv->tx_irq = irqres[0].start;
+ priv->rx_irq = irqres[1].start;
-+ priv->mii_mode = of_get_phy_mode(pdev->dev.of_node);
++ err = of_get_phy_mode(pdev->dev.of_node, &priv->mii_mode);
++ if (err)
++ pr_err("Can't find phy-mode for port\n");
+
+ mac = of_get_mac_address(pdev->dev.of_node);
+ if (mac)
err = register_netdev(dev);
if (err)
-@@ -711,31 +951,22 @@ ltq_etop_remove(struct platform_device *
+@@ -704,31 +946,22 @@ ltq_etop_remove(struct platform_device *
return 0;
}
#include "gpiolib.h"
#include "gpiolib-of.h"
-@@ -915,3 +917,72 @@ void of_gpiochip_remove(struct gpio_chip
+@@ -1039,3 +1041,72 @@ void of_gpiochip_remove(struct gpio_chip
{
of_node_put(chip->of_node);
}
+#endif
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
-@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g
+@@ -125,6 +125,12 @@ static inline int gpio_export(unsigned g
return gpiod_export(gpio_to_desc(gpio), direction_may_change);
}
{
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
-@@ -668,6 +668,7 @@ static inline void devm_acpi_dev_remove_
+@@ -715,6 +715,7 @@ static inline void devm_acpi_dev_remove_
#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
int gpiod_export_link(struct device *dev, const char *name,
struct gpio_desc *desc);
-@@ -675,6 +676,13 @@ void gpiod_unexport(struct gpio_desc *de
+@@ -722,6 +723,13 @@ void gpiod_unexport(struct gpio_desc *de
#else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */
{
--- a/drivers/gpio/gpiolib-sysfs.c
+++ b/drivers/gpio/gpiolib-sysfs.c
-@@ -563,7 +563,7 @@ static struct class gpio_class = {
+@@ -564,7 +564,7 @@ static struct class gpio_class = {
*
* Returns zero on success, else an error.
*/
{
struct gpio_chip *chip;
struct gpio_device *gdev;
-@@ -625,6 +625,8 @@ int gpiod_export(struct gpio_desc *desc,
+@@ -626,6 +626,8 @@ int gpiod_export(struct gpio_desc *desc,
offset = gpio_chip_hwgpio(desc);
if (chip->names && chip->names[offset])
ioname = chip->names[offset];
dev = device_create_with_groups(&gpio_class, &gdev->dev,
MKDEV(0, 0), data, gpio_groups,
-@@ -646,6 +648,12 @@ err_unlock:
+@@ -647,6 +649,12 @@ err_unlock:
gpiod_dbg(desc, "%s: status %d\n", __func__, status);
return status;
}
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
-@@ -729,6 +729,16 @@ config I2C_MESON
+@@ -753,6 +753,16 @@ config I2C_MESON
If you say yes to this option, support will be included for the
I2C interface on the Amlogic Meson family of SoCs.
depends on PPC
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
-@@ -73,6 +73,7 @@ obj-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-l
+@@ -72,6 +72,7 @@ obj-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-l
obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
obj-$(CONFIG_I2C_JZ4780) += i2c-jz4780.o
obj-$(CONFIG_I2C_KEMPLD) += i2c-kempld.o
+early_param("ethaddr", setup_ethaddr);
--- a/drivers/net/ethernet/lantiq_etop.c
+++ b/drivers/net/ethernet/lantiq_etop.c
-@@ -764,7 +764,11 @@ ltq_etop_init(struct net_device *dev)
+@@ -757,7 +757,11 @@ ltq_etop_init(struct net_device *dev)
if (err)
goto err_hw;
Signed-off-by: John Crispin <john@phrozen.org>
---
- arch/mips/include/asm/io.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
+ arch/mips/include/asm/mach-lantiq/spaces.h | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+ create mode 100644 arch/mips/include/asm/mach-lantiq/spaces.h
---- a/arch/mips/include/asm/io.h
-+++ b/arch/mips/include/asm/io.h
-@@ -53,7 +53,7 @@
-
- /* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
-
--#define IO_SPACE_LIMIT 0xffff
-+#define IO_SPACE_LIMIT 0xffffffff
-
- /*
- * On MIPS I/O ports are memory mapped, so we access them using normal
+--- /dev/null
++++ b/arch/mips/include/asm/mach-lantiq/spaces.h
+@@ -0,0 +1,8 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++#ifndef __ASM_MACH_LANTIQ_SPACES_H_
++#define __ASM_MACH_LANTIQ_SPACES_H_
++
++#define IO_SPACE_LIMIT 0xffffffff
++
++#include <asm/mach-generic/spaces.h>
++#endif
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -92,7 +92,14 @@ static void dwc2_set_rk_params(struct dw
- p->power_down = 0;
+ p->power_down = DWC2_POWER_DOWN_PARAM_NONE;
}
-static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg)
{
struct dwc2_core_params *p = &hsotg->params;
-@@ -167,8 +182,11 @@ const struct of_device_id dwc2_of_match_
+@@ -196,8 +211,11 @@ const struct of_device_id dwc2_of_match_
{ .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
{ .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
{ .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params },
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
-@@ -244,6 +244,25 @@ static void pmu_disable(struct clk *clk)
+@@ -248,6 +248,25 @@ static void pmu_disable(struct clk *clk)
pr_warn("deactivating PMU module failed!");
}
/* the pci enable helper */
static int pci_enable(struct clk *clk)
{
-@@ -565,4 +584,5 @@ void __init ltq_soc_init(void)
+@@ -571,4 +590,5 @@ void __init ltq_soc_init(void)
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0);
}
--- a/drivers/mtd/parsers/ofpart_core.c
+++ b/drivers/mtd/parsers/ofpart_core.c
-@@ -33,6 +33,38 @@ static bool node_has_compatible(struct d
+@@ -38,6 +38,38 @@ static bool node_has_compatible(struct d
return of_get_property(pp, "compatible", NULL);
}
static int parse_fixed_partitions(struct mtd_info *master,
const struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
-@@ -46,6 +78,8 @@ static int parse_fixed_partitions(struct
+@@ -51,6 +83,8 @@ static int parse_fixed_partitions(struct
struct device_node *pp;
int nr_parts, i, ret = 0;
bool dedicated = true;
/* Pull of_node from the master device node */
mtd_node = mtd_get_of_node(master);
-@@ -86,7 +120,9 @@ static int parse_fixed_partitions(struct
+@@ -93,7 +127,9 @@ static int parse_fixed_partitions(struct
return 0;
parts = kcalloc(nr_parts, sizeof(*parts), GFP_KERNEL);
return -ENOMEM;
i = 0;
-@@ -135,6 +171,11 @@ static int parse_fixed_partitions(struct
- if (of_get_property(pp, "lock", &len))
- parts[i].mask_flags |= MTD_POWERUP_LOCK;
+@@ -145,6 +181,11 @@ static int parse_fixed_partitions(struct
+ if (of_property_read_bool(pp, "slc-mode"))
+ parts[i].add_flags |= MTD_SLC_ON_MLC_EMULATION;
+ if (!proot_id && of_device_is_compatible(pp, "brnboot,root-selector"))
+ proot_id = brnboot_get_selected_root_part(master, parts[i].offset);
i++;
}
-@@ -144,6 +185,11 @@ static int parse_fixed_partitions(struct
+@@ -154,6 +195,11 @@ static int parse_fixed_partitions(struct
if (quirks && quirks->post_parse)
quirks->post_parse(master, parts, nr_parts);
*pparts = parts;
return nr_parts;
-@@ -154,6 +200,7 @@ ofpart_fail:
+@@ -164,6 +210,7 @@ ofpart_fail:
ofpart_none:
of_node_put(pp);
kfree(parts);
struct clk *clk;
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
-@@ -51,7 +51,7 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o
+@@ -43,7 +43,7 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o
obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o
obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o
obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -2377,6 +2377,12 @@ config MIPS_VPE_LOADER
+@@ -2425,6 +2425,12 @@ config MIPS_VPE_LOADER
Includes a loader for loading an elf relocatable object
onto another VPE and running it.
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
-@@ -422,6 +422,20 @@ static void clkdev_add_clkout(void)
+@@ -426,6 +426,20 @@ static void clkdev_add_clkout(void)
}
}
/* bring up all register ranges that we need for basic system control */
void __init ltq_soc_init(void)
{
-@@ -585,4 +599,6 @@ void __init ltq_soc_init(void)
+@@ -591,4 +605,6 @@ void __init ltq_soc_init(void)
clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0);
}
usb_set_clock();
--- /dev/null
+CONFIG_AT803X_PHY=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_CPU_HAS_DIEI=y
+CONFIG_CPU_MIPSR2_IRQ_EI=y
+CONFIG_CPU_MIPSR2_IRQ_VI=y
+CONFIG_CPU_RMAP=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_HASH_INFO=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_NULL2=y
+CONFIG_CRYPTO_ZSTD=y
+CONFIG_EXTRA_FIRMWARE="lantiq/xrx200_phy11g_a14.bin lantiq/xrx200_phy11g_a22.bin lantiq/xrx200_phy22f_a14.bin lantiq/xrx200_phy22f_a22.bin"
+CONFIG_EXTRA_FIRMWARE_DIR="firmware"
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HWMON=y
+CONFIG_HW_RANDOM=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_IFX_VPE_EXT=y
+CONFIG_INPUT=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_POLLDEV=y
+CONFIG_INTEL_XWAY_PHY=y
+# CONFIG_ISDN is not set
+CONFIG_LANTIQ_XRX200_LEGACY=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_MIPS_MT=y
+# CONFIG_MIPS_MT_FPAFF is not set
+CONFIG_MIPS_MT_SMP=y
+CONFIG_MIPS_NR_CPU_NR_MAP=2
+CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
+CONFIG_MIPS_VPE_APSP_API=y
+CONFIG_MIPS_VPE_APSP_API_MT=y
+CONFIG_MIPS_VPE_LOADER=y
+CONFIG_MIPS_VPE_LOADER_MT=y
+CONFIG_MIPS_VPE_LOADER_TOM=y
+CONFIG_MTD_NAND_CORE=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+CONFIG_MTD_NAND_PLATFORM=y
+CONFIG_MTD_NAND_XWAY=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NLS=y
+CONFIG_NR_CPUS=2
+CONFIG_PADATA=y
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIE_LANTIQ=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_LANTIQ=y
+CONFIG_PHY_LANTIQ_VRX200_PCIE=y
+CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_SUPPLY_HWMON=y
+CONFIG_QUEUED_RWLOCKS=y
+CONFIG_QUEUED_SPINLOCKS=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_SENSORS_LTQ_CPUTEMP=y
+CONFIG_SGL_ALLOC=y
+CONFIG_SMP=y
+CONFIG_SMP_UP=y
+CONFIG_SOC_TYPE_XWAY=y
+CONFIG_SOC_XWAY=y
+CONFIG_SWCONFIG_LEDS=y
+CONFIG_SYNC_R4K=y
+CONFIG_SYS_SUPPORTS_SCHED_SMT=y
+CONFIG_SYS_SUPPORTS_SMP=y
+CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UBIFS_FS_ZSTD=y
+CONFIG_USB=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_SUPPORT=y
+CONFIG_XPS=y
+CONFIG_XRX200_PHY_FW=y
+CONFIG_XXHASH=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZSTD_COMPRESS=y
+CONFIG_ZSTD_DECOMPRESS=y
--- /dev/null
+CONFIG_ADM6996_PHY=y
+CONFIG_AR8216_PHY=y
+CONFIG_AT803X_PHY=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_CPU_HAS_DIEI=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_HASH_INFO=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HW_RANDOM=y
+CONFIG_INPUT=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_ISDN is not set
+CONFIG_LANTIQ_ETOP=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_MTD_NAND_CORE=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+CONFIG_MTD_NAND_XWAY=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_NLS=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_LANTIQ=y
+CONFIG_PSB6970_PHY=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_RTL8306_PHY=y
+CONFIG_RTL8366RB_PHY=y
+CONFIG_RTL8366S_PHY=y
+CONFIG_RTL8366_SMI=y
+CONFIG_RTL8367B_PHY=y
+CONFIG_RTL8367_PHY=y
+CONFIG_SGL_ALLOC=y
+CONFIG_SOC_TYPE_XWAY=y
+CONFIG_SOC_XWAY=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_USB=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_SUPPORT=y
--- /dev/null
+CONFIG_ADM6996_PHY=y
+CONFIG_AR8216_PHY=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_CPU_HAS_DIEI=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_GENERIC_ALLOCATOR=y
+# CONFIG_GPIO_SYSFS is not set
+CONFIG_INPUT=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_ISDN is not set
+CONFIG_LANTIQ_ETOP=y
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_NLS=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_LANTIQ=y
+CONFIG_PSB6970_PHY=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_RTL8306_PHY=y
+CONFIG_RTL8366RB_PHY=y
+CONFIG_RTL8366S_PHY=y
+CONFIG_RTL8366_SMI=y
+CONFIG_RTL8367B_PHY=y
+CONFIG_RTL8367_PHY=y
+CONFIG_SGL_ALLOC=y
+CONFIG_SOC_TYPE_XWAY=y
+CONFIG_SOC_XWAY=y
+CONFIG_USB=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_SUPPORT=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
projects / openwrt / staging / dedeckeh.git / commitdiff