3059c1285879c98a428ad9b0b1e645d5d5078a38
[openwrt/staging/dedeckeh.git] / target / linux / lantiq / files / arch / mips / boot / dts / FRITZ7412.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include "vr9.dtsi"
5
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
8
9 / {
10 compatible = "avm,fritz7412", "lantiq,xway", "lantiq,vr9";
11 model = "AVM FRITZ!Box 7412";
12
13 chosen {
14 bootargs = "console=ttyLTQ0,115200 mem=126M vpe1_load_addr=0x87e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp";
15 };
16
17 aliases {
18 led-boot = &power_green;
19 led-failsafe = &power_red;
20 led-running = &power_green;
21
22 led-dsl = &info;
23 led-wifi = &wifi;
24 };
25
26 memory@0 {
27 reg = <0x0 0x8000000>;
28 };
29
30 keys {
31 compatible = "gpio-keys-polled";
32 poll-interval = <100>;
33
34 wps {
35 label = "wps";
36 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
37 linux,code = <KEY_WPS_BUTTON>;
38 };
39
40 dect {
41 label = "dect";
42 gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
43 linux,code = <KEY_PHONE>;
44 };
45 };
46
47 leds {
48 compatible = "gpio-leds";
49
50 power_green: power_green {
51 label = "fritz7412:green:power";
52 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
53 default-state = "keep";
54 };
55
56 power_red: power_red {
57 label = "fritz7412:red:power";
58 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
59 };
60
61 fon {
62 label = "fritz7412:green:fon";
63 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
64 };
65
66 dect {
67 label = "fritz7412:green:dect";
68 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
69 };
70
71 wifi: wifi {
72 label = "fritz7412:green:wifi";
73 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
74 };
75
76 info: info {
77 label = "fritz7412:green:info";
78 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
79 };
80 };
81 };
82
83 &localbus {
84 nand@0 {
85 compatible = "lantiq,nand-xway";
86 bank-width = <2>;
87 reg = <0 0x0 0x2000000>;
88 #address-cells = <1>;
89 #size-cells = <1>;
90 lantiq,cs = <1>;
91
92 partitions {
93 compatible = "fixed-partitions";
94 #address-cells = <1>;
95 #size-cells = <1>;
96
97 partition@0 {
98 label = "urlader";
99 reg = <0x0 0x40000>;
100 read-only;
101 };
102
103 partition@40000 {
104 label = "nand-tffs";
105 reg = <0x40000 0x400000>;
106 read-only;
107 };
108
109 partition@440000 {
110 label = "kernel";
111 reg = <0x440000 0x400000>;
112 };
113
114 partition@840000 {
115 label = "ubi";
116 reg = <0x840000 0x3000000>;
117 };
118
119 partition@3840000 {
120 label = "reserved-kernel";
121 reg = <0x3840000 0x400000>;
122 read-only;
123 };
124
125 partition@3c40000 {
126 label = "reserved-filesystem";
127 reg = <0x3c40000 0x3000000>;
128 read-only;
129 };
130
131 partition@6c40000 {
132 label = "config";
133 reg = <0x6c40000 0x400000>;
134 read-only;
135 };
136
137 partition@6e40000 {
138 label = "nand-filesystem";
139 reg = <0x6e40000 0x400000>;
140 read-only;
141 };
142 };
143 };
144 };
145
146 &pcie0 {
147 status = "okay";
148 gpio-reset = <&gpio 11 GPIO_ACTIVE_HIGH>;
149
150 pcie@0 {
151 reg = <0 0 0 0 0>;
152 #interrupt-cells = <1>;
153 #size-cells = <2>;
154 #address-cells = <3>;
155 device_type = "pci";
156
157 wifi@168c,002e {
158 compatible = "pci168c,002e";
159 reg = <0 0 0 0 0>;
160 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
161 };
162 };
163 };
164
165 &gpio {
166 pinctrl-names = "default";
167 pinctrl-0 = <&state_default>;
168
169 state_default: pinmux {
170 mdio {
171 lantiq,groups = "mdio";
172 lantiq,function = "mdio";
173 };
174 pcie-rst {
175 lantiq,pins = "io11";
176 lantiq,open-drain = <1>;
177 lantiq,output = <1>;
178 };
179 nand-mux {
180 lantiq,groups = "nand cle", "nand ale",
181 "nand rd", "nand cs1",
182 "nand rdy";
183 lantiq,function = "ebu";
184 };
185 nand-pins {
186 lantiq,pins = "io13", "io24", "io49";
187 lantiq,pull = <1>;
188 };
189 };
190 };
191
192 &gphy0 {
193 lantiq,gphy-mode = <GPHY_MODE_FE>;
194 };
195
196 &eth0 {
197 lantiq,phys = <&gphy0>;
198
199 interface@0 {
200 compatible = "lantiq,xrx200-pdi";
201 #address-cells = <1>;
202 #size-cells = <0>;
203 reg = <0>;
204 mac-address = [ 00 11 22 33 44 55 ];
205 lantiq,switch;
206
207 ethernet@2 {
208 compatible = "lantiq,xrx200-pdi-port";
209 reg = <2>;
210 phy-mode = "gmii";
211 phy-handle = <&phy11>;
212 };
213 };
214
215 mdio@0 {
216 #address-cells = <1>;
217 #size-cells = <0>;
218 reg = <0>;
219 compatible = "lantiq,xrx200-mdio";
220
221 phy11: ethernet-phy@11 {
222 reg = <0x11>;
223 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
224 };
225 };
226 };
227
228 &vmmc {
229 status = "okay";
230 };