target/linux/ipq807x/patches-5.15/0038-v6.1-clk-qcom-clk-rcg2-add-rcg2-mux-ops.patch

   1 From f7fb35d540240889a8f45f3fd42363cbc1a448e2 Mon Sep 17 00:00:00 2001
   2 From: Christian Marangi <ansuelsmth@gmail.com>
   3 Date: Fri, 19 Aug 2022 00:06:20 +0200
   4 Subject: [PATCH] clk: qcom: clk-rcg2: add rcg2 mux ops
   5
   6 An RCG may act as a mux that switch between 2 parents.
   7 This is the case on IPQ6018 and IPQ8074 where the APCS core clk that feeds
   8 the CPU cluster clock just switches between XO and the PLL that feeds it.
   9
  10 Add the required ops to add support for this special configuration and use
  11 the generic mux function to determine the rate.
  12
  13 This way we dont have to keep a essentially dummy frequency table to use
  14 RCG2 as a mux.
  15
  16 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  17 Signed-off-by: Robert Marko <robimarko@gmail.com>
  18 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
  19 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  20 Link: https://lore.kernel.org/r/20220818220628.339366-1-robimarko@gmail.com
  21 ---
  22  drivers/clk/qcom/clk-rcg.h  | 1 +
  23  drivers/clk/qcom/clk-rcg2.c | 7 +++++++
  24  2 files changed, 8 insertions(+)
  25
  26 --- a/drivers/clk/qcom/clk-rcg.h
  27 +++ b/drivers/clk/qcom/clk-rcg.h
  28 @@ -164,6 +164,7 @@ struct clk_rcg2_gfx3d {
  29
  30  extern const struct clk_ops clk_rcg2_ops;
  31  extern const struct clk_ops clk_rcg2_floor_ops;
  32 +extern const struct clk_ops clk_rcg2_mux_closest_ops;
  33  extern const struct clk_ops clk_edp_pixel_ops;
  34  extern const struct clk_ops clk_byte_ops;
  35  extern const struct clk_ops clk_byte2_ops;
  36 --- a/drivers/clk/qcom/clk-rcg2.c
  37 +++ b/drivers/clk/qcom/clk-rcg2.c
  38 @@ -477,6 +477,13 @@ const struct clk_ops clk_rcg2_floor_ops
  39  };
  40  EXPORT_SYMBOL_GPL(clk_rcg2_floor_ops);
  41
  42 +const struct clk_ops clk_rcg2_mux_closest_ops = {
  43 +       .determine_rate = __clk_mux_determine_rate_closest,
  44 +       .get_parent = clk_rcg2_get_parent,
  45 +       .set_parent = clk_rcg2_set_parent,
  46 +};
  47 +EXPORT_SYMBOL_GPL(clk_rcg2_mux_closest_ops);
  48 +
  49  struct frac_entry {
  50         int num;
  51         int den;