target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
   3  * Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  */
  18
  19 #include "qcom-ipq4019.dtsi"
  20 #include <dt-bindings/gpio/gpio.h>
  21 #include <dt-bindings/input/input.h>
  22 #include <dt-bindings/soc/qcom,tcsr.h>
  23
  24 / {
  25         model = "Compex WPJ428";
  26         compatible = "compex,wpj428";
  27
  28         soc {
  29                 rng@22000 {
  30                         status = "okay";
  31                 };
  32
  33                 mdio@90000 {
  34                         status = "okay";
  35                         pinctrl-0 = <&mdio_pins>;
  36                         pinctrl-names = "default";
  37                         reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
  38                         reset-delay-us = <2000>;
  39                 };
  40
  41                 tcsr@194b000 {
  42                         /* select hostmode */
  43                         compatible = "qcom,tcsr";
  44                         reg = <0x194b000 0x100>;
  45                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  46                         status = "okay";
  47                 };
  48
  49                 tcsr@1949000 {
  50                         compatible = "qcom,tcsr";
  51                         reg = <0x1949000 0x100>;
  52                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  53                 };
  54
  55                 ess_tcsr@1953000 {
  56                         compatible = "qcom,tcsr";
  57                         reg = <0x1953000 0x1000>;
  58                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  59                 };
  60
  61                 tcsr@1957000 {
  62                         compatible = "qcom,tcsr";
  63                         reg = <0x1957000 0x100>;
  64                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  65                 };
  66
  67                 usb2: usb2@60f8800 {
  68                         status = "okay";
  69                 };
  70
  71                 usb3: usb3@8af8800 {
  72                         status = "okay";
  73                 };
  74
  75                 crypto@8e3a000 {
  76                         status = "okay";
  77                 };
  78
  79                 watchdog@b017000 {
  80                         status = "okay";
  81                 };
  82         };
  83
  84         keys {
  85                 compatible = "gpio-keys";
  86
  87                 reset {
  88                         label = "reset";
  89                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  90                         linux,code = <KEY_RESTART>;
  91                 };
  92         };
  93
  94         aliases {
  95                 led-boot = &status;
  96                 led-failsafe = &status;
  97                 led-upgrade = &status;
  98         };
  99
 100         leds {
 101                 compatible = "gpio-leds";
 102
 103                 status: rss4 {
 104                         label = "green:rss4";
 105                         gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
 106                 };
 107
 108                 rss3 {
 109                         label = "green:rss3";
 110                         gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
 111                 };
 112         };
 113
 114         beeper: beeper {
 115                 compatible = "gpio-beeper";
 116                 gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
 117         };
 118 };
 119
 120 &tlmm {
 121         mdio_pins: mdio_pinmux {
 122                 mux_1 {
 123                         pins = "gpio53";
 124                         function = "mdio";
 125                         bias-pull-up;
 126                 };
 127
 128                 mux_2 {
 129                         pins = "gpio52";
 130                         function = "mdc";
 131                         bias-pull-up;
 132                 };
 133         };
 134
 135         serial_pins: serial_pinmux {
 136                 mux {
 137                         pins = "gpio60", "gpio61";
 138                         function = "blsp_uart0";
 139                         bias-disable;
 140                 };
 141         };
 142
 143         spi_0_pins: spi_0_pinmux {
 144                 pin {
 145                         function = "blsp_spi0";
 146                         pins = "gpio55", "gpio56", "gpio57";
 147                         drive-strength = <12>;
 148                         bias-disable;
 149                 };
 150                 pin_cs {
 151                         function = "gpio";
 152                         pins = "gpio54";
 153                         drive-strength = <2>;
 154                         bias-disable;
 155                         output-high;
 156                 };
 157         };
 158 };
 159
 160 &blsp_dma {
 161         status = "okay";
 162 };
 163
 164 &blsp1_spi1 {
 165         pinctrl-0 = <&spi_0_pins>;
 166         pinctrl-names = "default";
 167         status = "okay";
 168         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 169
 170         m25p80@0 {
 171                 compatible = "jedec,spi-nor";
 172                 reg = <0>;
 173                 spi-max-frequency = <24000000>;
 174
 175                 partitions {
 176                         compatible = "fixed-partitions";
 177                         #address-cells = <1>;
 178                         #size-cells = <1>;
 179
 180                         partition0@0 {
 181                                 label = "0:SBL1";
 182                                 reg = <0x00000000 0x00040000>;
 183                                 read-only;
 184                         };
 185                         partition1@40000 {
 186                                 label = "0:MIBIB";
 187                                 reg = <0x00040000 0x00020000>;
 188                                 read-only;
 189                         };
 190                         partition2@60000 {
 191                                 label = "0:QSEE";
 192                                 reg = <0x00060000 0x00060000>;
 193                                 read-only;
 194                         };
 195                         partition3@c0000 {
 196                                 label = "0:CDT";
 197                                 reg = <0x000c0000 0x00010000>;
 198                                 read-only;
 199                         };
 200                         partition4@d0000 {
 201                                 label = "0:DDRPARAMS";
 202                                 reg = <0x000d0000 0x00010000>;
 203                                 read-only;
 204                         };
 205                         partition5@e0000 {
 206                                 label = "0:APPSBLENV"; /* uboot env*/
 207                                 reg = <0x000e0000 0x00010000>;
 208                                 read-only;
 209                         };
 210                         partition5@f0000 {
 211                                 label = "0:APPSBL"; /* uboot */
 212                                 reg = <0x000f0000 0x00080000>;
 213                                 read-only;
 214                         };
 215                         partition5@170000 {
 216                                 label = "0:ART";
 217                                 reg = <0x00170000 0x00010000>;
 218                                 read-only;
 219                                 compatible = "nvmem-cells";
 220                                 #address-cells = <1>;
 221                                 #size-cells = <1>;
 222
 223                                 precal_art_1000: precal@1000 {
 224                                         reg = <0x1000 0x2f20>;
 225                                 };
 226
 227                                 precal_art_5000: precal@5000 {
 228                                         reg = <0x5000 0x2f20>;
 229                                 };
 230                         };
 231                         partition6@180000 {
 232                                 compatible = "denx,fit";
 233                                 label = "firmware";
 234                                 reg = <0x00180000 0x01e80000>;
 235                         };
 236                 };
 237         };
 238 };
 239
 240 &blsp1_uart1 {
 241         pinctrl-0 = <&serial_pins>;
 242         pinctrl-names = "default";
 243         status = "okay";
 244 };
 245
 246 &cryptobam {
 247         status = "okay";
 248 };
 249
 250 &usb3_ss_phy {
 251         status = "okay";
 252 };
 253
 254 &usb3_hs_phy {
 255         status = "okay";
 256 };
 257
 258 &usb2_hs_phy {
 259         status = "okay";
 260 };
 261
 262 &wifi0 {
 263         status = "okay";
 264         nvmem-cell-names = "pre-calibration";
 265         nvmem-cells = <&precal_art_1000>;
 266 };
 267
 268 &wifi1 {
 269         status = "okay";
 270         nvmem-cell-names = "pre-calibration";
 271         nvmem-cells = <&precal_art_5000>;
 272 };