target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /*
   4  * Device Tree Source for Linksys xx8300 (Dallas)
   5  *
   6  * Copyright (C) 2019, 2022 Jeff Kletsky
   7  * Updated 2020 Hans Geiblinger
   8  *
   9  */
  10
  11 #include "qcom-ipq4019.dtsi"
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14 #include <dt-bindings/soc/qcom,tcsr.h>
  15
  16         //
  17         // OEM U-Boot provides either
  18         // init=/sbin/init rootfstype=ubifs ubi.mtd=11,2048 \
  19         //                 root=ubi0:ubifs rootwait rw
  20         // or the same with ubi.mtd=13,2048
  21         //
  22
  23 / {
  24         chosen {
  25                 bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro";
  26         };
  27
  28
  29         soc {
  30                 rng@22000 {
  31                         status = "okay";
  32                 };
  33
  34                 mdio@90000 {
  35                         status = "okay";
  36                 };
  37
  38                 tcsr@1949000 {
  39                         compatible = "qcom,tcsr";
  40                         reg = <0x1949000 0x100>;
  41                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  42                 };
  43
  44                 tcsr@194b000 {
  45                         compatible = "qcom,tcsr";
  46                         reg = <0x194b000 0x100>;
  47                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  48                 };
  49
  50                 ess_tcsr@1953000 {
  51                         compatible = "qcom,tcsr";
  52                         reg = <0x1953000 0x1000>;
  53                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  54                 };
  55
  56                 tcsr@1957000 {
  57                         compatible = "qcom,tcsr";
  58                         reg = <0x1957000 0x100>;
  59                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  60                 };
  61
  62                 usb2@60f8800 {
  63                         status = "okay";
  64
  65                         dwc3@6000000 {
  66                                 #address-cells = <1>;
  67                                 #size-cells = <0>;
  68
  69                                 usb2_port1: port@1 {
  70                                         reg = <1>;
  71                                         #trigger-source-cells = <0>;
  72                                 };
  73                         };
  74                 };
  75
  76                 usb3@8af8800 {
  77                         status = "okay";
  78
  79                         dwc3@8a00000 {
  80                                 #address-cells = <1>;
  81                                 #size-cells = <0>;
  82
  83                                 usb3_port1: port@1 {
  84                                         reg = <1>;
  85                                         #trigger-source-cells = <0>;
  86                                 };
  87
  88                                 usb3_port2: port@2 {
  89                                         reg = <2>;
  90                                         #trigger-source-cells = <0>;
  91                                 };
  92                         };
  93                 };
  94
  95                 crypto@8e3a000 {
  96                         status = "okay";
  97                 };
  98
  99                 watchdog@b017000 {
 100                         status = "okay";
 101                 };
 102         };
 103 };
 104
 105
 106 &blsp_dma {
 107         status = "okay";
 108 };
 109
 110 &blsp1_uart1 {
 111         status = "okay";
 112         pinctrl-0 = <&serial_0_pins>;
 113         pinctrl-names = "default";
 114
 115 };
 116
 117 &cryptobam {
 118         status = "okay";
 119 };
 120
 121 &nand {
 122         status = "okay";
 123
 124         pinctrl-0 = <&nand_pins>;
 125         pinctrl-names = "default";
 126
 127         nand@0 {
 128                 partitions {
 129                         compatible = "fixed-partitions";
 130                         #address-cells = <1>;
 131                         #size-cells = <1>;
 132
 133                         partition@0 {
 134                                 label = "sbl1";
 135                                 reg = <0x0 0x100000>;
 136                                 read-only;
 137                         };
 138
 139                         partition@100000 {
 140                                 label = "mibib";
 141                                 reg = <0x100000 0x100000>;
 142                                 read-only;
 143                         };
 144
 145                         partition@200000 {
 146                                 label = "qsee";
 147                                 reg = <0x200000 0x100000>;
 148                                 read-only;
 149                         };
 150
 151                         partition@300000 {
 152                                 label = "cdt";
 153                                 reg = <0x300000 0x80000>;
 154                                 read-only;
 155                         };
 156
 157                         partition@380000 {
 158                                 label = "appsblenv";
 159                                 reg = <0x380000 0x80000>;
 160                                 read-only;
 161                         };
 162
 163                         partition@400000 {
 164                                 label = "ART";
 165                                 reg = <0x400000 0x80000>;
 166                                 read-only;
 167                         };
 168
 169                         partition@480000 {
 170                                 label = "appsbl";
 171                                 reg = <0x480000 0x200000>;
 172                                 read-only;
 173                         };
 174
 175                         partition@680000 {
 176                                 label = "u_env";
 177                                 reg = <0x680000 0x80000>;
 178                                 // writable -- U-Boot environment
 179                         };
 180
 181                         partition@700000 {
 182                                 label = "s_env";
 183                                 reg = <0x700000 0x40000>;
 184                                 // writable -- Boot counter records
 185                         };
 186
 187                         partition@740000 {
 188                                 label = "devinfo";
 189                                 reg = <0x740000 0x40000>;
 190                                 read-only;
 191                         };
 192
 193                         partition@780000 {
 194                                 label = "kernel";
 195                                 reg = <0x780000 0x5800000>;
 196                         };
 197
 198                         partition@a80000 {
 199                                 label = "rootfs";
 200                                 reg = <0xa80000 0x5500000>;
 201                         };
 202
 203                         partition@5f80000 {
 204                                 label = "alt_kernel";
 205                                 reg = <0x5f80000 0x5800000>;
 206                         };
 207
 208                         partition@6280000 {
 209                                 label = "alt_rootfs";
 210                                 reg = <0x6280000 0x5500000>;
 211                         };
 212
 213                         partition@b780000 {
 214                                 label = "sysdiag";
 215                                 reg = <0xb780000 0x100000>;
 216                                 read-only;
 217                         };
 218
 219                         partition@b880000 {
 220                                 label = "syscfg";
 221                                 reg = <0xb880000 0x4680000>;
 222                                 read-only;
 223                         };
 224                 };
 225         };
 226 };
 227
 228 &pcie0 {
 229         status = "okay";
 230
 231         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 232         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 233
 234         bridge@0,0 {
 235                 reg = <0x00000000 0 0 0 0>;
 236                 #address-cells = <3>;
 237                 #size-cells = <2>;
 238                 ranges;
 239
 240                 wifi2: wifi@1,0 {
 241                         compatible = "qcom,ath10k";
 242                         reg = <0x00010000 0 0 0 0>;
 243                 };
 244         };
 245 };
 246
 247 &qpic_bam {
 248         status = "okay";
 249 };
 250
 251 &tlmm {
 252         serial_0_pins: serial0-pinmux {
 253                 pins = "gpio16", "gpio17";
 254                 function = "blsp_uart0";
 255                 bias-disable;
 256         };
 257
 258         nand_pins: nand_pins {
 259                 pullups {
 260                         pins = "gpio53", "gpio58", "gpio59";
 261                         function = "qpic";
 262                         bias-pull-up;
 263                 };
 264
 265                 // gpio61 controls led_usb
 266
 267                 pulldowns {
 268                         pins =  "gpio55", "gpio56", "gpio57",
 269                                 "gpio60", "gpio62", "gpio63",
 270                                 "gpio64", "gpio65", "gpio66",
 271                                 "gpio67", "gpio68", "gpio69";
 272                         function = "qpic";
 273                         bias-pull-down;
 274                 };
 275         };
 276 };
 277
 278 &usb2_hs_phy {
 279         status = "okay";
 280 };
 281
 282 &usb3_hs_phy {
 283         status = "okay";
 284 };
 285
 286 &usb3_ss_phy {
 287         status = "okay";
 288 };
 289
 290 &gmac {
 291       status = "okay";
 292 };
 293
 294 &switch {
 295       status = "okay";
 296 };
 297
 298 &swport1 {
 299       status = "okay";
 300 };
 301
 302 &swport2 {
 303       status = "okay";
 304 };
 305
 306 &swport3 {
 307       status = "okay";
 308 };
 309
 310 &swport4 {
 311       status = "okay";
 312 };
 313
 314 &swport5 {
 315       status = "okay";
 316 };