ipq40xx: drop ESSEDMA + AR40xx DTS nodes
[openwrt/staging/dedeckeh.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-pa2200.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* Copyright (c) 2017-2020, Sven Eckelmann <sven@narfation.org>
3 * Copyright (c) 2018, Marek Lindner <marek.lindner@kaiwoo.ai>
4 */
5
6 #include "qcom-ipq4019.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/soc/qcom,tcsr.h>
10
11 / {
12 model = "Plasma Cloud PA2200";
13 compatible = "plasmacloud,pa2200";
14
15 soc {
16 rng@22000 {
17 status = "okay";
18 };
19
20 mdio@90000 {
21 status = "okay";
22 };
23
24 tcsr@1949000 {
25 compatible = "qcom,tcsr";
26 reg = <0x1949000 0x100>;
27 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
28 };
29
30 ess_tcsr@1953000 {
31 compatible = "qcom,tcsr";
32 reg = <0x1953000 0x1000>;
33 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
34 };
35
36 tcsr@1957000 {
37 compatible = "qcom,tcsr";
38 reg = <0x1957000 0x100>;
39 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
40 };
41
42 crypto@8e3a000 {
43 status = "okay";
44 };
45
46 watchdog@b017000 {
47 status = "okay";
48 };
49 };
50
51 keys {
52 compatible = "gpio-keys";
53
54 reset {
55 label = "reset";
56 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
57 linux,code = <KEY_RESTART >;
58 };
59 };
60
61 aliases {
62 led-boot = &led_power_orange;
63 led-failsafe = &led_status_blue;
64 led-running = &led_power_orange;
65 led-upgrade = &led_status_blue;
66 };
67
68 leds {
69 compatible = "gpio-leds";
70
71 led_power_orange: power_orange {
72 label = "orange:power";
73 gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
74 };
75
76 2g_blue {
77 label = "blue:2g";
78 gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
79 linux,default-trigger = "phy1tpt";
80 };
81
82 2g_green {
83 label = "green:5g1";
84 gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
85 linux,default-trigger = "phy0tpt";
86 };
87
88 5g2_green {
89 label = "green:5g2";
90 gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
91 linux,default-trigger = "phy2tpt";
92 };
93
94 led_status_blue: status_blue {
95 label = "blue:status";
96 gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
97 };
98 };
99 };
100
101 &tlmm {
102 serial_pins: serial_pinmux {
103 mux {
104 pins = "gpio16", "gpio17";
105 function = "blsp_uart0";
106 bias-disable;
107 };
108 };
109
110 spi_0_pins: spi_0_pinmux {
111 pin {
112 function = "blsp_spi0";
113 pins = "gpio13", "gpio14", "gpio15";
114 drive-strength = <12>;
115 bias-disable;
116 };
117 pin_cs {
118 function = "gpio";
119 pins = "gpio12";
120 drive-strength = <2>;
121 bias-disable;
122 output-high;
123 };
124 };
125 };
126
127 &blsp_dma {
128 status = "okay";
129 };
130
131 &blsp1_spi1 {
132 pinctrl-0 = <&spi_0_pins>;
133 pinctrl-names = "default";
134 status = "okay";
135 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
136
137 flash@0 {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "jedec,spi-nor";
141 reg = <0>;
142 spi-max-frequency = <24000000>;
143 /* partitions are passed via bootloader */
144 };
145 };
146
147 &blsp1_uart1 {
148 pinctrl-0 = <&serial_pins>;
149 pinctrl-names = "default";
150 status = "okay";
151 };
152
153 &cryptobam {
154 status = "okay";
155 };
156
157 &pcie0 {
158 status = "okay";
159 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
160 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
161
162 bridge@0,0 {
163 reg = <0x00000000 0 0 0 0>;
164 #address-cells = <3>;
165 #size-cells = <2>;
166 ranges;
167
168 wifi2: wifi@1,0 {
169 compatible = "qcom,ath10k";
170 status = "okay";
171 reg = <0x00010000 0 0 0 0>;
172 qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
173 ieee80211-freq-limit = <5170000 5350000>;
174 };
175 };
176 };
177
178 &wifi0 {
179 status = "okay";
180 qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
181 };
182
183 &wifi1 {
184 status = "okay";
185 qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
186 ieee80211-freq-limit = <5470000 5875000>;
187 };