41ed66e5950074c0e12fb9e0fcccf3a14ecb2e24
[openwrt/staging/dedeckeh.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4018-gl-ap1300.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7
8 / {
9 model = "GL.iNet GL-AP1300";
10 compatible = "glinet,gl-ap1300";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 label-mac-device = &gmac0;
18 };
19
20 memory {
21 device_type = "memory";
22 reg = <0x80000000 0x10000000>;
23 };
24
25 chosen {
26 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
27 };
28
29 soc {
30 rng@22000 {
31 status = "okay";
32 };
33
34 mdio@90000 {
35 status = "okay";
36 };
37
38 tcsr@1949000 {
39 compatible = "qcom,tcsr";
40 reg = <0x1949000 0x100>;
41 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
42 };
43
44 tcsr@194b000 {
45 /* select hostmode */
46 compatible = "qcom,tcsr";
47 reg = <0x194b000 0x100>;
48 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
49 status = "okay";
50 };
51
52 ess_tcsr@1953000 {
53 compatible = "qcom,tcsr";
54 reg = <0x1953000 0x1000>;
55 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
56 };
57
58 tcsr@1957000 {
59 compatible = "qcom,tcsr";
60 reg = <0x1957000 0x100>;
61 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
62 };
63
64 usb2@60f8800 {
65 status = "okay";
66 };
67
68 usb3@8af8800 {
69 status = "okay";
70 };
71
72 crypto@8e3a000 {
73 status = "okay";
74 };
75
76 watchdog@b017000 {
77 status = "okay";
78 };
79 };
80
81 keys {
82 compatible = "gpio-keys";
83
84 reset {
85 label = "reset";
86 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
87 linux,code = <KEY_RESTART>;
88 };
89 };
90
91 leds {
92 compatible = "gpio-leds";
93
94 led_power: power {
95 label = "green:power";
96 gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
97 default-state = "on";
98 };
99
100 wan {
101 label = "green:wan";
102 gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
103 };
104 };
105 };
106
107 &blsp_dma {
108 status = "okay";
109 };
110
111 &cryptobam {
112 status = "okay";
113 };
114
115 &blsp1_spi1 {
116 status = "okay";
117
118 pinctrl-0 = <&spi0_pins>;
119 pinctrl-names = "default";
120 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 5 GPIO_ACTIVE_HIGH>;
121
122 flash@0 {
123 status = "okay";
124
125 compatible = "jedec,spi-nor";
126 reg = <0>;
127 spi-max-frequency = <24000000>;
128
129 partitions {
130 compatible = "fixed-partitions";
131 #address-cells = <1>;
132 #size-cells = <1>;
133
134 partition@0 {
135 label = "SBL1";
136 reg = <0x00000000 0x00040000>;
137 read-only;
138 };
139
140 partition@40000 {
141 label = "MIBIB";
142 reg = <0x00040000 0x00020000>;
143 read-only;
144 };
145
146 partition@60000 {
147 label = "QSEE";
148 reg = <0x00060000 0x00060000>;
149 read-only;
150 };
151
152 partition@c0000 {
153 label = "CDT";
154 reg = <0x000c0000 0x00010000>;
155 read-only;
156 };
157
158 partition@d0000 {
159 label = "DDRPARAMS";
160 reg = <0x000d0000 0x00010000>;
161 read-only;
162 };
163
164 partition@e0000 {
165 label = "APPSBLENV"; /* uboot env*/
166 reg = <0x000e0000 0x00010000>;
167 };
168
169 partition@f0000 {
170 label = "APPSBL"; /* uboot */
171 reg = <0x000f0000 0x00080000>;
172 read-only;
173 };
174
175 partition@170000 {
176 label = "ART";
177 reg = <0x00170000 0x00010000>;
178 read-only;
179 compatible = "nvmem-cells";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 precal_art_1000: precal@1000 {
184 reg = <0x1000 0x2f20>;
185 };
186
187 precal_art_5000: precal@5000 {
188 reg = <0x5000 0x2f20>;
189 };
190 };
191 };
192 };
193
194 spi-nand@1 {
195 status = "okay";
196
197 compatible = "spi-nand";
198 reg = <1>;
199 spi-max-frequency = <24000000>;
200
201 partitions {
202 compatible = "fixed-partitions";
203 #address-cells = <1>;
204 #size-cells = <1>;
205
206 partition@0 {
207 label = "ubi";
208 reg = <0x00000000 0x08000000>;
209 };
210 };
211 };
212 };
213
214 &blsp1_uart1 {
215 pinctrl-0 = <&serial_pins>;
216 pinctrl-names = "default";
217 status = "okay";
218 };
219
220 &tlmm {
221 serial_pins: serial_pinmux {
222 mux {
223 pins = "gpio60", "gpio61";
224 function = "blsp_uart0";
225 bias-disable;
226 };
227 };
228
229 spi0_pins: spi0_pinmux {
230 mux_spi {
231 function = "blsp_spi0";
232 pins = "gpio55", "gpio56", "gpio57";
233 drive-strength = <12>;
234 bias-disable;
235 };
236
237 mux_cs {
238 function = "gpio";
239 pins = "gpio54", "gpio5";
240 drive-strength = <2>;
241 bias-disable;
242 output-high;
243 };
244 };
245 };
246
247 &usb2_hs_phy {
248 status = "okay";
249 };
250
251 &usb3_hs_phy {
252 status = "okay";
253 };
254
255 &usb3_ss_phy {
256 status = "okay";
257 };
258
259 &wifi0 {
260 status = "okay";
261 nvmem-cell-names = "pre-calibration";
262 nvmem-cells = <&precal_art_1000>;
263 qcom,ath10k-calibration-variant = "GL-AP1300";
264 };
265
266 &wifi1 {
267 status = "okay";
268 nvmem-cell-names = "pre-calibration";
269 nvmem-cells = <&precal_art_5000>;
270 qcom,ath10k-calibration-variant = "GL-AP1300";
271 };