target/linux/generic/pending-5.15/772-net-dsa-b53-add-support-for-BCM63xx-RGMIIs.patch

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  65 From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?=  <noltari@gmail.com>
  66 To: f.fainelli@gmail.com, jonas.gorski@gmail.com, andrew@lunn.ch,
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  70 Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?=  <noltari@gmail.com>
  71 Subject: [PATCH v2] net: dsa: b53: add support for BCM63xx RGMIIs
  72 Date: Sun, 19 Mar 2023 23:08:05 +0100
  73 Message-Id: <20230319220805.124024-1-noltari@gmail.com>
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  75 In-Reply-To: <20230319183330.761251-1-noltari@gmail.com>
  76 References: <20230319183330.761251-1-noltari@gmail.com>
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  79 List-ID: <netdev.vger.kernel.org>
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  81 X-Patchwork-Delegate: kuba@kernel.org
  82
  83 BCM63xx RGMII ports require additional configuration in order to work.
  84
  85 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  86 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  87 ---
  88  v2: add changes suggested by Andrew:
  89   - Use a switch statement.
  90   - Use dev_dbg() instead of dev_info().
  91
  92  drivers/net/dsa/b53/b53_common.c | 46 ++++++++++++++++++++++++++++++++
  93  drivers/net/dsa/b53/b53_priv.h   |  1 +
  94  2 files changed, 47 insertions(+)
  95
  96 --- a/drivers/net/dsa/b53/b53_common.c
  97 +++ b/drivers/net/dsa/b53/b53_common.c
  98 @@ -1209,6 +1209,46 @@ static void b53_force_port_config(struct
  99         b53_write8(dev, B53_CTRL_PAGE, off, reg);
 100  }
 101
 102 +static void b53_adjust_63xx_rgmii(struct dsa_switch *ds, int port,
 103 +                                 phy_interface_t interface)
 104 +{
 105 +       struct b53_device *dev = ds->priv;
 106 +       u8 rgmii_ctrl = 0, off;
 107 +
 108 +       if (port == dev->imp_port)
 109 +               off = B53_RGMII_CTRL_IMP;
 110 +       else
 111 +               off = B53_RGMII_CTRL_P(port);
 112 +
 113 +       b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
 114 +
 115 +       switch (interface) {
 116 +       case PHY_INTERFACE_MODE_RGMII_ID:
 117 +               rgmii_ctrl |= (RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
 118 +               break;
 119 +       case PHY_INTERFACE_MODE_RGMII_RXID:
 120 +               rgmii_ctrl &= ~(RGMII_CTRL_DLL_TXC);
 121 +               rgmii_ctrl |= RGMII_CTRL_DLL_RXC;
 122 +               break;
 123 +       case PHY_INTERFACE_MODE_RGMII_TXID:
 124 +               rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC);
 125 +               rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
 126 +               break;
 127 +       case PHY_INTERFACE_MODE_RGMII:
 128 +       default:
 129 +               rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
 130 +               break;
 131 +       }
 132 +
 133 +       if (port != dev->imp_port)
 134 +               rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;
 135 +
 136 +       b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);
 137 +
 138 +       dev_dbg(ds->dev, "Configured port %d for %s\n", port,
 139 +               phy_modes(interface));
 140 +}
 141 +
 142  static void b53_adjust_link(struct dsa_switch *ds, int port,
 143                             struct phy_device *phydev)
 144  {
 145 @@ -1235,6 +1275,9 @@ static void b53_adjust_link(struct dsa_s
 146                               tx_pause, rx_pause);
 147         b53_force_link(dev, port, phydev->link);
 148
 149 +       if (is63xx(dev) && port >= B53_63XX_RGMII0)
 150 +               b53_adjust_63xx_rgmii(ds, port, phydev->interface);
 151 +
 152         if (is531x5(dev) && phy_interface_is_rgmii(phydev)) {
 153                 if (port == dev->imp_port)
 154                         off = B53_RGMII_CTRL_IMP;
 155 @@ -1419,6 +1462,9 @@ void b53_phylink_mac_link_up(struct dsa_
 156  {
 157         struct b53_device *dev = ds->priv;
 158
 159 +       if (is63xx(dev) && port >= B53_63XX_RGMII0)
 160 +               b53_adjust_63xx_rgmii(ds, port, interface);
 161 +
 162         if (mode == MLO_AN_PHY)
 163                 return;
 164
 165 --- a/drivers/net/dsa/b53/b53_priv.h
 166 +++ b/drivers/net/dsa/b53/b53_priv.h
 167 @@ -206,6 +206,7 @@ static inline int is58xx(struct b53_devi
 168                 dev->chip_id == BCM7278_DEVICE_ID;
 169  }
 170
 171 +#define B53_63XX_RGMII0        4
 172  #define B53_CPU_PORT_25        5
 173  #define B53_CPU_PORT   8
 174