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[openwrt/staging/dedeckeh.git] / target / linux / generic / files / drivers / ssb / fallback-sprom.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * SSB Fallback SPROM Driver
4 *
5 * Copyright (C) 2020 Álvaro Fernández Rojas <noltari@gmail.com>
6 * Copyright (C) 2014 Jonas Gorski <jonas.gorski@gmail.com>
7 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
8 * Copyright (C) 2008 Florian Fainelli <f.fainelli@gmail.com>
9 */
10
11 #include <linux/etherdevice.h>
12 #include <linux/firmware.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/of_net.h>
17 #include <linux/of_platform.h>
18 #include <linux/ssb/ssb.h>
19
20 #define SSB_FBS_MAX_SIZE 440
21
22 /* Get the word-offset for a SSB_SPROM_XXX define. */
23 #define SPOFF(offset) ((offset) / sizeof(u16))
24 /* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
25 #define SPEX16(_outvar, _offset, _mask, _shift) \
26 out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
27 #define SPEX32(_outvar, _offset, _mask, _shift) \
28 out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
29 in[SPOFF(_offset)]) & (_mask)) >> (_shift))
30 #define SPEX(_outvar, _offset, _mask, _shift) \
31 SPEX16(_outvar, _offset, _mask, _shift)
32
33 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
34 do { \
35 SPEX(_field[0], _offset + 0, _mask, _shift); \
36 SPEX(_field[1], _offset + 2, _mask, _shift); \
37 SPEX(_field[2], _offset + 4, _mask, _shift); \
38 SPEX(_field[3], _offset + 6, _mask, _shift); \
39 SPEX(_field[4], _offset + 8, _mask, _shift); \
40 SPEX(_field[5], _offset + 10, _mask, _shift); \
41 SPEX(_field[6], _offset + 12, _mask, _shift); \
42 SPEX(_field[7], _offset + 14, _mask, _shift); \
43 } while (0)
44
45 struct ssb_fbs {
46 struct device *dev;
47 struct list_head list;
48 struct ssb_sprom sprom;
49 u32 pci_bus;
50 u32 pci_dev;
51 bool devid_override;
52 };
53
54 static DEFINE_SPINLOCK(ssb_fbs_lock);
55 static struct list_head ssb_fbs_list = LIST_HEAD_INIT(ssb_fbs_list);
56
57 int ssb_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
58 {
59 const u32 pci_bus = bus->host_pci->bus->number;
60 const u32 pci_dev = PCI_SLOT(bus->host_pci->devfn);
61 struct ssb_fbs *pos;
62
63 list_for_each_entry(pos, &ssb_fbs_list, list) {
64 if (pos->pci_bus != pci_bus ||
65 pos->pci_dev != pci_dev)
66 continue;
67
68 if (pos->devid_override)
69 bus->host_pci->device = pos->sprom.dev_id;
70
71 memcpy(out, &pos->sprom, sizeof(struct ssb_sprom));
72 dev_info(pos->dev, "requested by [%x:%x]",
73 pos->pci_bus, pos->pci_dev);
74
75 return 0;
76 }
77
78 pr_err("unable to fill SPROM for [%x:%x]\n", pci_bus, pci_dev);
79
80 return -EINVAL;
81 }
82
83 static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
84 u16 mask, u16 shift)
85 {
86 u16 v;
87 u8 gain;
88
89 v = in[SPOFF(offset)];
90 gain = (v & mask) >> shift;
91 if (gain == 0xFF)
92 gain = 2; /* If unset use 2dBm */
93 if (sprom_revision == 1) {
94 /* Convert to Q5.2 */
95 gain <<= 2;
96 } else {
97 /* Q5.2 Fractional part is stored in 0xC0 */
98 gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
99 }
100
101 return (s8)gain;
102 }
103
104 static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
105 {
106 SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
107 SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
108 SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
109 SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
110 SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
111 SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
112 SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
113 SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
114 SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
115 SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
116 SSB_SPROM2_MAXP_A_LO_SHIFT);
117 }
118
119 static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
120 {
121 u16 loc[3];
122
123 if (out->revision == 3) /* rev 3 moved MAC */
124 loc[0] = SSB_SPROM3_IL0MAC;
125 else {
126 loc[0] = SSB_SPROM1_IL0MAC;
127 loc[1] = SSB_SPROM1_ET0MAC;
128 loc[2] = SSB_SPROM1_ET1MAC;
129 }
130
131 SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
132 SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
133 SSB_SPROM1_ETHPHY_ET1A_SHIFT);
134 SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
135 SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
136 SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
137 SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
138 if (out->revision == 1)
139 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
140 SSB_SPROM1_BINF_CCODE_SHIFT);
141 SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
142 SSB_SPROM1_BINF_ANTA_SHIFT);
143 SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
144 SSB_SPROM1_BINF_ANTBG_SHIFT);
145 SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
146 SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
147 SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
148 SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
149 SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
150 SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
151 SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
152 SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
153 SSB_SPROM1_GPIOA_P1_SHIFT);
154 SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
155 SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
156 SSB_SPROM1_GPIOB_P3_SHIFT);
157 SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
158 SSB_SPROM1_MAXPWR_A_SHIFT);
159 SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
160 SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
161 SSB_SPROM1_ITSSI_A_SHIFT);
162 SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
163 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
164
165 SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
166 SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
167
168 /* Extract the antenna gain values. */
169 out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
170 SSB_SPROM1_AGAIN,
171 SSB_SPROM1_AGAIN_BG,
172 SSB_SPROM1_AGAIN_BG_SHIFT);
173 out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
174 SSB_SPROM1_AGAIN,
175 SSB_SPROM1_AGAIN_A,
176 SSB_SPROM1_AGAIN_A_SHIFT);
177 if (out->revision >= 2)
178 sprom_extract_r23(out, in);
179 }
180
181 /* Revs 4 5 and 8 have partially shared layout */
182 static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
183 {
184 SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
185 SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
186 SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
187 SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
188 SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
189 SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
190 SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
191 SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
192
193 SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
194 SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
195 SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
196 SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
197 SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
198 SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
199 SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
200 SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
201
202 SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
203 SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
204 SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
205 SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
206 SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
207 SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
208 SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
209 SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
210
211 SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
212 SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
213 SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
214 SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
215 SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
216 SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
217 SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
218 SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
219 }
220
221 static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
222 {
223 static const u16 pwr_info_offset[] = {
224 SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
225 SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
226 };
227 int i;
228
229 BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
230 ARRAY_SIZE(out->core_pwr_info));
231
232 SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
233 SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
234 SSB_SPROM4_ETHPHY_ET1A_SHIFT);
235 SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
236 SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
237 if (out->revision == 4) {
238 SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
239 SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
240 SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
241 SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
242 SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
243 SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
244 } else {
245 SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
246 SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
247 SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
248 SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
249 SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
250 SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
251 }
252 SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
253 SSB_SPROM4_ANTAVAIL_A_SHIFT);
254 SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
255 SSB_SPROM4_ANTAVAIL_BG_SHIFT);
256 SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
257 SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
258 SSB_SPROM4_ITSSI_BG_SHIFT);
259 SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
260 SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
261 SSB_SPROM4_ITSSI_A_SHIFT);
262 if (out->revision == 4) {
263 SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
264 SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
265 SSB_SPROM4_GPIOA_P1_SHIFT);
266 SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
267 SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
268 SSB_SPROM4_GPIOB_P3_SHIFT);
269 } else {
270 SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
271 SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
272 SSB_SPROM5_GPIOA_P1_SHIFT);
273 SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
274 SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
275 SSB_SPROM5_GPIOB_P3_SHIFT);
276 }
277
278 /* Extract the antenna gain values. */
279 out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
280 SSB_SPROM4_AGAIN01,
281 SSB_SPROM4_AGAIN0,
282 SSB_SPROM4_AGAIN0_SHIFT);
283 out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
284 SSB_SPROM4_AGAIN01,
285 SSB_SPROM4_AGAIN1,
286 SSB_SPROM4_AGAIN1_SHIFT);
287 out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
288 SSB_SPROM4_AGAIN23,
289 SSB_SPROM4_AGAIN2,
290 SSB_SPROM4_AGAIN2_SHIFT);
291 out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
292 SSB_SPROM4_AGAIN23,
293 SSB_SPROM4_AGAIN3,
294 SSB_SPROM4_AGAIN3_SHIFT);
295
296 /* Extract cores power info info */
297 for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
298 u16 o = pwr_info_offset[i];
299
300 SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
301 SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
302 SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
303 SSB_SPROM4_2G_MAXP, 0);
304
305 SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
306 SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
307 SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
308 SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
309
310 SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
311 SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
312 SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
313 SSB_SPROM4_5G_MAXP, 0);
314 SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
315 SSB_SPROM4_5GH_MAXP, 0);
316 SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
317 SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
318
319 SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
320 SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
321 SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
322 SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
323 SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
324 SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
325 SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
326 SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
327 SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
328 SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
329 SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
330 SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
331 }
332
333 sprom_extract_r458(out, in);
334
335 /* TODO - get remaining rev 4 stuff needed */
336 }
337
338 static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
339 {
340 int i;
341 u16 o;
342 static const u16 pwr_info_offset[] = {
343 SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
344 SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
345 };
346 BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
347 ARRAY_SIZE(out->core_pwr_info));
348
349 SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
350 SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
351 SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
352 SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
353 SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
354 SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
355 SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
356 SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
357 SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
358 SSB_SPROM8_ANTAVAIL_A_SHIFT);
359 SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
360 SSB_SPROM8_ANTAVAIL_BG_SHIFT);
361 SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
362 SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
363 SSB_SPROM8_ITSSI_BG_SHIFT);
364 SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
365 SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
366 SSB_SPROM8_ITSSI_A_SHIFT);
367 SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
368 SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
369 SSB_SPROM8_MAXP_AL_SHIFT);
370 SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
371 SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
372 SSB_SPROM8_GPIOA_P1_SHIFT);
373 SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
374 SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
375 SSB_SPROM8_GPIOB_P3_SHIFT);
376 SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
377 SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
378 SSB_SPROM8_TRI5G_SHIFT);
379 SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
380 SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
381 SSB_SPROM8_TRI5GH_SHIFT);
382 SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
383 SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
384 SSB_SPROM8_RXPO5G_SHIFT);
385 SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
386 SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
387 SSB_SPROM8_RSSISMC2G_SHIFT);
388 SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
389 SSB_SPROM8_RSSISAV2G_SHIFT);
390 SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
391 SSB_SPROM8_BXA2G_SHIFT);
392 SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
393 SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
394 SSB_SPROM8_RSSISMC5G_SHIFT);
395 SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
396 SSB_SPROM8_RSSISAV5G_SHIFT);
397 SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
398 SSB_SPROM8_BXA5G_SHIFT);
399 SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
400 SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
401 SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
402 SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
403 SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
404 SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
405 SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
406 SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
407 SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
408 SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
409 SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
410 SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
411 SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
412 SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
413 SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
414 SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
415 SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
416
417 /* Extract the antenna gain values. */
418 out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
419 SSB_SPROM8_AGAIN01,
420 SSB_SPROM8_AGAIN0,
421 SSB_SPROM8_AGAIN0_SHIFT);
422 out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
423 SSB_SPROM8_AGAIN01,
424 SSB_SPROM8_AGAIN1,
425 SSB_SPROM8_AGAIN1_SHIFT);
426 out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
427 SSB_SPROM8_AGAIN23,
428 SSB_SPROM8_AGAIN2,
429 SSB_SPROM8_AGAIN2_SHIFT);
430 out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
431 SSB_SPROM8_AGAIN23,
432 SSB_SPROM8_AGAIN3,
433 SSB_SPROM8_AGAIN3_SHIFT);
434
435 /* Extract cores power info info */
436 for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
437 o = pwr_info_offset[i];
438 SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
439 SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
440 SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
441 SSB_SPROM8_2G_MAXP, 0);
442
443 SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
444 SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
445 SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
446
447 SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
448 SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
449 SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
450 SSB_SPROM8_5G_MAXP, 0);
451 SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
452 SSB_SPROM8_5GH_MAXP, 0);
453 SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
454 SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
455
456 SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
457 SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
458 SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
459 SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
460 SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
461 SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
462 SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
463 SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
464 SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
465 }
466
467 /* Extract FEM info */
468 SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
469 SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
470 SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
471 SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
472 SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
473 SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
474 SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
475 SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
476 SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
477 SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
478
479 SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
480 SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
481 SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
482 SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
483 SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
484 SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
485 SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
486 SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
487 SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
488 SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
489
490 SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
491 SSB_SPROM8_LEDDC_ON_SHIFT);
492 SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
493 SSB_SPROM8_LEDDC_OFF_SHIFT);
494
495 SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
496 SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
497 SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
498 SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
499 SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
500 SSB_SPROM8_TXRXC_SWITCH_SHIFT);
501
502 SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
503
504 SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
505 SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
506 SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
507 SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
508
509 SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
510 SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
511 SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
512 SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
513 SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
514 SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
515 SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
516 SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
517 SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
518 SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
519 SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
520 SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
521 SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
522 SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
523 SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
524 SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
525 SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
526 SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
527 SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
528 SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
529
530 SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
531 SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
532 SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
533 SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
534
535 SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
536 SSB_SPROM8_THERMAL_TRESH_SHIFT);
537 SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
538 SSB_SPROM8_THERMAL_OFFSET_SHIFT);
539 SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
540 SSB_SPROM8_TEMPDELTA_PHYCAL,
541 SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
542 SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
543 SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
544 SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
545 SSB_SPROM8_TEMPDELTA_HYSTERESIS,
546 SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
547 sprom_extract_r458(out, in);
548
549 /* TODO - get remaining rev 8 stuff needed */
550 }
551
552 static int sprom_extract(struct ssb_fbs *priv, const u16 *in, u16 size)
553 {
554 struct ssb_sprom *out = &priv->sprom;
555
556 memset(out, 0, sizeof(*out));
557
558 out->revision = in[size - 1] & 0x00FF;
559 memset(out->et0mac, 0xFF, 6);
560 memset(out->et1mac, 0xFF, 6);
561
562 switch (out->revision) {
563 case 1:
564 case 2:
565 case 3:
566 sprom_extract_r123(out, in);
567 break;
568 case 4:
569 case 5:
570 sprom_extract_r45(out, in);
571 break;
572 case 8:
573 sprom_extract_r8(out, in);
574 break;
575 default:
576 dev_warn(priv->dev,
577 "Unsupported SPROM revision %d detected."
578 " Will extract v1\n",
579 out->revision);
580 out->revision = 1;
581 sprom_extract_r123(out, in);
582 }
583
584 if (out->boardflags_lo == 0xFFFF)
585 out->boardflags_lo = 0; /* per specs */
586 if (out->boardflags_hi == 0xFFFF)
587 out->boardflags_hi = 0; /* per specs */
588
589 return 0;
590 }
591
592 static void ssb_fbs_fixup(struct ssb_fbs *priv, u16 *sprom)
593 {
594 struct device_node *node = priv->dev->of_node;
595 u32 fixups, off, val;
596 int i = 0;
597
598 if (!of_get_property(node, "brcm,sprom-fixups", &fixups))
599 return;
600
601 fixups /= sizeof(u32);
602
603 dev_info(priv->dev, "patching SPROM with %u fixups...\n", fixups >> 1);
604
605 while (i < fixups) {
606 if (of_property_read_u32_index(node, "brcm,sprom-fixups",
607 i++, &off)) {
608 dev_err(priv->dev, "error reading fixup[%u] offset\n",
609 i - 1);
610 return;
611 }
612
613 if (of_property_read_u32_index(node, "brcm,sprom-fixups",
614 i++, &val)) {
615 dev_err(priv->dev, "error reading fixup[%u] value\n",
616 i - 1);
617 return;
618 }
619
620 dev_dbg(priv->dev, "fixup[%d]=0x%04x\n", off, val);
621
622 sprom[off] = val;
623 }
624 }
625
626 static bool sprom_override_devid(struct ssb_fbs *priv, struct ssb_sprom *out,
627 const u16 *in)
628 {
629 SPEX(dev_id, SSB_SPROM1_PID, 0xFFFF, 0);
630 return !!out->dev_id;
631 }
632
633 static int ssb_fbs_set(struct ssb_fbs *priv, struct device_node *node)
634 {
635 struct ssb_sprom *sprom = &priv->sprom;
636 const struct firmware *fw;
637 const char *sprom_name;
638 int err;
639
640 if (of_property_read_string(node, "brcm,sprom", &sprom_name))
641 sprom_name = NULL;
642
643 if (sprom_name) {
644 err = request_firmware_direct(&fw, sprom_name, priv->dev);
645 if (err)
646 dev_err(priv->dev, "%s load error\n", sprom_name);
647 } else {
648 err = -ENOENT;
649 }
650
651 if (err) {
652 sprom->revision = 0x02;
653 sprom->board_rev = 0x0017;
654 sprom->country_code = 0x00;
655 sprom->ant_available_bg = 0x03;
656 sprom->pa0b0 = 0x15ae;
657 sprom->pa0b1 = 0xfa85;
658 sprom->pa0b2 = 0xfe8d;
659 sprom->pa1b0 = 0xffff;
660 sprom->pa1b1 = 0xffff;
661 sprom->pa1b2 = 0xffff;
662 sprom->gpio0 = 0xff;
663 sprom->gpio1 = 0xff;
664 sprom->gpio2 = 0xff;
665 sprom->gpio3 = 0xff;
666 sprom->maxpwr_bg = 0x4c;
667 sprom->itssi_bg = 0x00;
668 sprom->boardflags_lo = 0x2848;
669 sprom->boardflags_hi = 0x0000;
670 priv->devid_override = false;
671
672 dev_warn(priv->dev, "using basic SPROM\n");
673 } else {
674 size_t size = min(fw->size, (size_t) SSB_FBS_MAX_SIZE);
675 u16 tmp_sprom[SSB_FBS_MAX_SIZE >> 1];
676 u32 i, j;
677
678 for (i = 0, j = 0; i < size; i += 2, j++)
679 tmp_sprom[j] = (fw->data[i] << 8) | fw->data[i + 1];
680
681 release_firmware(fw);
682 ssb_fbs_fixup(priv, tmp_sprom);
683 sprom_extract(priv, tmp_sprom, size >> 1);
684
685 priv->devid_override = sprom_override_devid(priv, sprom,
686 tmp_sprom);
687 }
688
689 return 0;
690 }
691
692 static int ssb_fbs_probe(struct platform_device *pdev)
693 {
694 struct device *dev = &pdev->dev;
695 struct device_node *node = dev->of_node;
696 struct ssb_fbs *priv;
697 unsigned long flags;
698 u8 mac[ETH_ALEN];
699
700 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
701 if (!priv)
702 return -ENOMEM;
703
704 priv->dev = dev;
705
706 ssb_fbs_set(priv, node);
707
708 of_property_read_u32(node, "pci-bus", &priv->pci_bus);
709 of_property_read_u32(node, "pci-dev", &priv->pci_dev);
710
711 of_get_mac_address(node, mac);
712 if (is_valid_ether_addr(mac)) {
713 dev_info(dev, "mtd mac %pM\n", mac);
714 } else {
715 random_ether_addr(mac);
716 dev_info(dev, "random mac %pM\n", mac);
717 }
718
719 memcpy(priv->sprom.il0mac, mac, ETH_ALEN);
720 memcpy(priv->sprom.et0mac, mac, ETH_ALEN);
721 memcpy(priv->sprom.et1mac, mac, ETH_ALEN);
722 memcpy(priv->sprom.et2mac, mac, ETH_ALEN);
723
724 spin_lock_irqsave(&ssb_fbs_lock, flags);
725 list_add(&priv->list, &ssb_fbs_list);
726 spin_unlock_irqrestore(&ssb_fbs_lock, flags);
727
728 dev_info(dev, "registered SPROM for [%x:%x]\n",
729 priv->pci_bus, priv->pci_dev);
730
731 return 0;
732 }
733
734 static const struct of_device_id ssb_fbs_of_match[] = {
735 { .compatible = "brcm,ssb-sprom", },
736 { /* sentinel */ }
737 };
738 MODULE_DEVICE_TABLE(of, ssb_fbs_of_match);
739
740 static struct platform_driver ssb_fbs_driver = {
741 .probe = ssb_fbs_probe,
742 .driver = {
743 .name = "ssb-sprom",
744 .of_match_table = ssb_fbs_of_match,
745 },
746 };
747
748 int __init ssb_fbs_register(void)
749 {
750 return platform_driver_register(&ssb_fbs_driver);
751 }
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