bmips: document GPIO external interrupts
[openwrt/staging/dedeckeh.git] / target / linux / bmips / dts / bcm6328.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6328-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/bcm6328-reset.h>
11 #include <dt-bindings/soc/bcm6328-pm.h>
12
13 / {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 compatible = "brcm,bcm6328";
17
18 aliases {
19 nflash = &nflash;
20 pinctrl = &pinctrl;
21 serial0 = &uart0;
22 serial1 = &uart1;
23 spi1 = &hsspi;
24 };
25
26 chosen {
27 bootargs = "earlycon";
28 stdout-path = "serial0:115200n8";
29 };
30
31 clocks {
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
34
35 #clock-cells = <0>;
36
37 clock-frequency = <50000000>;
38 clock-output-names = "periph";
39 };
40
41 hsspi_osc: hsspi-osc {
42 compatible = "fixed-clock";
43
44 #clock-cells = <0>;
45
46 clock-frequency = <133333333>;
47 clock-output-names = "hsspi_osc";
48 };
49 };
50
51 cpus {
52 #address-cells = <1>;
53 #size-cells = <0>;
54 mips-hpt-frequency = <160000000>;
55
56 cpu@0 {
57 compatible = "brcm,bmips4350", "mips,mips4Kc";
58 device_type = "cpu";
59 reg = <0>;
60 };
61
62 cpu@1 {
63 compatible = "brcm,bmips4350", "mips,mips4Kc";
64 device_type = "cpu";
65 reg = <1>;
66 };
67 };
68
69 cpu_intc: interrupt-controller {
70 #address-cells = <0>;
71 compatible = "mti,cpu-interrupt-controller";
72
73 interrupt-controller;
74 #interrupt-cells = <1>;
75 };
76
77 memory@0 {
78 device_type = "memory";
79 reg = <0 0>;
80 };
81
82 ubus {
83 #address-cells = <1>;
84 #size-cells = <1>;
85
86 compatible = "simple-bus";
87 ranges;
88
89 periph_clk: clock-controller@10000004 {
90 compatible = "brcm,bcm6328-clocks";
91 reg = <0x10000004 0x4>;
92 #clock-cells = <1>;
93 };
94
95 periph_rst: reset-controller@10000010 {
96 compatible = "brcm,bcm6345-reset";
97 reg = <0x10000010 0x4>;
98 #reset-cells = <1>;
99 };
100
101 ext_intc: interrupt-controller@10000018 {
102 #address-cells = <1>;
103 compatible = "brcm,bcm6345-ext-intc";
104 reg = <0x10000018 0x4>;
105
106 interrupt-controller;
107 #interrupt-cells = <2>;
108
109 interrupt-parent = <&periph_intc>;
110 interrupts = <BCM6328_IRQ_EXTO>,
111 <BCM6328_IRQ_EXT1>,
112 <BCM6328_IRQ_EXT2>,
113 <BCM6328_IRQ_EXT3>;
114 };
115
116 periph_intc: interrupt-controller@10000020 {
117 #address-cells = <1>;
118 compatible = "brcm,bcm6345-l1-intc";
119 reg = <0x10000020 0x10>,
120 <0x10000030 0x10>;
121
122 interrupt-controller;
123 #interrupt-cells = <1>;
124
125 interrupt-parent = <&cpu_intc>;
126 interrupts = <2>, <3>;
127 };
128
129 wdt: watchdog@1000005c {
130 compatible = "brcm,bcm7038-wdt";
131 reg = <0x1000005c 0xc>;
132
133 clocks = <&periph_osc>;
134
135 timeout-sec = <30>;
136 };
137
138 pll_cntl: syscon@10000068 {
139 compatible = "syscon", "simple-mfd";
140 reg = <0x10000068 0x4>;
141 native-endian;
142
143 syscon-reboot {
144 compatible = "syscon-reboot";
145 offset = <0>;
146 mask = <0x1>;
147 };
148 };
149
150 gpio_cntl: syscon@10000080 {
151 #address-cells = <1>;
152 #size-cells = <1>;
153 compatible = "brcm,bcm6328-gpio-sysctl",
154 "syscon", "simple-mfd";
155 reg = <0x10000080 0x80>;
156 ranges = <0 0x10000080 0x80>;
157 native-endian;
158
159 gpio: gpio@0 {
160 compatible = "brcm,bcm6328-gpio";
161 reg-names = "dirout", "dat";
162 reg = <0x0 0x8>, <0x8 0x8>;
163
164 gpio-controller;
165 gpio-ranges = <&pinctrl 0 0 32>;
166 #gpio-cells = <2>;
167 };
168
169 pinctrl: pinctrl@18 {
170 compatible = "brcm,bcm6328-pinctrl";
171 reg = <0x18 0x10>;
172
173 pinctrl_serial_led: serial_led-pins {
174 pinctrl_serial_led_data: serial_led_data-pins {
175 function = "serial_led_data";
176 pins = "gpio6";
177 };
178
179 pinctrl_serial_led_clk: serial_led_clk-pins {
180 function = "serial_led_clk";
181 pins = "gpio7";
182 };
183 };
184
185 pinctrl_inet_act_led: inet_act_led-pins {
186 function = "inet_act_led";
187 pins = "gpio11";
188 };
189
190 pinctrl_pcie_clkreq: pcie_clkreq-pins {
191 function = "pcie_clkreq";
192 pins = "gpio16";
193 };
194
195 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
196 function = "led";
197 pins = "gpio17";
198 };
199
200 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
201 function = "led";
202 pins = "gpio18";
203 };
204
205 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
206 function = "led";
207 pins = "gpio19";
208 };
209
210 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
211 function = "led";
212 pins = "gpio20";
213 };
214
215 pinctrl_ephy0_act_led: ephy0_act_led-pins {
216 function = "ephy0_act_led";
217 pins = "gpio25";
218 };
219
220 pinctrl_ephy1_act_led: ephy1_act_led-pins {
221 function = "ephy1_act_led";
222 pins = "gpio26";
223 };
224
225 pinctrl_ephy2_act_led: ephy2_act_led-pins {
226 function = "ephy2_act_led";
227 pins = "gpio27";
228 };
229
230 pinctrl_ephy3_act_led: ephy3_act_led-pins {
231 function = "ephy3_act_led";
232 pins = "gpio28";
233 };
234
235 pinctrl_hsspi_cs1: hsspi_cs1-pins {
236 function = "hsspi_cs1";
237 pins = "hsspi_cs1";
238 };
239
240 pinctrl_usb_port1_device: usb_port1_device-pins {
241 function = "usb_device_port";
242 pins = "usb_port1";
243 };
244
245 pinctrl_usb_port1_host: usb_port1_host-pins {
246 function = "usb_host_port";
247 pins = "usb_port1";
248 };
249 };
250 };
251
252 uart0: serial@10000100 {
253 compatible = "brcm,bcm6345-uart";
254 reg = <0x10000100 0x18>;
255
256 interrupt-parent = <&periph_intc>;
257 interrupts = <BCM6328_IRQ_UART0>;
258
259 clocks = <&periph_osc>;
260 clock-names = "periph";
261
262 status = "disabled";
263 };
264
265 uart1: serial@10000120 {
266 compatible = "brcm,bcm6345-uart";
267 reg = <0x10000120 0x18>;
268
269 interrupt-parent = <&periph_intc>;
270 interrupts = <BCM6328_IRQ_UART1>;
271
272 clocks = <&periph_osc>;
273 clock-names = "periph";
274
275 status = "disabled";
276 };
277
278 nflash: nand@10000200 {
279 #address-cells = <1>;
280 #size-cells = <0>;
281 compatible = "brcm,nand-bcm6368",
282 "brcm,brcmnand-v2.2",
283 "brcm,brcmnand";
284 reg = <0x10000200 0x180>,
285 <0x10000400 0x200>,
286 <0x10000070 0x10>;
287 reg-names = "nand",
288 "nand-cache",
289 "nand-int-base";
290
291 interrupt-parent = <&periph_intc>;
292 interrupts = <BCM6328_IRQ_NAND>;
293
294 status = "disabled";
295 };
296
297 leds: led-controller@10000800 {
298 #address-cells = <1>;
299 #size-cells = <0>;
300 compatible = "brcm,bcm6328-leds";
301 reg = <0x10000800 0x24>;
302
303 status = "disabled";
304 };
305
306 hsspi: spi@10001000 {
307 #address-cells = <1>;
308 #size-cells = <0>;
309 compatible = "brcm,bcm6328-hsspi";
310 reg = <0x10001000 0x600>;
311
312 interrupt-parent = <&periph_intc>;
313 interrupts = <BCM6328_IRQ_HSSPI>;
314
315 clocks = <&periph_clk BCM6328_CLK_HSSPI>,
316 <&hsspi_osc>;
317 clock-names = "hsspi",
318 "pll";
319
320 resets = <&periph_rst BCM6328_RST_SPI>;
321
322 status = "disabled";
323 };
324
325 serdes_cntl: syscon@10001800 {
326 compatible = "syscon";
327 reg = <0x10001800 0x4>;
328 native-endian;
329 };
330
331 periph_pwr: power-controller@10001848 {
332 compatible = "brcm,bcm6328-power-controller";
333 reg = <0x10001848 0x4>;
334
335 #power-domain-cells = <1>;
336 };
337
338 ehci: usb@10002500 {
339 compatible = "brcm,bcm6328-ehci", "generic-ehci";
340 reg = <0x10002500 0x100>;
341 big-endian;
342 spurious-oc;
343
344 interrupt-parent = <&periph_intc>;
345 interrupts = <BCM6328_IRQ_EHCI>;
346
347 phys = <&usbh 0>;
348 phy-names = "usb";
349
350 status = "disabled";
351 };
352
353 ohci: usb@10002600 {
354 compatible = "brcm,bcm6328-ohci", "generic-ohci";
355 reg = <0x10002600 0x100>;
356 big-endian;
357 no-big-frame-no;
358
359 interrupt-parent = <&periph_intc>;
360 interrupts = <BCM6328_IRQ_OHCI>;
361
362 phys = <&usbh 0>;
363 phy-names = "usb";
364
365 status = "disabled";
366 };
367
368 usbh: usb-phy@10002700 {
369 compatible = "brcm,bcm6328-usbh-phy";
370 reg = <0x10002700 0x38>;
371
372 #phy-cells = <1>;
373
374 clocks = <&periph_clk BCM6328_CLK_USBH>;
375 clock-names = "usbh";
376
377 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
378 resets = <&periph_rst BCM6328_RST_USBH>;
379
380 status = "disabled";
381 };
382
383 ethernet: ethernet@1000d800 {
384 compatible = "brcm,bcm6328-enetsw";
385 reg = <0x1000d800 0x80>,
386 <0x1000da00 0x80>,
387 <0x1000dc00 0x80>;
388 reg-names = "dma",
389 "dma-channels",
390 "dma-sram";
391
392 interrupt-parent = <&periph_intc>;
393 interrupts = <BCM6328_IRQ_ENETSW_RX_DMA0>,
394 <BCM6328_IRQ_ENETSW_TX_DMA0>;
395 interrupt-names = "rx",
396 "tx";
397
398 clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
399
400 resets = <&periph_rst BCM6328_RST_ENETSW>,
401 <&periph_rst BCM6328_RST_EPHY>;
402
403 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_ROBOSW>,
404 <&periph_pwr BCM6328_POWER_DOMAIN_EPHY>;
405
406 dma-rx = <0>;
407 dma-tx = <1>;
408
409 status = "disabled";
410 };
411
412 switch0: switch@10e00000 {
413 #address-cells = <1>;
414 #size-cells = <0>;
415 compatible = "brcm,bcm6328-switch";
416 reg = <0x10e00000 0x8000>;
417 big-endian;
418
419 ports {
420 #address-cells = <1>;
421 #size-cells = <0>;
422
423 port@8 {
424 reg = <8>;
425
426 phy-mode = "internal";
427 ethernet = <&ethernet>;
428
429 fixed-link {
430 speed = <1000>;
431 full-duplex;
432 };
433 };
434 };
435 };
436
437 mdio: mdio@10e000b0 {
438 #address-cells = <1>;
439 #size-cells = <0>;
440 compatible = "brcm,bcm6368-mdio-mux";
441 reg = <0x10e000b0 0x8>;
442
443 mdio_int: mdio@0 {
444 #address-cells = <1>;
445 #size-cells = <0>;
446 reg = <0>;
447
448 phy1: ethernet-phy@1 {
449 compatible = "ethernet-phy-ieee802.3-c22";
450 reg = <1>;
451 };
452
453 phy2: ethernet-phy@2 {
454 compatible = "ethernet-phy-ieee802.3-c22";
455 reg = <2>;
456 };
457
458 phy3: ethernet-phy@3 {
459 compatible = "ethernet-phy-ieee802.3-c22";
460 reg = <3>;
461 };
462
463 phy4: ethernet-phy@4 {
464 compatible = "ethernet-phy-ieee802.3-c22";
465 reg = <4>;
466 };
467 };
468
469 mdio_ext: mdio@1 {
470 #address-cells = <1>;
471 #size-cells = <0>;
472 reg = <1>;
473 };
474 };
475
476 pcie: pcie@10e40000 {
477 compatible = "brcm,bcm6328-pcie";
478 reg = <0x10e40000 0x10000>;
479 #address-cells = <3>;
480 #size-cells = <2>;
481
482 device_type = "pci";
483 bus-range = <0x00 0x01>;
484 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
485 linux,pci-probe-only = <1>;
486
487 interrupt-parent = <&periph_intc>;
488 interrupts = <BCM6328_IRQ_PCIE_RC>;
489
490 clocks = <&periph_clk BCM6328_CLK_PCIE>;
491 clock-names = "pcie";
492
493 resets = <&periph_rst BCM6328_RST_PCIE>,
494 <&periph_rst BCM6328_RST_PCIE_EXT>,
495 <&periph_rst BCM6328_RST_PCIE_CORE>,
496 <&periph_rst BCM6328_RST_PCIE_HARD>;
497 reset-names = "pcie",
498 "pcie-ext",
499 "pcie-core",
500 "pcie-hard";
501
502 power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_PCIE>;
503
504 brcm,serdes = <&serdes_cntl>;
505
506 status = "disabled";
507 };
508 };
509 };