bmips: document GPIO external interrupts
[openwrt/staging/dedeckeh.git] / target / linux / bmips / dts / bcm6318.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6318-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/bcm6318-reset.h>
11 #include <dt-bindings/soc/bcm6318-pm.h>
12
13 / {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 compatible = "brcm,bcm6318";
17
18 aliases {
19 pinctrl = &pinctrl;
20 serial0 = &uart0;
21 spi1 = &hsspi;
22 };
23
24 chosen {
25 bootargs = "earlycon";
26 stdout-path = "serial0:115200n8";
27 };
28
29 clocks {
30 periph_osc: periph-osc {
31 compatible = "fixed-clock";
32
33 #clock-cells = <0>;
34
35 clock-frequency = <50000000>;
36 clock-output-names = "periph";
37 };
38
39 hsspi_osc: hsspi-osc {
40 compatible = "fixed-clock";
41
42 #clock-cells = <0>;
43
44 clock-frequency = <250000000>;
45 clock-output-names = "hsspi_osc";
46 };
47 };
48
49 cpus {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 mips-hpt-frequency = <166500000>;
53
54 cpu@0 {
55 compatible = "brcm,bmips3300", "mips,mips4Kc";
56 device_type = "cpu";
57 reg = <0>;
58 };
59 };
60
61 cpu_intc: interrupt-controller {
62 #address-cells = <0>;
63 compatible = "mti,cpu-interrupt-controller";
64
65 interrupt-controller;
66 #interrupt-cells = <1>;
67 };
68
69 memory@0 {
70 device_type = "memory";
71 reg = <0 0>;
72 };
73
74 ubus {
75 #address-cells = <1>;
76 #size-cells = <1>;
77
78 compatible = "simple-bus";
79 ranges;
80
81 periph_clk: clock-controller@10000004 {
82 compatible = "brcm,bcm6318-clocks";
83 reg = <0x10000004 0x4>;
84 #clock-cells = <1>;
85 };
86
87 ubus_clk: clock-controller@10000008 {
88 compatible = "brcm,bcm6318-ubus-clocks";
89 reg = <0x10000008 0x4>;
90 #clock-cells = <1>;
91 };
92
93 periph_rst: reset-controller@10000010 {
94 compatible = "brcm,bcm6345-reset";
95 reg = <0x10000010 0x4>;
96 #reset-cells = <1>;
97 };
98
99 ext_intc: interrupt-controller@10000018 {
100 #address-cells = <1>;
101 compatible = "brcm,bcm6318-ext-intc";
102 reg = <0x10000018 0x4>;
103
104 interrupt-controller;
105 #interrupt-cells = <2>;
106
107 interrupt-parent = <&periph_intc>;
108 interrupts = <BCM6318_IRQ_EXT0>,
109 <BCM6318_IRQ_EXT1>,
110 <BCM6318_IRQ_EXT2>,
111 <BCM6318_IRQ_EXT3>;
112 };
113
114 periph_intc: interrupt-controller@10000020 {
115 #address-cells = <1>;
116 compatible = "brcm,bcm6345-l1-intc";
117 reg = <0x10000020 0x20>;
118
119 interrupt-controller;
120 #interrupt-cells = <1>;
121
122 interrupt-parent = <&cpu_intc>;
123 interrupts = <2>, <3>;
124 };
125
126 wdt: watchdog@10000068 {
127 compatible = "brcm,bcm7038-wdt";
128 reg = <0x10000068 0xc>;
129
130 clocks = <&periph_osc>;
131
132 timeout-sec = <30>;
133 };
134
135 pll_cntl: syscon@10000074 {
136 compatible = "syscon", "simple-mfd";
137 reg = <0x10000074 0x4>;
138 native-endian;
139
140 syscon-reboot {
141 compatible = "syscon-reboot";
142 offset = <0>;
143 mask = <0x1>;
144 };
145 };
146
147 gpio_cntl: syscon@10000080 {
148 #address-cells = <1>;
149 #size-cells = <1>;
150 compatible = "brcm,bcm6318-gpio-sysctl",
151 "syscon", "simple-mfd";
152 reg = <0x10000080 0x80>;
153 ranges = <0 0x10000080 0x80>;
154 native-endian;
155
156 gpio: gpio@0 {
157 compatible = "brcm,bcm6318-gpio";
158 reg-names = "dirout", "dat";
159 reg = <0x0 0x8>, <0x8 0x8>;
160
161 gpio-controller;
162 gpio-ranges = <&pinctrl 0 0 50>;
163 #gpio-cells = <2>;
164 };
165
166 pinctrl: pinctrl@18 {
167 compatible = "brcm,bcm6318-pinctrl";
168 reg = <0x18 0x10>, <0x54 0x18>;
169
170 pinctrl_ephy0_spd_led: ephy0_spd_led-pins {
171 function = "ephy0_spd_led";
172 pins = "gpio0";
173 };
174
175 pinctrl_ephy1_spd_led: ephy1_spd_led-pins {
176 function = "ephy1_spd_led";
177 pins = "gpio1";
178 };
179
180 pinctrl_ephy2_spd_led: ephy2_spd_led-pins {
181 function = "ephy2_spd_led";
182 pins = "gpio2";
183 };
184
185 pinctrl_ephy3_spd_led: ephy3_spd_led-pins {
186 function = "ephy3_spd_led";
187 pins = "gpio3";
188 };
189
190 pinctrl_ephy0_act_led: ephy0_act_led-pins {
191 function = "ephy0_act_led";
192 pins = "gpio4";
193 };
194
195 pinctrl_ephy1_act_led: ephy1_act_led-pins {
196 function = "ephy1_act_led";
197 pins = "gpio5";
198 };
199
200 pinctrl_ephy2_act_led: ephy2_act_led-pins {
201 function = "ephy2_act_led";
202 pins = "gpio6";
203 };
204
205 pinctrl_ephy3_act_led: ephy3_act_led-pins {
206 function = "ephy3_act_led";
207 pins = "gpio7";
208 };
209
210 pinctrl_serial_led: serial_led-pins {
211 pinctrl_serial_led_data: serial_led_data-pins {
212 function = "serial_led_data";
213 pins = "gpio6";
214 };
215
216 pinctrl_serial_led_clk: serial_led_clk-pins {
217 function = "serial_led_clk";
218 pins = "gpio7";
219 };
220 };
221
222 pinctrl_inet_act_led: inet_act_led-pins {
223 function = "inet_act_led";
224 pins = "gpio8";
225 };
226
227 pinctrl_inet_fail_led: inet_fail_led-pins {
228 function = "inet_fail_led";
229 pins = "gpio9";
230 };
231
232 pinctrl_dsl_led: dsl_led-pins {
233 function = "dsl_led";
234 pins = "gpio10";
235 };
236
237 pinctrl_post_fail_led: post_fail_led-pins {
238 function = "post_fail_led";
239 pins = "gpio11";
240 };
241
242 pinctrl_wlan_wps_led: wlan_wps_led-pins {
243 function = "wlan_wps_led";
244 pins = "gpio12";
245 };
246
247 pinctrl_usb_pwron: usb_pwron-pins {
248 function = "usb_pwron";
249 pins = "gpio13";
250 };
251
252 pinctrl_usb_device_led: usb_device_led-pins {
253 function = "usb_device_led";
254 pins = "gpio13";
255 };
256
257 pinctrl_usb_active: usb_active-pins {
258 function = "usb_active";
259 pins = "gpio40";
260 };
261 };
262 };
263
264 uart0: serial@10000100 {
265 compatible = "brcm,bcm6345-uart";
266 reg = <0x10000100 0x18>;
267
268 interrupt-parent = <&periph_intc>;
269 interrupts = <BCM6318_IRQ_UART0>;
270
271 clocks = <&periph_osc>;
272 clock-names = "periph";
273
274 status = "disabled";
275 };
276
277 leds: led-controller@10000200 {
278 #address-cells = <1>;
279 #size-cells = <0>;
280 compatible = "brcm,bcm6328-leds";
281 reg = <0x10000200 0x24>;
282
283 status = "disabled";
284 };
285
286 periph_pwr: power-controller@100008e8 {
287 compatible = "brcm,bcm6318-power-controller";
288 reg = <0x100008e8 0x4>;
289
290 #power-domain-cells = <1>;
291 };
292
293 hsspi: spi@10003000 {
294 #address-cells = <1>;
295 #size-cells = <0>;
296 compatible = "brcm,bcm6328-hsspi";
297 reg = <0x10003000 0x600>;
298
299 interrupt-parent = <&periph_intc>;
300 interrupts = <BCM6318_IRQ_HSSPI>;
301
302 clocks = <&periph_clk BCM6318_CLK_HSSPI>,
303 <&hsspi_osc>;
304 clock-names = "hsspi",
305 "pll";
306
307 resets = <&periph_rst BCM6318_RST_SPI>;
308
309 status = "disabled";
310 };
311
312 ehci: usb@10005000 {
313 compatible = "brcm,bcm6318-ehci", "generic-ehci";
314 reg = <0x10005000 0x100>;
315 big-endian;
316 spurious-oc;
317
318 interrupt-parent = <&periph_intc>;
319 interrupts = <BCM6318_IRQ_EHCI>;
320
321 phys = <&usbh 0>;
322 phy-names = "usb";
323
324 status = "disabled";
325 };
326
327 ohci: usb@10005100 {
328 compatible = "brcm,bcm6318-ohci", "generic-ohci";
329 reg = <0x10005100 0x100>;
330 big-endian;
331 no-big-frame-no;
332
333 interrupt-parent = <&periph_intc>;
334 interrupts = <BCM6318_IRQ_OHCI>;
335
336 phys = <&usbh 0>;
337 phy-names = "usb";
338
339 status = "disabled";
340 };
341
342 usbh: usb-phy@10005200 {
343 compatible = "brcm,bcm6318-usbh-phy";
344 reg = <0x10005200 0x38>;
345
346 #phy-cells = <1>;
347
348 clocks = <&periph_clk BCM6318_CLK_USBD>,
349 <&ubus_clk BCM6318_UCLK_USB>;
350 clock-names = "usbh",
351 "usb_ref";
352
353 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_USB>;
354 resets = <&periph_rst BCM6318_RST_USBH>;
355
356 status = "disabled";
357 };
358
359 pcie: pcie@10010000 {
360 compatible = "brcm,bcm6318-pcie";
361 reg = <0x10010000 0x10000>;
362 #address-cells = <3>;
363 #size-cells = <2>;
364
365 device_type = "pci";
366 bus-range = <0x00 0x01>;
367 ranges = <0x2000000 0 0x10200000 0x10200000 0 0x100000>;
368 linux,pci-probe-only = <1>;
369
370 interrupt-parent = <&periph_intc>;
371 interrupts = <BCM6318_IRQ_PCIE_RC>;
372
373 clocks = <&periph_clk BCM6318_CLK_PCIE>,
374 <&periph_clk BCM6318_CLK_PCIE25>,
375 <&ubus_clk BCM6318_UCLK_PCIE>;
376 clock-names = "pcie",
377 "pcie25",
378 "pcie-ubus";
379
380 resets = <&periph_rst BCM6318_RST_PCIE>,
381 <&periph_rst BCM6318_RST_PCIE_EXT>,
382 <&periph_rst BCM6318_RST_PCIE_CORE>,
383 <&periph_rst BCM6318_RST_PCIE_HARD>;
384 reset-names = "pcie",
385 "pcie-ext",
386 "pcie-core",
387 "pcie-hard";
388
389 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_PCIE>;
390
391 status = "disabled";
392 };
393
394 switch0: switch@10080000 {
395 #address-cells = <1>;
396 #size-cells = <0>;
397 compatible = "brcm,bcm6318-switch";
398 reg = <0x10080000 0x8000>;
399 big-endian;
400
401 ports {
402 #address-cells = <1>;
403 #size-cells = <0>;
404
405 port@8 {
406 reg = <8>;
407
408 phy-mode = "internal";
409 ethernet = <&ethernet>;
410
411 fixed-link {
412 speed = <1000>;
413 full-duplex;
414 };
415 };
416 };
417 };
418
419 mdio: mdio@100800b0 {
420 #address-cells = <1>;
421 #size-cells = <0>;
422 compatible = "brcm,bcm6368-mdio-mux";
423 reg = <0x100800b0 0x8>;
424
425 mdio_int: mdio@0 {
426 #address-cells = <1>;
427 #size-cells = <0>;
428 reg = <0>;
429
430 phy1: ethernet-phy@1 {
431 compatible = "ethernet-phy-ieee802.3-c22";
432 reg = <1>;
433 };
434
435 phy2: ethernet-phy@2 {
436 compatible = "ethernet-phy-ieee802.3-c22";
437 reg = <2>;
438 };
439
440 phy3: ethernet-phy@3 {
441 compatible = "ethernet-phy-ieee802.3-c22";
442 reg = <3>;
443 };
444
445 phy4: ethernet-phy@4 {
446 compatible = "ethernet-phy-ieee802.3-c22";
447 reg = <4>;
448 };
449 };
450
451 mdio_ext: mdio@1 {
452 #address-cells = <1>;
453 #size-cells = <0>;
454 reg = <1>;
455 };
456 };
457
458 ethernet: ethernet@10088000 {
459 compatible = "brcm,bcm6318-enetsw";
460 reg = <0x10088000 0x80>,
461 <0x10088200 0x80>,
462 <0x10088400 0x80>;
463 reg-names = "dma",
464 "dma-channels",
465 "dma-sram";
466
467 interrupt-parent = <&periph_intc>;
468 interrupts = <BCM6318_IRQ_ENETSW_RX_DMA0>,
469 <BCM6318_IRQ_ENETSW_TX_DMA0>;
470 interrupt-names = "rx",
471 "tx";
472
473 clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
474 <&periph_clk BCM6318_CLK_ROBOSW025>,
475 <&ubus_clk BCM6318_UCLK_ROBOSW>;
476
477 resets = <&periph_rst BCM6318_RST_ENETSW>,
478 <&periph_rst BCM6318_RST_EPHY>;
479
480 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_EPHY0>,
481 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY1>,
482 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY2>,
483 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY3>;
484
485 dma-rx = <0>;
486 dma-tx = <1>;
487
488 status = "disabled";
489 };
490 };
491 };