target/linux/bmips/dts/bcm63168-comtrend-vr-3032u.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #include "bcm63268.dtsi"
   4
   5 / {
   6         model = "Comtrend VR-3032u";
   7         compatible = "comtrend,vr-3032u", "brcm,bcm63168", "brcm,bcm63268";
   8
   9         aliases {
  10                 led-boot = &led_power_green;
  11                 led-failsafe = &led_power_green;
  12                 led-running = &led_power_green;
  13                 led-upgrade = &led_power_green;
  14
  15                 led-dsl = &led_dsl_green;
  16                 led-internet = &led_internet_green;
  17                 led-usb = &led_usb_green;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys-polled";
  22                 poll-interval = <20>;
  23
  24                 reset {
  25                         label = "reset";
  26                         gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
  27                         linux,code = <KEY_RESTART>;
  28                         debounce-interval = <60>;
  29                 };
  30
  31                 wps {
  32                         label = "wps";
  33                         gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
  34                         linux,code = <KEY_WPS_BUTTON>;
  35                         debounce-interval = <60>;
  36                 };
  37         };
  38 };
  39
  40 &ehci {
  41         status = "okay";
  42 };
  43
  44 &ethernet {
  45         status = "okay";
  46
  47         nvmem-cells = <&macaddr_cferom_6a0>;
  48         nvmem-cell-names = "mac-address";
  49 };
  50
  51 &leds {
  52         status = "okay";
  53
  54         brcm,serial-leds;
  55         brcm,serial-dat-low;
  56         brcm,serial-shift-inv;
  57
  58         pinctrl-names = "default";
  59         pinctrl-0 = <&pinctrl_serial_led>;
  60
  61         led@0 {
  62                 /* GPHY0 Spd 0 */
  63                 reg = <0>;
  64                 brcm,hardware-controlled;
  65                 brcm,link-signal-sources = <0>;
  66         };
  67
  68         led@1 {
  69                 /* GPHY0 Spd 1 */
  70                 reg = <1>;
  71                 brcm,hardware-controlled;
  72                 brcm,link-signal-sources = <1>;
  73         };
  74
  75         led@2 {
  76                 reg = <2>;
  77                 active-low;
  78                 label = "red:internet";
  79         };
  80
  81         led_dsl_green: led@3 {
  82                 reg = <3>;
  83                 active-low;
  84                 label = "green:dsl";
  85         };
  86
  87         led_usb_green: led@4 {
  88                 reg = <4>;
  89                 active-low;
  90                 label = "green:usb";
  91         };
  92
  93         led@7 {
  94                 reg = <7>;
  95                 active-low;
  96                 label = "green:wps";
  97         };
  98
  99         led_internet_green: led@8 {
 100                 reg = <8>;
 101                 active-low;
 102                 label = "green:internet";
 103         };
 104
 105         led@9 {
 106                 /* EPHY0 Act */
 107                 reg = <9>;
 108                 brcm,hardware-controlled;
 109         };
 110
 111         led@10 {
 112                 /* EPHY1 Act */
 113                 reg = <10>;
 114                 brcm,hardware-controlled;
 115         };
 116
 117         led@11 {
 118                 /* EPHY2 Act */
 119                 reg = <11>;
 120                 brcm,hardware-controlled;
 121         };
 122
 123         led@12 {
 124                 /* GPHY0 Act */
 125                 reg = <12>;
 126                 brcm,hardware-controlled;
 127         };
 128
 129         led@13 {
 130                 /* EPHY0 Spd */
 131                 reg = <13>;
 132                 brcm,hardware-controlled;
 133         };
 134
 135         led@14 {
 136                 /* EPHY1 Spd */
 137                 reg = <14>;
 138                 brcm,hardware-controlled;
 139         };
 140
 141         led@15 {
 142                 /* EPHY2 Spd */
 143                 reg = <15>;
 144                 brcm,hardware-controlled;
 145         };
 146
 147         led_power_green: led@20 {
 148                 reg = <20>;
 149                 active-low;
 150                 label = "green:power";
 151         };
 152 };
 153
 154 &nflash {
 155         status = "okay";
 156
 157         nandcs@0 {
 158                 compatible = "brcm,nandcs";
 159                 reg = <0>;
 160                 nand-ecc-step-size = <512>;
 161                 nand-ecc-strength = <15>;
 162                 nand-on-flash-bbt;
 163                 brcm,nand-oob-sector-size = <64>;
 164
 165                 #address-cells = <1>;
 166                 #size-cells = <1>;
 167
 168                 partitions {
 169                         compatible = "fixed-partitions";
 170                         #address-cells = <1>;
 171                         #size-cells = <1>;
 172
 173                         cferom: partition@0 {
 174                                 label = "cferom";
 175                                 reg = <0x0000000 0x0020000>;
 176                                 read-only;
 177                         };
 178
 179                         partition@20000 {
 180                                 compatible = "brcm,wfi-split";
 181                                 label = "wfi";
 182                                 reg = <0x0020000 0x7ac0000>;
 183                         };
 184                 };
 185         };
 186 };
 187
 188 &ohci {
 189         status = "okay";
 190 };
 191
 192 &switch0 {
 193         ports {
 194                 port@0 {
 195                         reg = <0>;
 196                         label = "lan2";
 197
 198                         phy-handle = <&phy1>;
 199                         phy-mode = "mii";
 200                 };
 201
 202                 port@1 {
 203                         reg = <1>;
 204                         label = "lan3";
 205
 206                         phy-handle = <&phy2>;
 207                         phy-mode = "mii";
 208                 };
 209
 210                 port@2 {
 211                         reg = <2>;
 212                         label = "lan4";
 213
 214                         phy-handle = <&phy3>;
 215                         phy-mode = "mii";
 216                 };
 217
 218                 port@3 {
 219                         reg = <3>;
 220                         label = "lan1";
 221
 222                         phy-handle = <&phy4>;
 223                         phy-mode = "mii";
 224                 };
 225         };
 226 };
 227
 228 &uart0 {
 229         status = "okay";
 230 };
 231
 232 &usbh {
 233         status = "okay";
 234 };
 235
 236 &cferom {
 237         compatible = "nvmem-cells";
 238         #address-cells = <1>;
 239         #size-cells = <1>;
 240
 241         macaddr_cferom_6a0: macaddr@6a0 {
 242                 reg = <0x6a0 0x6>;
 243         };
 244 };