target/linux/mediatek/patches-6.1/250-clk-mediatek-add-infracfg-reset-controller-for-mt798.patch

   1 From 26ced94177b150710d94cf365002a09cc48950e9 Mon Sep 17 00:00:00 2001
   2 From: Frank Wunderlich <frank-w@public-files.de>
   3 Date: Wed, 17 Jan 2024 19:41:11 +0100
   4 Subject: [PATCH] clk: mediatek: add infracfg reset controller for mt7988
   5
   6 Infracfg can also operate as reset controller, add support for it.
   7
   8 Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
   9 ---
  10  drivers/clk/mediatek/clk-mt7988-infracfg.c | 23 ++++++++++++++++++++++
  11  1 file changed, 23 insertions(+)
  12
  13 --- a/drivers/clk/mediatek/clk-mt7988-infracfg.c
  14 +++ b/drivers/clk/mediatek/clk-mt7988-infracfg.c
  15 @@ -14,6 +14,10 @@
  16  #include "clk-gate.h"
  17  #include "clk-mux.h"
  18  #include <dt-bindings/clock/mediatek,mt7988-clk.h>
  19 +#include <dt-bindings/reset/mediatek,mt7988-resets.h>
  20 +
  21 +#define        MT7988_INFRA_RST0_SET_OFFSET    0x70
  22 +#define        MT7988_INFRA_RST1_SET_OFFSET    0x80
  23
  24  static DEFINE_SPINLOCK(mt7988_clk_lock);
  25
  26 @@ -249,12 +253,31 @@ static const struct mtk_gate infra_clks[
  27         GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P3, "infra_133m_pcie_ck_p3", "sysaxi_sel", 31),
  28  };
  29
  30 +static u16 infra_rst_ofs[] = {
  31 +       MT7988_INFRA_RST0_SET_OFFSET,
  32 +       MT7988_INFRA_RST1_SET_OFFSET,
  33 +};
  34 +
  35 +static u16 infra_idx_map[] = {
  36 +       [MT7988_INFRA_RST0_PEXTP_MAC_SWRST] = 0 * RST_NR_PER_BANK + 6,
  37 +       [MT7988_INFRA_RST1_THERM_CTRL_SWRST] = 1 * RST_NR_PER_BANK + 9,
  38 +};
  39 +
  40 +static struct mtk_clk_rst_desc infra_rst_desc = {
  41 +       .version = MTK_RST_SET_CLR,
  42 +       .rst_bank_ofs = infra_rst_ofs,
  43 +       .rst_bank_nr = ARRAY_SIZE(infra_rst_ofs),
  44 +       .rst_idx_map = infra_idx_map,
  45 +       .rst_idx_map_nr = ARRAY_SIZE(infra_idx_map),
  46 +};
  47 +
  48  static const struct mtk_clk_desc infra_desc = {
  49         .clks = infra_clks,
  50         .num_clks = ARRAY_SIZE(infra_clks),
  51         .mux_clks = infra_muxes,
  52         .num_mux_clks = ARRAY_SIZE(infra_muxes),
  53         .clk_lock = &mt7988_clk_lock,
  54 +       .rst_desc = &infra_rst_desc,
  55  };
  56
  57  static const struct of_device_id of_match_clk_mt7988_infracfg[] = {