mediatek: add support for BananaPi BPI-R4 board
[openwrt/staging/dangole.git] / target / linux / mediatek / files-6.1 / arch / arm64 / boot / dts / mediatek / mt7988a-bananapi-bpi-r4.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2022 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
5 */
6
7 /dts-v1/;
8 #include "mt7988a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
13
14 / {
15 model = "Bananapi BPI-R4";
16 compatible = "bananapi,bpi-r4",
17 "mediatek,mt7988";
18
19 aliases {
20 serial0 = &uart0;
21 led-boot = &led_green;
22 led-failsafe = &led_green;
23 led-running = &led_green;
24 led-upgrade = &led_green;
25 };
26
27 chosen {
28 stdout-path = &uart0;
29 bootargs = "console=ttyS0,115200n1 loglevel=8 pci=pcie_bus_perf ubi.block=0,fit root=/dev/fit0";
30 rootdisk-spim-nand = <&ubi_rootfs>;
31 };
32
33 memory {
34 reg = <0x00 0x40000000 0x00 0x10000000>;
35 };
36
37 /* SFP1 cage (WAN) */
38 sfp1: sfp1 {
39 compatible = "sff,sfp";
40 i2c-bus = <&i2c_sfp1>;
41 los-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
42 mod-def0-gpios = <&pio 82 GPIO_ACTIVE_LOW>;
43 tx-disable-gpios = <&pio 70 GPIO_ACTIVE_HIGH>;
44 tx-fault-gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
45 rate-select0-gpios = <&pio 21 GPIO_ACTIVE_LOW>;
46 maximum-power-milliwatt = <3000>;
47 };
48
49 /* SFP2 cage (LAN) */
50 sfp2: sfp2 {
51 compatible = "sff,sfp";
52 i2c-bus = <&i2c_sfp2>;
53 los-gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
54 mod-def0-gpios = <&pio 83 GPIO_ACTIVE_LOW>;
55 tx-disable-gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
56 tx-fault-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
57 rate-select0-gpios = <&pio 3 GPIO_ACTIVE_LOW>;
58 maximum-power-milliwatt = <3000>;
59 };
60
61 gpio-keys {
62 compatible = "gpio-keys";
63
64 wps {
65 label = "WPS";
66 linux,code = <KEY_RESTART>;
67 gpios = <&pio 14 GPIO_ACTIVE_LOW>;
68 };
69 };
70
71 gpio-leds {
72 compatible = "gpio-leds";
73
74 led_green: led-green {
75 function = LED_FUNCTION_STATUS;
76 color = <LED_COLOR_ID_GREEN>;
77 gpios = <&pio 79 GPIO_ACTIVE_HIGH>;
78 default-state = "on";
79 };
80
81 led_blue: led-blue {
82 function = LED_FUNCTION_WPS;
83 color = <LED_COLOR_ID_BLUE>;
84 gpios = <&pio 63 GPIO_ACTIVE_HIGH>;
85 default-state = "off";
86 };
87 };
88 };
89
90 &eth {
91 status = "okay";
92 };
93
94 &gmac0 {
95 status = "okay";
96 };
97
98 &gmac1 {
99 sfp = <&sfp2>;
100 managed = "in-band-status";
101 phy-mode = "usxgmii";
102 status = "okay";
103 };
104
105 &gmac2 {
106 sfp = <&sfp1>;
107 managed = "in-band-status";
108 phy-mode = "usxgmii";
109 status = "okay";
110 };
111
112 &switch {
113 status = "okay";
114 };
115
116 &gsw_phy0 {
117 pinctrl-names = "gbe-led";
118 pinctrl-0 = <&gbe0_led0_pins>;
119 };
120
121 &gsw_port0 {
122 label = "wan";
123 };
124
125 &gsw_phy0_led0 {
126 status = "okay";
127 color = <LED_COLOR_ID_GREEN>;
128 };
129
130 &gsw_phy1 {
131 pinctrl-names = "gbe-led";
132 pinctrl-0 = <&gbe1_led0_pins>;
133 };
134
135 &gsw_phy1_led0 {
136 status = "okay";
137 color = <LED_COLOR_ID_GREEN>;
138 };
139
140 &gsw_phy2 {
141 pinctrl-names = "gbe-led";
142 pinctrl-0 = <&gbe2_led0_pins>;
143 };
144
145 &gsw_phy2_led0 {
146 status = "okay";
147 color = <LED_COLOR_ID_GREEN>;
148 };
149
150 &gsw_phy3 {
151 pinctrl-names = "gbe-led";
152 pinctrl-0 = <&gbe3_led0_pins>;
153 };
154
155 &gsw_phy3_led0 {
156 status = "okay";
157 color = <LED_COLOR_ID_GREEN>;
158 };
159
160 &cpu0 {
161 proc-supply = <&rt5190_buck3>;
162 };
163
164 &cpu1 {
165 proc-supply = <&rt5190_buck3>;
166 };
167
168 &cpu2 {
169 proc-supply = <&rt5190_buck3>;
170 };
171
172 &cpu3 {
173 proc-supply = <&rt5190_buck3>;
174 };
175
176 &cci {
177 proc-supply = <&rt5190_buck3>;
178 };
179
180 &i2c0 {
181 pinctrl-names = "default";
182 pinctrl-0 = <&i2c0_pins>;
183 status = "okay";
184
185 rt5190a_64: rt5190a@64 {
186 compatible = "richtek,rt5190a";
187 reg = <0x64>;
188 vin2-supply = <&rt5190_buck1>;
189 vin3-supply = <&rt5190_buck1>;
190 vin4-supply = <&rt5190_buck1>;
191
192 regulators {
193 rt5190_buck1: buck1 {
194 regulator-name = "rt5190a-buck1";
195 regulator-min-microvolt = <5090000>;
196 regulator-max-microvolt = <5090000>;
197 regulator-allowed-modes =
198 <RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
199 regulator-boot-on;
200 regulator-always-on;
201 };
202 buck2 {
203 regulator-name = "vcore";
204 regulator-min-microvolt = <600000>;
205 regulator-max-microvolt = <1400000>;
206 regulator-boot-on;
207 regulator-always-on;
208 };
209 rt5190_buck3: buck3 {
210 regulator-name = "vproc";
211 regulator-min-microvolt = <600000>;
212 regulator-max-microvolt = <1400000>;
213 regulator-boot-on;
214 };
215 buck4 {
216 regulator-name = "rt5190a-buck4";
217 regulator-min-microvolt = <850000>;
218 regulator-max-microvolt = <850000>;
219 regulator-allowed-modes =
220 <RT5190A_OPMODE_AUTO RT5190A_OPMODE_FPWM>;
221 regulator-boot-on;
222 regulator-always-on;
223 };
224 ldo {
225 regulator-name = "rt5190a-ldo";
226 regulator-min-microvolt = <1200000>;
227 regulator-max-microvolt = <1200000>;
228 regulator-boot-on;
229 regulator-always-on;
230 };
231 };
232 };
233 };
234
235 &i2c2 {
236 pinctrl-names = "default";
237 pinctrl-0 = <&i2c2_1_pins>;
238 status = "okay";
239
240 pca9545: i2c-switch@70 {
241 reg = <0x70>;
242 compatible = "nxp,pca9545";
243 reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>;
244 #address-cells = <1>;
245 #size-cells = <0>;
246
247 i2c_rtc: i2c@0 { //eeprom,rtc,ngff
248 #address-cells = <1>;
249 #size-cells = <0>;
250 reg = <0>;
251
252 eeprom@50 {
253 compatible = "atmel,24c02";
254 reg = <0x50>;
255 address-bits = <8>;
256 page-size = <8>;
257 size = <256>;
258 };
259
260 eeprom@57 {
261 compatible = "atmel,24c02";
262 reg = <0x57>;
263 address-bits = <8>;
264 page-size = <8>;
265 size = <256>;
266 };
267
268 pcf8563: rtc@51 {
269 compatible = "nxp,pcf8563";
270 reg = <0x51>;
271 status = "disabled";
272 };
273 };
274
275 i2c_sfp1: i2c@1 {
276 #address-cells = <1>;
277 #size-cells = <0>;
278 reg = <1>;
279 };
280
281 i2c_sfp2: i2c@2 {
282 #address-cells = <1>;
283 #size-cells = <0>;
284 reg = <2>;
285 };
286
287 i2c_wifi: i2c@3 {
288 #address-cells = <1>;
289 #size-cells = <0>;
290 reg = <3>;
291 };
292 };
293 };
294
295 /* mPCIe SIM2 */
296 &pcie0 {
297 pinctrl-names = "default";
298 pinctrl-0 = <&pcie0_pins>;
299 status = "okay";
300 };
301
302 /* mPCIe SIM3 */
303 &pcie1 {
304 pinctrl-names = "default";
305 pinctrl-0 = <&pcie1_pins>;
306 status = "okay";
307 };
308
309 /* M.2 key-B SIM1 */
310 &pcie2 {
311 pinctrl-names = "default";
312 pinctrl-0 = <&pcie2_pins>;
313 status = "okay";
314 };
315
316 /* M.2 key-M SSD */
317 &pcie3 {
318 pinctrl-names = "default";
319 pinctrl-0 = <&pcie3_pins>;
320 status = "okay";
321 };
322
323 &ssusb1 {
324 status = "okay";
325 };
326
327 &tphy {
328 status = "okay";
329 };
330
331 &spi0 {
332 pinctrl-names = "default";
333 pinctrl-0 = <&spi0_flash_pins>;
334 status = "okay";
335
336 spi_nand: spi_nand@0 {
337 compatible = "spi-nand";
338 reg = <0>;
339 spi-max-frequency = <52000000>;
340 spi-tx-buswidth = <4>;
341 spi-rx-buswidth = <4>;
342 };
343 };
344
345 &spi_nand {
346 partitions {
347 compatible = "fixed-partitions";
348 #address-cells = <1>;
349 #size-cells = <1>;
350
351 partition@0 {
352 label = "bl2";
353 reg = <0x0 0x200000>;
354 read-only;
355 };
356
357 partition@200000 {
358 label = "ubi";
359 reg = <0x200000 0x7e00000>;
360 compatible = "linux,ubi";
361
362 volumes {
363 ubi-volume-ubootenv {
364 volname = "ubootenv";
365 nvmem-layout {
366 compatible = "u-boot,env-redundant-bool-layout";
367 };
368 };
369
370 ubi-volume-ubootenv2 {
371 volname = "ubootenv2";
372 nvmem-layout {
373 compatible = "u-boot,env-redundant-bool-layout";
374 };
375 };
376
377 ubi_rootfs: ubi-volume-fit {
378 volname = "fit";
379 };
380 };
381 };
382 };
383 };
384
385 &uart0 {
386 status = "okay";
387 };
388
389 &watchdog {
390 status = "okay";
391 };
392
393 &xphy {
394 status = "okay";
395 };