d326c416a9d3aee66c6d6305b4cc031339f6ada2
[openwrt/staging/dangole.git] / target / linux / mediatek / files-5.15 / arch / arm64 / boot / dts / mediatek / mt7986a-bananapi-bpi-r3.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2021 MediaTek Inc.
4 * Authors: Sam.Shih <sam.shih@mediatek.com>
5 * Frank Wunderlich <frank-w@public-files.de>
6 * Daniel Golle <daniel@makrotopia.org>
7 */
8
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
14
15 #include "mt7986a.dtsi"
16
17 / {
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
21
22 aliases {
23 serial0 = &uart0;
24 ethernet0 = &gmac0;
25 ethernet1 = &gmac1;
26 };
27
28 chosen {
29 stdout-path = "serial0:115200n8";
30 };
31
32 dcin: regulator-12vd {
33 compatible = "regulator-fixed";
34 regulator-name = "12vd";
35 regulator-min-microvolt = <12000000>;
36 regulator-max-microvolt = <12000000>;
37 regulator-boot-on;
38 regulator-always-on;
39 };
40
41 fan: pwm-fan {
42 compatible = "pwm-fan";
43 #cooling-cells = <2>;
44 /* cooling level (0, 1, 2) - pwm inverted */
45 cooling-levels = <255 96 0>;
46 pwms = <&pwm 0 10000 0>;
47 status = "okay";
48 };
49
50 gpio-keys {
51 compatible = "gpio-keys";
52
53 reset-key {
54 label = "reset";
55 linux,code = <KEY_RESTART>;
56 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
57 };
58
59 wps-key {
60 label = "wps";
61 linux,code = <KEY_WPS_BUTTON>;
62 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
63 };
64 };
65
66 /* i2c of the left SFP cage (wan) */
67 i2c_sfp1: i2c-gpio-0 {
68 compatible = "i2c-gpio";
69 sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
70 scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
71 i2c-gpio,delay-us = <2>;
72 #address-cells = <1>;
73 #size-cells = <0>;
74 };
75
76 /* i2c of the right SFP cage (lan) */
77 i2c_sfp2: i2c-gpio-1 {
78 compatible = "i2c-gpio";
79 sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
80 scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
81 i2c-gpio,delay-us = <2>;
82 #address-cells = <1>;
83 #size-cells = <0>;
84 };
85
86 leds {
87 compatible = "gpio-leds";
88
89 green_led: led-0 {
90 color = <LED_COLOR_ID_GREEN>;
91 function = LED_FUNCTION_POWER;
92 gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
93 default-state = "on";
94 };
95
96 blue_led: led-1 {
97 color = <LED_COLOR_ID_BLUE>;
98 function = LED_FUNCTION_STATUS;
99 gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
100 default-state = "off";
101 };
102 };
103
104 reg_1p8v: regulator-1p8v {
105 compatible = "regulator-fixed";
106 regulator-name = "1.8vd";
107 regulator-min-microvolt = <1800000>;
108 regulator-max-microvolt = <1800000>;
109 regulator-boot-on;
110 regulator-always-on;
111 vin-supply = <&dcin>;
112 };
113
114 reg_3p3v: regulator-3p3v {
115 compatible = "regulator-fixed";
116 regulator-name = "3.3vd";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 regulator-boot-on;
120 regulator-always-on;
121 vin-supply = <&dcin>;
122 };
123
124 /* left SFP cage (wan) */
125 sfp1: sfp-1 {
126 compatible = "sff,sfp";
127 i2c-bus = <&i2c_sfp1>;
128 los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
129 mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
130 tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
131 tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
132 maximum-power-milliwatt = <3000>;
133 };
134
135 /* right SFP cage (lan) */
136 sfp2: sfp-2 {
137 compatible = "sff,sfp";
138 i2c-bus = <&i2c_sfp2>;
139 los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
140 mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
141 tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
142 tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
143 maximum-power-milliwatt = <3000>;
144 };
145 };
146
147 &cpu_thermal {
148 cooling-maps {
149 cpu-active-high {
150 /* active: set fan to cooling level 2 */
151 cooling-device = <&fan 2 2>;
152 trip = <&cpu_trip_active_high>;
153 };
154
155 cpu-active-med {
156 /* active: set fan to cooling level 1 */
157 cooling-device = <&fan 1 1>;
158 trip = <&cpu_trip_active_med>;
159 };
160
161 cpu-active-low {
162 /* active: set fan to cooling level 0 */
163 cooling-device = <&fan 0 0>;
164 trip = <&cpu_trip_active_low>;
165 };
166 };
167 };
168
169 &crypto {
170 status = "okay";
171 };
172
173 &eth {
174 status = "okay";
175
176 gmac0: mac@0 {
177 compatible = "mediatek,eth-mac";
178 reg = <0>;
179 phy-mode = "2500base-x";
180
181 fixed-link {
182 speed = <2500>;
183 full-duplex;
184 pause;
185 };
186 };
187
188 gmac1: mac@1 {
189 compatible = "mediatek,eth-mac";
190 reg = <1>;
191 phy-mode = "2500base-x";
192 sfp = <&sfp1>;
193 managed = "in-band-status";
194 };
195
196 mdio: mdio-bus {
197 #address-cells = <1>;
198 #size-cells = <0>;
199 };
200 };
201
202 &mdio {
203 switch: switch@1f {
204 compatible = "mediatek,mt7531";
205 reg = <31>;
206 interrupt-controller;
207 #interrupt-cells = <1>;
208 interrupt-parent = <&pio>;
209 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
210 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
211 };
212 };
213
214 &mmc0 {
215 pinctrl-names = "default", "state_uhs";
216 pinctrl-0 = <&mmc0_pins_default>;
217 pinctrl-1 = <&mmc0_pins_uhs>;
218 vmmc-supply = <&reg_3p3v>;
219 vqmmc-supply = <&reg_1p8v>;
220 };
221
222 &i2c0 {
223 pinctrl-names = "default";
224 pinctrl-0 = <&i2c_pins>;
225 status = "okay";
226 };
227
228 &pcie {
229 pinctrl-names = "default";
230 pinctrl-0 = <&pcie_pins>;
231 status = "okay";
232 };
233
234 &pcie_phy {
235 status = "okay";
236 };
237
238 &pio {
239 i2c_pins: i2c-pins {
240 mux {
241 function = "i2c";
242 groups = "i2c";
243 };
244 };
245
246 mmc0_pins_default: mmc0-pins {
247 mux {
248 function = "emmc";
249 groups = "emmc_51";
250 };
251 conf-cmd-dat {
252 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
253 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
254 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
255 input-enable;
256 drive-strength = <4>;
257 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
258 };
259 conf-clk {
260 pins = "EMMC_CK";
261 drive-strength = <6>;
262 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
263 };
264 conf-ds {
265 pins = "EMMC_DSL";
266 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
267 };
268 conf-rst {
269 pins = "EMMC_RSTB";
270 drive-strength = <4>;
271 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
272 };
273 };
274
275 mmc0_pins_uhs: mmc0-uhs-pins {
276 mux {
277 function = "emmc";
278 groups = "emmc_51";
279 };
280 conf-cmd-dat {
281 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
282 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
283 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
284 input-enable;
285 drive-strength = <4>;
286 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
287 };
288 conf-clk {
289 pins = "EMMC_CK";
290 drive-strength = <6>;
291 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
292 };
293 conf-ds {
294 pins = "EMMC_DSL";
295 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
296 };
297 conf-rst {
298 pins = "EMMC_RSTB";
299 drive-strength = <4>;
300 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
301 };
302 };
303
304 pcie_pins: pcie-pins {
305 mux {
306 function = "pcie";
307 groups = "pcie_clk", "pcie_pereset";
308 };
309 };
310
311 pwm_pins: pwm-pins {
312 mux {
313 function = "pwm";
314 groups = "pwm0", "pwm1_0";
315 };
316 };
317
318 spi_flash_pins: spi-flash-pins {
319 mux {
320 function = "spi";
321 groups = "spi0", "spi0_wp_hold";
322 };
323 };
324
325 spic_pins: spic-pins {
326 mux {
327 function = "spi";
328 groups = "spi1_0";
329 };
330 };
331
332 uart1_pins: uart1-pins {
333 mux {
334 function = "uart";
335 groups = "uart1_rx_tx";
336 };
337 };
338
339 uart2_pins: uart2-pins {
340 mux {
341 function = "uart";
342 groups = "uart2_0_rx_tx";
343 };
344 };
345
346 wf_2g_5g_pins: wf-2g-5g-pins {
347 mux {
348 function = "wifi";
349 groups = "wf_2g", "wf_5g";
350 };
351 conf {
352 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
353 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
354 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
355 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
356 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
357 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
358 "WF1_TOP_CLK", "WF1_TOP_DATA";
359 drive-strength = <4>;
360 };
361 };
362
363 wf_dbdc_pins: wf-dbdc-pins {
364 mux {
365 function = "wifi";
366 groups = "wf_dbdc";
367 };
368 conf {
369 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
370 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
371 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
372 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
373 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
374 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
375 "WF1_TOP_CLK", "WF1_TOP_DATA";
376 drive-strength = <4>;
377 };
378 };
379
380 wf_led_pins: wf-led-pins {
381 mux {
382 function = "led";
383 groups = "wifi_led";
384 };
385 };
386 };
387
388 &pwm {
389 pinctrl-names = "default";
390 pinctrl-0 = <&pwm_pins>;
391 status = "okay";
392 };
393
394 &spi0 {
395 pinctrl-names = "default";
396 pinctrl-0 = <&spi_flash_pins>;
397 status = "okay";
398 };
399
400 &spi1 {
401 pinctrl-names = "default";
402 pinctrl-0 = <&spic_pins>;
403 status = "okay";
404 };
405
406 &ssusb {
407 status = "okay";
408 };
409
410 &switch {
411 ports {
412 #address-cells = <1>;
413 #size-cells = <0>;
414
415 port@0 {
416 reg = <0>;
417 label = "wan";
418 };
419
420 port@1 {
421 reg = <1>;
422 label = "lan0";
423 };
424
425 port@2 {
426 reg = <2>;
427 label = "lan1";
428 };
429
430 port@3 {
431 reg = <3>;
432 label = "lan2";
433 };
434
435 port@4 {
436 reg = <4>;
437 label = "lan3";
438 };
439
440 port5: port@5 {
441 reg = <5>;
442 label = "lan4";
443 phy-mode = "2500base-x";
444 sfp = <&sfp2>;
445 managed = "in-band-status";
446 };
447
448 port@6 {
449 reg = <6>;
450 label = "cpu";
451 ethernet = <&gmac0>;
452 phy-mode = "2500base-x";
453
454 fixed-link {
455 speed = <2500>;
456 full-duplex;
457 pause;
458 };
459 };
460 };
461 };
462
463 &trng {
464 status = "okay";
465 };
466
467 &uart0 {
468 status = "okay";
469 };
470
471 &uart1 {
472 pinctrl-names = "default";
473 pinctrl-0 = <&uart1_pins>;
474 status = "okay";
475 };
476
477 &uart2 {
478 pinctrl-names = "default";
479 pinctrl-0 = <&uart2_pins>;
480 status = "okay";
481 };
482
483 &usb_phy {
484 status = "okay";
485 };
486
487 &watchdog {
488 status = "okay";
489 };
490
491 &wifi {
492 status = "okay";
493 pinctrl-names = "default", "dbdc";
494 pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
495 pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
496
497 led {
498 led-active-low;
499 };
500 };
501