bcm27xx: update 6.1 patches to latest version
[openwrt/staging/dangole.git] / target / linux / bcm27xx / patches-6.1 / 950-0970-drm-vc4-txp-Handle-40-bits-DMA-Addresses.patch
1 From ddb9aa80692ed5d35e4ee4688c36789620f78c5c Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Fri, 14 Apr 2023 17:47:11 +0200
4 Subject: [PATCH] drm/vc4: txp: Handle 40-bits DMA Addresses
5
6 The BCM2712 MOP and MOPLET can handle addresses larger than 32bits
7 through an extra register. We can easily support it and make it
8 conditional based on the compatible through a boolean in our variant
9 structure.
10
11 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
12 ---
13 drivers/gpu/drm/vc4/vc4_drv.h | 1 +
14 drivers/gpu/drm/vc4/vc4_txp.c | 10 +++++++++-
15 2 files changed, 10 insertions(+), 1 deletion(-)
16
17 --- a/drivers/gpu/drm/vc4/vc4_drv.h
18 +++ b/drivers/gpu/drm/vc4/vc4_drv.h
19 @@ -565,6 +565,7 @@ struct vc4_txp_data {
20 struct vc4_crtc_data base;
21 unsigned int has_byte_enable:1;
22 unsigned int size_minus_one:1;
23 + unsigned int supports_40bit_addresses:1;
24 };
25
26 extern const struct vc4_txp_data bcm2835_txp_data;
27 --- a/drivers/gpu/drm/vc4/vc4_txp.c
28 +++ b/drivers/gpu/drm/vc4/vc4_txp.c
29 @@ -145,6 +145,8 @@
30 /* Number of lines received and committed to memory. */
31 #define TXP_PROGRESS 0x10
32
33 +#define TXP_DST_PTR_HIGH 0x1c
34 +
35 #define TXP_READ(offset) \
36 ({ \
37 kunit_fail_current_test("Accessing a register in a unit test!\n"); \
38 @@ -297,6 +299,7 @@ static void vc4_txp_connector_atomic_com
39 struct drm_framebuffer *fb;
40 unsigned int hdisplay;
41 unsigned int vdisplay;
42 + dma_addr_t addr;
43 u32 ctrl;
44 int idx;
45 int i;
46 @@ -334,7 +337,12 @@ static void vc4_txp_connector_atomic_com
47 return;
48
49 gem = drm_fb_dma_get_gem_obj(fb, 0);
50 - TXP_WRITE(TXP_DST_PTR, gem->dma_addr + fb->offsets[0]);
51 + addr = gem->dma_addr + fb->offsets[0];
52 + TXP_WRITE(TXP_DST_PTR, lower_32_bits(addr));
53 +
54 + if (txp_data->supports_40bit_addresses)
55 + TXP_WRITE(TXP_DST_PTR_HIGH, upper_32_bits(addr) & 0xff);
56 +
57 TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]);
58
59 hdisplay = mode->hdisplay ?: 1;